Abstract: Organic polymers for use in laminates including capacitors, wherein the polymer includes repeat units of the formula: wherein: each R1 is independently H, an aryl group, Cl, Br, I, or an organic group that includes a crosslinkable group; each R2 is independently H, an aryl group or R4; each R3 is independently H or methyl; each R5 is independently an alkyl group, a halogen, or R4; each R4 is independently an organic group that includes at least one CN group and has a molecular weight of about 30 to about 200 per CN group; and n=0-3; with the proviso that at least one repeat unit in the polymer includes an R4.

Abstract: A three-dimensionally formed circuit sheet comprises a resin film and a circuit pattern formed of an electrically conductive paste on the resin film. The electrically conductive paste contains, as a binder, a resin that is three-dimensionally formable. The resin film and the circuit pattern are formed in a three-dimensional shape. A method for manufacturing the three-dimensionally formed circuit sheet is also provided. The method comprises forming a circuit pattern on a resin film using an electrically conductive paste by means of printing, wherein the electrically conductive paste contains a resin that is three-dimensionally formable, and press molding the resin film including the circuit pattern into a three-dimensional shape. Additionally, a three-dimensionally formed circuit component comprising a three-dimensionally formed circuit sheet and a base member and a method for manufacturing the same are disclosed.

Abstract: A micro-electromechanical device is formed on a substrate. The device has sliding, abrading or impacting surfaces. At least one of these surfaces is covered with an anti-stiction material. The anti-stiction material is provided from a slicon compound precursor (e.g. silane, silanol) or multiple silicon compound precursors. Preferably the precursor(s) is fluorinated—more preferably perfluorinated, and is deposited with a solvent as a low molecular weight oligomer or in monomeric form. Examples include silanes (fluorinated or not) with aromatic or polycyclic ring sturctures, and/or silanes (fluorinated or not) having alkenyl, alkynyl, epoxy or acrylate groups. Mixtures either or both of these groups with alkyl chain silanes (preferably fluorinated) are also contemplated.

Abstract: Provision of a releasing layer transfer film which can form, in a simple manner, a releasing layer on a COF flexible printed wiring board, the releasing layer preventing melt adhesion of an insulating layer to a heating tool, thereby enhancing productivity and reliability of semiconductor devices produced by use of a semiconductor chip mounting line. The releasing layer transfer film 1 for forming a releasing layer onto an insulating layer serving as a component layer of a COF flexible printed wiring board, the releasing layer transfer film includes a transfer film substrate 2 and a transferable releasing layer 3 provided on a surface of the transfer film substrate 2, wherein the transferable releasing layer 3 is formed from a releasing agent and can be transferred onto the insulating layer.

Abstract: A circuitized substrate comprised of at least one dielectric material having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device. The substrate is preferably combined with other dielectric-circuit layered assemblies to form a multilayered substrate on which can be positioned discrete electronic components (e.g., a logic chip) coupled to the internal memory device to work in combination therewith. An electrical assembly capable of using the substrate is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.

Abstract: A method of forming a via in a low-k dielectric material and without the attendant via poisoning problem, or a dual damascene structure formed in the same dielectric and without the same problem are disclosed. The vertical walls of the via opening are first lined with a low-k protection layer and then covered with a barrier layer in order to prevent outgassing from the low-k dielectric material when copper is deposited into the via opening. In the case of a dual damascene structure, it is sufficient that the hole opening underlying the trench opening is first lined with the low-k protection layer. The resulting via or dual damascene structure is free of poisoned metal and, therefore, more reliable.

Abstract: Semiconductor devices with composite etch stop layers and methods of fabrication thereof. An semiconductor device with a composite etch stop layer includes a substrate having a conductive member, a first etch stop layer on the substrate and the conductive member, a second etch stop layer and a dielectric layer sequentially over the second etch stop layer, having a conductive layer therein down through the dielectric layer, the second etch stop layer and the first etch stop layer to the conductive member.

Abstract: A dual panel-type active matrix organic electroluminescent device includes a gate line disposed along a first direction on a first substrate, a data line disposed along a second direction on the first substrate, a power line disposed along the second direction on the first substrate and spaced apart from the data line to define a pixel region with the gate and data lines, the power line and the gate line both formed of a same material during a same process, a switching thin film transistor disposed on the first substrate near a crossing of the gate and data lines, a driving thin film transistor disposed on the first substrate near a crossing of the gate and power lines, a connecting pattern within the pixel region on the first substrate formed of an insulating material, and a connecting electrode disposed within the pixel region on the first substrate to cover the connecting pattern and electrically interconnecting the driving thin film transistor to an organic electroluminescent diode.

Abstract: The present invention provides a semiconductor device having a multilayer wiring structure including a lower Cu buried-wiring layer, a SiC film, a SiOC film of 400 nm in thickness functioning as an interlayer insulating film, and an upper Cu buried-wiring layer electrically connected to the lower buried-wiring layer through contact plugs passing through the interlayer insulating film. The contact plugs and the upper Cu buried wiring layer are formed a single burying step of the dual damascene process. The SiOC film has a carbon content of about 12 atomic % and a relative dielectric constant of about 3.0. The upper Cu buried wiring layer is formed by burying a Cu film, through a barrier metal, in wiring grooves which are provided in the inter-wiring insulating film including a laminated film of an organic film, e.g., a PAE film of 200 nm in thickness, and a SiOC film of 150 nm in thickness.

Abstract: The present invention relates to a surface protecting adhesive film for a semiconductor wafer in which an adhesive layer having a storage elastic modulus from 1×105 Pa to 1×107 Pa at 150° C. and a thickness of from 3 ?m to 100 ?m is formed on both a surface and back surface of a base film having a melting point of at least 200° C. and a thickness of 10 ?m to 200 ?m. According to the present invention, in a step of grinding the back side of a semiconductor wafer and removing a damaged layer generated on the back side, the semiconductor wafer can be prevented from being broken and being contaminated and the like even if a semiconductor wafer is thinned as low as 100 ?m.

Abstract: A low dielectric film forming material contains siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided which is suitable for inter-level insulating film material. A semiconductor device is also provided which has a low dielectric constant film and high reliability.

Abstract: A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.

Abstract: An organic semiconductor device includes a organic semiconductor layer with carrier mobility formed between a pair of opposing electrodes. The device also includes a buffer layer that is inserted between at least one of the pair of electrodes and the organic semiconductor layer in contact therewith. The buffer layer has a value of a work function or an ionization potential between a value of a work function of the electrode in contact and a value of an ionization potential of the organic semiconductor layer.

Abstract: Integrated circuit packages and their manufacture are described, wherein the packages comprise dendrimers or hyperbranched polymers. In some implementations, the dendrimers or hyperbranched polymers include repeat units having one or more ring structures and having surface groups to react with one or more components of a plastic. In some implementations, the dendrimers or hyperbranched polymers have a glass transition temperature of less than an operating temperature of the integrated circuit and form at least a partially separate phase.

Abstract: The present invention relates to organic light emitting devices (OLEDs). The devices of the present invention are efficient white or multicolored phosphorescent OLEDs which have a high color stability over a wide range of luminances. The devices of the present invention comprise an emissive region having at least two emissive layers, with each emissive layer comprising a different host and emissive dopant, wherein at least one of the emissive dopants emits by phosphorescence.

Abstract: A thin film transistor and a method of manufacturing the same are disclosed. More specifically, there is provided a thin film transistor having a thin film transistor and a method of manufacturing the same wherein an inorganic layer and an organic planarization layer are sequentially formed on the surface of a substrate on source/drain electrode of a thin film transistor having a semiconductor layer, a gate, source/drain areas and the source/drain electrodes, and a blanket etching process is performed to the organic planarization layer to planarize the inorganic layer. After forming a photoresist pattern on the inorganic layer, an etching process is performed to form a hole coupling a pixel electrode with one of the source/drain electrodes. According to the manufacturing method, the hole may be formed using one mask, thereby simplifying a manufacturing process, and improving an adhesion with the pixel electrode by the inorganic layer formed above.

Abstract: A resin material having low dielectric constant is used as an inter-layer insulating film and its bottom surface is contacted with a silicon oxide film across the whole surface thereof. Thereby, the surface may be flattened and capacity produced between a thin film transistor and an pixel electrode may be reduced. Further, it allows to avoid a problem that impurity ions and moisture infiltrate into the lower surface of the resin material, thus degrading the reliability of whole semiconductor device.

Abstract: Systems and methodologies are provided for of enabling a polymer memory cell to exhibit variable retention times for stored data therein. Such setting of retention time can depend upon a programming mode and/or type of material employed in the polymer memory cell. Short retention times can be obtained by programming the polymer memory cell via a low current or a low electrical field. Similarly, long retention times can be obtained by employing a high current or electrical field to program the polymer memory cell.

Abstract: A dielectric material prepared from a siloxy/metal oxide hybrid composition, and electronic devices such as thin film transistors comprising such dielectric material are provided herein. The siloxy/metal oxide hybrid composition comprises a siloxy component such as, for example, a siloxane or silsesquioxane. The siloxy/metal oxide hybrid composition is useful for the preparation of dielectric layers for thin film transistors using solution deposition techniques.

Abstract: The present invention provides an organic semiconductor transistor element that includes at least a source electrode, a drain electrode, an organic semiconductor formed to be electrically conductive to the source electrode and the drain electrode, and a gate electrode which is both insulated from the organic semiconductor and capable of applying an electric field. The organic semiconductor includes a polymer compound containing an aromatic tertiary amine.

Abstract: An electronic device includes a substrate and a well structure overlying the substrate and defining an array of openings. From a cross-sectional view, the well structure, at the openings has a negative slope. From a plan view, each opening corresponds to an organic electronic component. Each opening within the array of openings has a width and two immediately adjacent openings within the array of openings are connected by a channel having a width smaller than the width of each opening.

Abstract: A field effect transistor comprising, as provided on a support substrate, an insulation layer, a gate electrode and an organic semiconductor layer separated by the insulation layer, a source electrode and a drain electrode provided so as to contact the organic semiconductor layer, wherein elongation ?1 (%) at the yield point of the insulation layer is larger than elongation ?2 (%) at the yield point of the support substrate.

Abstract: Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.

Abstract: A semiconductor device includes a semiconductor section formed from an organic semiconductor material, a first contact for injecting charge carriers into the semiconductor section and a second contact for extracting charge carriers from the semiconductor section, wherein a layer of a nitrile or of an isonitrile is arranged between the first contact and the semiconductor section and/or between the second contact and the semiconductor section. The nitrile or isonitrile acts as a charge transfer molecule facilitating the transfer of charge carriers between contact and organic semiconductor material. This allows the contact resistance between contact and organic semiconductor material to be significantly reduced.

Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combination not including continuous or semi-continuous fibers as part thereof. The substrate further includes at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.

Abstract: A first heat treatment for crystallization is implemented after introducing nickel to an amorphous silicon film 103 disposed on a quartz substrate 101. A crystal silicon film 105 is obtained by this heat treatment. Then, a oxide film 106 is formed by wet oxidation. At this time, the nickel element is gettered to the oxide film 106 by an action of fluorite. Then, the oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.

Abstract: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device also includes an electric conductor that extends through the multiplelayered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is covers side surfaces and a bottom surface of the Cu film 120. An insulating film 116 is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).

Abstract: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.

Abstract: Semiconductor apparatus comprising a substrate having a substrate surface; a first dielectric layer comprising molecules of a first compound, the molecules of the first compound having first ends and second ends, the first ends being covalently bonded to a first region of the substrate surface, the second ends having aromatic regions; and a polycrystalline semiconductor layer comprising organic semiconductor molecules with aromatic portions, the polycrystalline semiconductor layer being on the first region of the substrate. Integrated circuits comprising apparatus, and methods for making apparatus and integrated circuits.

Abstract: Low temperature, ambient pressure processes are desired for fabrication of transistors on flexible polymer substrates. Lamination of semiconductors is such a process. The semiconductor is deposited on a donor substrate. The donor is positioned over a receiver substrate, which may be patterned with additional transistor elements. The semiconductor is transferred from the donor to the receiver by lamination.

Abstract: A semiconductor device having a substrate: a semiconductor film having at least two impurity regions, and at least one channel forming region; a gate insulating film; a gate electrode; an interlayer insulating film having an organic resin; a first conductive layer connected with one of the at least two impurity regions of the semiconductor film, where the first conductive layer has a light shielding part overlapping with at least the channel forming region; a pixel electrode; and a second conductive layer electrically connected with the other one of the at least two impurity regions, where the first and second conductive avers and the pixel electrode are provided on a same surface over the interlayer insulating film and the pixel electrode is electrically connected to the other one of the two impurity regions through the second conductive layer.

Abstract: A structure for a chip or chip package is disclosed, with final passivation and terminal metallurgy which are mechanically decoupled but electrically coupled to the multilayer on-chip interconnects. This decoupling allows the chip to survive packaging stresses in the final passivation region, with strain relief from the decoupling region and compliant leads therein, so that on-chip interconnect levels do not feel these external packaging or other stresses. This structure is particularly preferred for on-chip interconnects consisting of Cu and low-k dielectric, the latter having inferior mechanical properties relative to SiO2. The decoupled region extends over all chips on the wafer. It may also extend into the edgeseal or dicing channel region so as to allow chip dicing and retention of this mechanical decoupling all around every chip on the wafer.

Abstract: Organic polymers for use in electronic devices, wherein the polymer includes repeat units of the formula: wherein: each R1 is independently H, an aryl group, Cl, Br, I, or an organic group that includes a crosslinkable group; each R2 is independently H, an aryl group or R4; each R3 is independently H or methyl; each R5 is independently an alkyl group, a halogen, or R4; each R4 is independently an organic group that includes at least one CN group and has a molecular weight of about 30 to about 200 per CN group; and n=0–3; with the proviso that at least one repeat unit in the polymer includes an R4. These polymers are useful in electronic devices such as organic thin film transistors.

Abstract: A field effect transistor having a high field effect mobility is provided which can be obtained by a simple method. The field effect transistor includes an organic semiconductor layer composed of a crystallized film of a naphthoporphyrin compound represented by formula (2), which is obtained by the conversion by heating of the coating film of a porphyrin compound represented by formula (1), the organic semiconductor layer having crystal grains with a maximum diameter of 1 ?m or more, wherein R1 and R2 each independently denote at least one selected from the group consisting of hydrogen, halogen, hydroxyl, and alkyl having 1 to 12 carbon atoms; R3 denotes at least one selected from the group consisting of a hydrogen atom and an aryl group; and M denotes two hydrogen atoms, a metal atom or a metal oxide.

Abstract: The present invention provides a method for preparing a silicon substrate and a silicon substrate having a silicon surface comprising a pattern of covalently bound monolayers. Each of the monolayers comprises an alkyne, wherein at least a portion of each monolayer is no more than about 5 molecules of the alkyne wide.

Abstract: Method of manufacturing a semiconducting organic laminated structure, for use in an electronic circuit, in particular a logic and/or memory circuit, wherein a substrate is coated with a solution or dispersion containing a small proportion of an organic composite and having a certain wet-layer thickness, which by drying is converted into an organic thin layer with semiconducting properties that adheres to the substrate and has a dry-layer thickness substantially less than the wet-layer thickness, in particular by an order of magnitude or more, the drying being accomplished by brief irradiation with electromagnetic radiation that has its main effective component in the near-infrared range, in particular in the region between 0.8 and 1.5 ?m.

Abstract: Dielectric compositions comprised of porous polymeric matrices are prepared using nitrogen-containing polymers as pore-generating agents. The compositions are useful in the manufacture of electronic devices such as integrated circuit devices and integrated circuit packaging devices. The dielectric compositions are prepared by admixing a polymeric nitrogenous porogen with a high temperature, thermosetting host polymer in a suitable solvent, heating the admixture to cure the polymer and provide a vitrified matrix, and then decomposing the porogen using heat, radiation, or a chemical reagent effective to degrade the porogen. The highly porous dielectric materials so prepared have an exceptionally low dielectric constant on the order of 2.5 or less, preferably less than about 2.0. Integrated circuit devices and integrated circuit packaging devices manufactured so as to contain the dielectric material of the invention are provided as well.

Abstract: The present invention provides an organic semiconductor element in which the insulation strength of the insulation layer and the carrier mobility of the organic semiconductor are both high. The semiconductor layer is an organic semiconductor element consisting of an organic compound. A gate oxide film consisting of an oxide of the gate electrode material is provided between the gate electrode and the gate insulation layer. The gate insulation layer consists of an organic compound.

Abstract: The invention relates to compounds having a core-shell structure, to a process for preparing them and to their use as semiconductors in electronic components.

Abstract: There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and is composed of a mixture of controlled porosity glass (CPG) particles having an average particle size of from about 0.25 to about 25 microns, and a thickening agent.

Abstract: A transfer material comprising an organic thin film uniformly provided by a wet method, etc. with high productivity is used to efficiently produce an organic thin film device such as an organic EL device excellent in light-emitting efficiency, uniformity of light emission and durability.

Abstract: A siloxane-based resin having a novel structure and a semiconductor interlayer insulating film using the same. The siloxane-based resins have a low dielectric constant in addition to excellent mechanical properties and are useful materials in an insulating film between interconnect layers of a semiconductor device.

Abstract: An electrical interconnect structure on a substrate, which includes: a first low-k dielectric layer; a spin-on low k CMP protective layer that is covalently bonded to the first low-k dielectric layer; and a CVD deposited hardmask/CMP polish stop layer is provided. Electrical vias and lines can be formed in the first low k dielectric layer. The spin-on low k CMP protective layer prevents damage to the low k dielectric which can be created due to non-uniformity in the CMP process from center to edge or in areas of varying metal density. The thickness of the low-k CMP protective layer can be adjusted to accommodate larger variations in the CMP process without significantly impacting the effective dielectric constant of the structure.

Abstract: A first insulation film is made of a silicon material and is provided on a semiconductor base. A second insulation film is made of an organic material and is provided on the first insulation film. The second insulation film is thicker than the first insulation film. A third insulation film is thinner than the second insulation film and is provided on the second insulation film. The third insulation film is made of a silicon material and has a moisture resistance property. A fourth insulation film is made of an organic material. The fourth insulation film is provided on the third insulation film to prevent a damage on the third insulation film. A wiring layer is provided on the fourth insulation film.

Abstract: Organic electronic devices are fabricated by a process includes forming an organic layer including: placing a first liquid composition over a first portion of a surface of a substrate without a well structure connected to or adjacent the first portion of the surface of the substrate, i) the first portion of the surface of the substrate has a first surface energy, ii) the first liquid composition includes a first liquid medium and iii) the first liquid composition has a second surface energy that is higher than the first surface energy; and evaporating the first liquid medium while the first liquid composition overlies the first portion of the surface of the substrate.

Abstract: According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated on base oxide layer. The bipolar transistor further comprises a conformal layer situated over the sacrificial post and top surface of the base, where the conformal layer has a density greater than a density of base oxide layer. The conformal layer may be, for example, HDPCVD oxide. According to this exemplary embodiment, the bipolar transistor further comprises a sacrificial planarizing layer situated over the conformal layer. The sacrificial planarizing layer has a first thickness in a first region between first and second link spacers and a second thickness in a second region outside of first and second link spacers, where the second thickness is generally greater than the first thickness.

Abstract: An integrated circuit is provided comprising a substrate and discrete areas of electrically insulating and electrically conductive material, wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm3 or more and a dielectric constant of 3.0 or less. The integrated circuit can be made by a method comprising: providing a substrate; forming discrete areas of electrically insulating and electrically conductive material on the substrate; wherein the electrically insulating material is deposited on the substrate followed by heating at a temperature of 350° C. or less; and wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm3 or more after densification. Also disclosed is a method for making an integrated circuit comprising performing a dual damascene method with an electrically conductive material and a dielectric, the dielectric being a directly photopatterned hybrid organic-inorganic material.

Abstract: Provided is a display panel comprised of a white color organic luminescent element and a color filter for full color implementation, wherein a substrate in which an organic luminescent element is formed and a color filter are assembled and fixed to face each other with an adhesive pattern therebetween, and liquid oil is filled between the color filter and the substrate inside of the adhesive pattern so as to block external moisture or oxygen, so that deterioration of luminous characteristics due to the external moisture or oxygen may be prevented by encapsulating the organic luminescent element and the color filter with the liquid oil, which leads to enhance reliability and stability of the element, and also allows the encapsulation process to be performed with relatively simple steps and low cost.

Abstract: A semiconductor integrated circuit device includes: Si substrate; multilevel interconnect layer formed on the Si substrate; and dielectric layer formed on the multilevel interconnect layer. External-component-connecting wire, ordinary wire, fuse wire, stepper alignment mark, and target mark are formed out of an identical copper film in the uppermost metal layer. External-component-connecting pad electrode, testing-processing alignment mark, and stepper alignment mark are formed out of an identical aluminum alloy film on the dielectric film. In laser-machining the fuse wire, alignment using the target mark formed in the metal layer including the fuse wire reduces alignment errors caused from the machining.

Abstract: An electrical assembly which includes a circuitized substrate comprised of an organic dielectric material having a first electrically conductive pattern thereon. At least part of the dielectric layer and pattern form the first, base portion of an organic memory device, the remaining portion being a second, polymer layer formed over the part of the pattern and a second conductive circuit formed on the polymer layer. A second dielectric layer if formed over the second conductive circuit and first circuit pattern to enclose the organic memory device. The device is electrically coupled to a first electrical component through the second dielectric layer and this first electrical component is electrically coupled to a second electrical component. A method of making the electrical assembly is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.