With Window Means Patents (Class 257/680)
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Publication number: 20090039489Abstract: A method and apparatus for constructing MEMS devices is provided which employs a low cost molded housing that simultaneously provides precise and accurate alignment, mechanical protection, electrical connections and structural integrity for mounting optical and MEMS components. The package includes a MEMS die mounting surface, an optical component mounting surface and an optical imaging window monolithically fabricated with the MEMS die mounting surface in a predetermined orientation for providing alignment between the MEMS die and optical components. A MEMS adaptor plate is provided to facilitate connections of a MEMS die to external components.Type: ApplicationFiled: March 28, 2008Publication date: February 12, 2009Inventors: Albert Ting, Daniel T. McCormick, Michael Rattner
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Patent number: 7489027Abstract: A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semiconductor device 14 disposed on the second surface of the wiring substrate 11 and having a connection terminal 14a connected to the flat type external connection terminal 12a, a molding resin 15 for coating the semiconductor device 14 on the second surface of the wiring substrate 11, a card type supporting frame 10a having a concave portion or a hole portion fitting the wiring substrate 11, the semiconductor device 14, and the molding resin 15 in such a manner that the flat type external connection terminal 12a is exposed to the first surface of the wiring substrate 11, and adhesive resin a adhering integrally the flat type external connection terminal 12a, the wiring substrate 11, the semiconductor device 14, the molding resin 15, and the card type supporting frame 10a.Type: GrantFiled: January 4, 2008Date of Patent: February 10, 2009Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshi Iwasaki
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Publication number: 20090032925Abstract: In a package including an image sensor die with an interconnect extending therethrough, a cover allowing light to pass is coupled to the die using at least one solder ball and a corresponding number of pads on each of the cover and die. Such pads are added to the cover despite the die's interconnect allowing contact with external devices at a location distal from the cover. The solder balls help govern the parallel orientation (or an alternate orientation) between the die and the cover. In addition, connectors other than solder balls may be used; multi-layered covers with connectors between the layers may be used; and packages other than imagers may be assembled.Type: ApplicationFiled: July 31, 2007Publication date: February 5, 2009Inventor: Luke G. England
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Publication number: 20090032924Abstract: A method for manufacturing a cover assembly including a transparent window portion and a frame of gas-impervious material that can be hermetically attached to a micro-device package base to form a hermetically sealed micro-device package. First a frame of gas-impervious material is provided the frame having a continuous sidewall defining a frame aperture there through. The sidewall includes a frame seal-ring area circumscribing the frame aperture. A sheet of a transparent material is also provided, the sheet having a window portion defined thereupon. The window portion has finished top and bottom surfaces. A sheet seal-ring area is prepared on the sheet, the sheet seal-ring area circumscribing the window portion. The frame is positioned against the sheet such that at least a portion of the frame seal-ring area and at least a portion of the sheet seal-ring area contact one another along a continuous junction region that circumscribes the window portion.Type: ApplicationFiled: July 3, 2007Publication date: February 5, 2009Inventor: DAVID H. STARK
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Patent number: 7485899Abstract: A semiconductor package having an optical device and the method of making the same, includes a transparent substrate, a chip, an optical device and a carrier substrate. The transparent substrate has a plurality of first contacts and second contacts, wherein the first contacts are electrically connected to the second contacts. The chip is connected to the transparent substrate and forms a gap therebetween. The chip has a plurality of third contacts that are electrically connected to the first contacts. The optical device is disposed in the gap. The carrier substrate has a receiving space and a plurality of fourth contacts, wherein the receiving space accommodates the chip and the optical device, and the fourth contacts are electrically connected to the second contacts of the transparent substrate. Therefore, no connecting wires are needed and the step of wire bonding is omitted. Also, only one transparent substrate is used in the semiconductor package.Type: GrantFiled: October 2, 2006Date of Patent: February 3, 2009Assignee: Advanced Semiconductor Engineering, Inc.Inventor: Cheng-Wei Huang
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Publication number: 20090026558Abstract: A semiconductor sensor device and method is disclosed. In one embodiment, the semiconductor device includes a cavity housing and a sensor chip. In one embodiment, the cavity housing has an opening to the surroundings. The sensor region of the sensor chip faces said opening. The sensor chip is mechanically decoupled from the cavity housing. In one embodiment, the sensor chip is embedded into a rubber-elastic composition on all sides in the cavity of the cavity housing.Type: ApplicationFiled: August 18, 2005Publication date: January 29, 2009Applicant: INFINEON TECHNOLOGIES AGInventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober
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Patent number: 7482682Abstract: In one embodiment, a package for a micro-device includes a substrate, a transparent material covering the substrate, and a bond ring bonding the transparent material to the substrate. The bond ring comprises a silicon oxide layer on one of the substrate or the transparent material bonded to a silicon layer on the other of the substrate or the transparent material.Type: GrantFiled: April 12, 2005Date of Patent: January 27, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Chien-Hua Chen, Henry Kang, Bradley Charles John
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Publication number: 20090014856Abstract: A sealable microelectronic device providing mechanical stress endurance which includes a semiconductor substrate. A substantially continuous sealing element is positioned adjacent an outer periphery and between a microelectronic component and the semiconductor substrate, or another microelectronic component. The sealing element seals the microelectronic component to the substrate or another microelectronic component, and provides structural support to the microelectronic device.Type: ApplicationFiled: July 10, 2007Publication date: January 15, 2009Applicant: International Business Machine CorporationInventor: John U. Knickerbocker
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Patent number: 7476961Abstract: An improved method for fabricating a window frame/window piece assembly is disclosed in this application. A window frame having an opening in its inner portion is provided. According to one aspect, the window frame can be formed from a unitary piece of sheet metal. A transparent piece is attached to the inner portion of the window frame through a molding process. According to one embodiment, the window frame is placed within a mold such that the inner portion of the window frame projects into an inner cavity inside the mold. After the mold has been closed, a transparent material is injected into the inner cavity so that it bonds with the inner portion of the window frame. After the bond of between the transparent material and the window frame is set, the window frame/window piece assembly is removed from the mold. According to another embodiment, a plurality of window frames may be loaded into a single mold so that a plurality of window frame/window piece assemblies can be fabricated in a single batch.Type: GrantFiled: January 16, 2007Date of Patent: January 13, 2009Assignee: Texas Instruments IncorporatedInventors: Bradley M. Haskett, John Patrick O'Connor, Jwei Wien Liu
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Patent number: 7476955Abstract: A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one edge of the transparent element to the other edge. A third embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches. A fourth embodiment has a transparent element with an adhesive flow restriction area formed as a protuberance. A fifth embodiment comprises a trench in the die. A sixth embodiment has a die with a plurality of trenches in the die as an adhesive flow restriction area. A seventh embodiment has a die with a protuberance.Type: GrantFiled: January 6, 2004Date of Patent: January 13, 2009Assignee: Micron Technology, Inc.Inventors: Bret K. Street, James M. Derderian, Jeremy E. Minnich
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Publication number: 20090001490Abstract: An optoelectronic component emitting electromagnetic radiation, comprising a housing body which has a cavity, the cavity being fashioned trenchlike and in the cavity a plurality of semiconductor chips being arranged in a linear arrangement. Two neighboring semiconductor chips have a distance from one another which is less than or equal to one-and-a-half lateral edge lengths of the semiconductor chips and greater than or equal to 0 ?m. In addition, an illumination module comprising such a component is disclosed.Type: ApplicationFiled: July 21, 2005Publication date: January 1, 2009Inventors: Georg Bogner, Moritz Engl, Stefan Grotsch, Patrick Kromotis
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Patent number: 7470904Abstract: Systems and methods for providing a sealed container having a reduced pressure atmosphere are disclosed. The container is suitable for housing an infrared detector array. Outgassing can be enhanced by adding features to solder preforms that maintain pathways for gasses to more readily exit the container prior to sealing thereof. Getters can be used to mitigate undesirable gases within the sealed container. One or more bolometers can be used to determine if the sealed container is leaking. A vacuum positioning fixture can be used to assemble the components of the infrared detector assembly and to place the infrared detector assemblies into a vacuum chamber. The cost of manufacturing such infrared detector assemblies may be reduced and the reliability thereof enhanced.Type: GrantFiled: March 20, 2006Date of Patent: December 30, 2008Assignee: Flir Systems, Inc.Inventors: Paul Schweikert, William J. Parrish, Andrew Sharpe, Vu L. Nguyen, Marco Scussat
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Patent number: 7468286Abstract: A system and method for holding optoelectronic packages may be used to secure one or more optoelectronic packages for mounting one or more components at a mounting angle (i.e., an intermediate angle between 0° and 90°). The system may include one or more fixtures configured to pivot from a non-angled position to a single fixed angled position. According to exemplary embodiments, fixtures may be configured to secure a TO can type package while one or more components, such as photodetectors, are mounted to the TO can type package, for example, by bonding. The TO can type package may be a TO can laser package including a monitor photodetector or a TO can photodetector package. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.Type: GrantFiled: October 4, 2007Date of Patent: December 23, 2008Assignee: Applied Optoelectronics, Inc.Inventors: Kai-Sheng Lin, Chian-Hung Chen, Limin Chen
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Patent number: 7468293Abstract: In a method for the production of window elements which can be soldered into a housing in a hermetically tight manner and of a window element sealing a housing, the object of the invention is to achieve an improved hermetic sealing between window and housing through increased adherence and homogeneity in the metal coating and to prevent penetration of scattered light and unwanted radiation. Optically transparent, flat substrate material whose size is sufficient for a plurality of window elements is provided on at least one surface with an optical coating from which frame-like portions on a coated surface which enclose optically active surfaces of the window elements are subsequently removed, whereupon a metal coating that is used for producing a solder connection to the housing is applied to the generated portions having no coating, and the window elements are separated from the substrate material.Type: GrantFiled: May 25, 2006Date of Patent: December 23, 2008Assignee: Jenoptik Laser, Optik, Systeme GmbHInventors: Thomas Weyh, Elvira Gittler, Wolfgang Brode
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Patent number: 7466018Abstract: A method and system in which a semiconductor wafer having a plurality of dies is inspected through a visual inspection and/or an electrical test. If certain of the dies on the wafer pass the inspection, then windows are mounted or affixed above those certain dies while they are still a part of the wafer.Type: GrantFiled: June 4, 2007Date of Patent: December 16, 2008Assignee: Texas Instruments IncorporatedInventors: Thomas A. Kocian, Richard L. Knipe, Mark H. Strumpell
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Patent number: 7466015Abstract: A supporting frame is used to solidly bridge to the two metallic contacts of a surface mount diode chip. Any bending or twisting stress between the two contacts is borne by the supporting frame instead of the diode chip. Otherwise the stress may damage the diode chip. wherein said supporting forms a cantilever over said first metallic contact and the overhanging end of the cantilever is glued to said second metallic contact.Type: GrantFiled: December 11, 2006Date of Patent: December 16, 2008Inventor: Jiahn-Chang Wu
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Interconnect structures with surfaces roughness improving liner and methods for fabricating the same
Patent number: 7466027Abstract: Interconnect structures are provided. An exemplary embodiment of an interconnect structure comprises a substrate with a low-k dielectric layer thereon. A via opening and a trench opening are formed in the low-k dielectric layer, wherein the trench opening is formed over the via opening and the via opening exposes a portion of the substrate. A liner layer is formed on sidewalls of the low-k dielectric layer exposed by the trench and via protions and a bottom surface exposed by the trench via portion, wherein the portion of the liner layer on sidewalls of the low-k dielectric layer exposed by the trench and via protions and the portion of the liner layer formed on a bottom surface exposed by the trench portion comprise different materials. A conformal conductive barrier layer is formed in the trench and via openings, covering the liner layer and the exposed portion of the substrate. A conductive layer is formed on the conductive barrier layer, filling in the trench and via openings.Type: GrantFiled: September 13, 2006Date of Patent: December 16, 2008Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Chi Ko, Keng-Chu Lin, Chia-Cheng Chou -
Publication number: 20080303129Abstract: The invention is directed a patterned contact sheet and to a method of bonding a cover wafer to an interposer wafer using the patterned contact sheet having a waffle-like pattern of a plurality of ridges and plurality of wells to form a cover/interposer combination or unit that can be bonded to a substrate having a MEMs device thereon, the cover wafer, interposer wafer and substrate together forming a protective packaging for the MEMS. Use of the patterned contact sheet results fewer defects on the window area (the critical area) through which light is transmitted. Surprisingly, use of the patterned contact sheet also results in windows having improved flatness relative to windows made using an unpatterned contact sheet.Type: ApplicationFiled: July 25, 2007Publication date: December 11, 2008Inventors: Qing Ya ( Michael) Wang, Junhong Zhang
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Publication number: 20080290489Abstract: A package structure and an electronic device using the same are provided. The package structure includes a chip module and a cover. The chip module covered by the cover is used for receiving a first signal. The chip module includes a substrate, a heat sink and a first chip. The substrate has a first surface, a second surface and an opening. The first surface is opposite to the second surface. The opening penetrates the first surface and the second surface. The heat sink is disposed on the first surface of the substrate and covers the opening. The first chip is disposed on the heat sink and is positioned inside the opening. A bottom surface of the first chip flatly contacts the heat sink. The cover has a window element. The first signal passes through the window element to contact with the chip module.Type: ApplicationFiled: March 27, 2008Publication date: November 27, 2008Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Mi-Cheng Cheng, Kuo-Hua Chen
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Publication number: 20080290439Abstract: An optical device includes a metal film that has a first plane and a second plane electrically connected to the first plane. For example, the second plane is integrally formed with the first plane. The second plane is arranged at an obtuse angle ? (90°<?<180°) with respect to the first plane. An optical semiconductor chip is mounted on the second plane of the metal film, and a light-transmitting sealing material seals the optical semiconductor chip. The light-transmitting sealing material has the metal film provided on a surface thereof.Type: ApplicationFiled: April 18, 2008Publication date: November 27, 2008Applicant: Stanley Electric Co., Ltd.Inventor: Iwao Shoji
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Publication number: 20080283988Abstract: A package of microelectromechanical system (MEMS) microphone is suitable for being mounted on a printed circuit board. The package has a cover and at least one MEMS microphone. The cover has an inner surface and a conductive trace disposed thereon. The MEMS microphone is mounted on the inner surface of the cover and electrically connected to the conductive trace, and has an acoustic pressure receiving surface. When the cover is mounted on the printed circuit board, the cover and the printed circuit board construct an acoustic housing which has at least one acoustic hole passing through the cover or the printed circuit board, and the conductive trace on the inner surface of the cover is electrically connected to the printed circuit board.Type: ApplicationFiled: October 11, 2007Publication date: November 20, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chao-Ta Huang, Hsin-Tang Chien
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Publication number: 20080272474Abstract: An apparatus for implementing integrated circuit cooling during testing and image-based analysis thereof includes a lid configured to define a cavity surrounding an integrated circuit die, the die mounted to a module substrate. One or more fluid passages are defined within the lid, wherein the passages facilitate the flow of a cooling liquid through said cavity and over the integrated circuit die, and a transparent window is formed within the lid so as to facilitate viewing of the integrated circuit die.Type: ApplicationFiled: July 17, 2008Publication date: November 6, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick J. McGinnis, Darrell L. Miles, Richard W. Oldrey, John D. Sylvestri, Manuel J. Villalobos
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Publication number: 20080272473Abstract: The present invention provides an optical device (2) including: a substrate (1) having a resin base (11) provided with an opening, a plurality of conductors (13) embedded in the resin base (11) such that at least parts of the plurality of conductors (13) are exposed on a lower face of the resin base (11) as electrode terminals, and a transparent member (12) fitted into the opening of the resin base (11); and an optical element (31) having an optical region (32) on an upper face thereof and which is mounted to a lower face of the substrate (11) so that the optical region (32) opposes the opening of the resin base (11), wherein the substrate (11) has a rectangular tabular shape whose thickness is substantially even.Type: ApplicationFiled: April 18, 2008Publication date: November 6, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Katsuyoshi Matsumoto, Tetsushi NISHIO
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Publication number: 20080272385Abstract: A light emitting diode includes a base, a light emitting chip, and a wavelength converting layer. The base is formed with a recessed portion that has a bottom wall surface, and a sidewall surface extending upwardly from the bottom wall surface and cooperating with the bottom wall surface to define a receiving space. The light emitting chip is provided on the bottom wall surface of the receiving space, and has a top chip surface disposed below a top surface of the base, and a peripheral chip surface extending downwardly from the top chip surface and being substantially parallel to and forming a gap with the side wall surface of the recessed portion. The wavelength converting layer is filled in the receiving space in the recessed portion so as to cover the top chip surface and the peripheral chip surface of the light emitting chip.Type: ApplicationFiled: July 23, 2007Publication date: November 6, 2008Inventors: Chia-Hao Wu, Tien-Yu Lee
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Publication number: 20080265388Abstract: An ultra thin image sensing chip package includes an image sensing chip and a flexible and optically transparent film. The chip has an image sensor and a plurality of electrical conductive pads. The flexible and optically transparent film includes a transparent window, and a pattern of conductors formed on a surface thereof and around the transparent window. The film wraps the chip in such a way that the transparent window thereof corresponds to the image sensor of the chip, a sealed space is formed between the transparent window and the image sensor, one end of each of the conductors of the film bonds to each of the electrical conductive pads of the chip, and the other end of each of the conductors of the film is opened so as to electrically connect with other electrical elements.Type: ApplicationFiled: March 25, 2008Publication date: October 30, 2008Inventors: Jin-Chyuan BIAR, Chih-Kung Huang
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Patent number: 7443017Abstract: A package for containing microelectromechanical devices includes a first substrate wafer, and a second substrate wafer made of an optical quality material. An underbump is interposed between the first and second substrate wafers. The underbump is composed of a standoff region and a localized bond region. The first and second substrate wafers and the underbump define a chamber that contains at least one microelectronic device.Type: GrantFiled: June 6, 2006Date of Patent: October 28, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Charles C. Haluzak, Martha A. Truninger, Donald L. Michael
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Patent number: 7443038Abstract: The present invention provides flip-chip packaging for optically interactive devices such as image sensors and methods of assembly. In a first embodiment of the invention, conductive traces are formed directly on the second surface of a transparent substrate and an image sensor chip is bonded to the conductive traces. Discrete conductive elements are attached to the conductive traces and extend below a back surface of the image sensor chip. In a second embodiment, a secondary substrate having conductive traces formed thereon is secured to the transparent substrate. In a third embodiment, a backing cap having a full array of attachment pads is attached to the transparent substrate of the first embodiment or the secondary substrate of the second embodiment. In a fourth embodiment, the secondary substrate is a flex circuit having a mounting portion secured to the second surface of the transparent substrate and a backing portion bent over adjacent to the back surface of the image sensor chip.Type: GrantFiled: June 14, 2005Date of Patent: October 28, 2008Assignee: Micron Technology, Inc.Inventor: Larry D. Kinsman
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Patent number: 7436002Abstract: A radiation-emitting surface-mountable component has a light-emitting diode chip mounted on a leadframe. A molding material encapsulates the leadframe and the light-emitting diode chip.Type: GrantFiled: December 29, 2003Date of Patent: October 14, 2008Assignee: Osram GmbHInventors: Herbert Brunner, Klaus Höhn, Harald Jäger, Josef Schmid
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Patent number: 7436053Abstract: An optical device includes a base, an optical element chip attached to the base, an integrated circuit chip attached onto the back surface of the optical element chip, and a translucent member (window member). A wire is buried within the base, and the wire has an internal terminal portion, an external terminal portion, and a midpoint terminal portion. A pad electrode of the optical element chip is connected to the internal terminal portion through a bump, and a pad electrode of the integrated circuit chip is connected to the midpoint terminal portion through a fine metal wire.Type: GrantFiled: April 11, 2005Date of Patent: October 14, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masanori Minamio, Toshiyuki Fukuda
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Patent number: 7436069Abstract: The layout density of the through electrodes in the horizontal plane of the substrate is enhanced. Through holes 103 extending through the silicon substrate 101 is provided. An insulating film 105 is buried within the through hole 103. A plurality of columnar through plugs 107 are provided in the insulating film 105.Type: GrantFiled: December 1, 2005Date of Patent: October 14, 2008Assignee: NEC Electronics CorporationInventor: Satoshi Matsui
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Patent number: 7429784Abstract: A package structure is provided herein. The package structure includes a first substrate and a second substrate. A first seal ring having a first height is disposed around a predetermined area of the first substrate and between the first and second substrates. A second seal ring having a second height is disposed on the first substrate and around the first seal ring. A sealant is provided between the first and second seal rings to seal up the package structure.Type: GrantFiled: January 25, 2007Date of Patent: September 30, 2008Assignee: Advanced Semiconductor Engineering, Inc.Inventor: Cheng Wei Huang
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Patent number: 7427784Abstract: A light emitting diode (LED) package unit, including a substrate having a concave, a LED chip, at least two electrodes, at least two wires, a gel and a first wavelength-converting material. The LED chip, disposed in the concave, including a top-face, a bottom-face for jointing with the substrate, and at least two chip-electrodes. The LED chip emits light of a first wavelength. The electrodes are disposed on the substrate. The wires are respectively connecting one of the chip-electrode with one of the electrode. The gel is disposed to seal the LED chip and the wires. The first wavelength-converting material including Sr—Si—O—N:Eu is doped within the gel. The first wavelength-converting material absorbs light of the first wavelength and emits light of a second wavelength longer than the first wavelength.Type: GrantFiled: July 31, 2006Date of Patent: September 23, 2008Assignee: Lustrous Technology Ltd.Inventors: Chia-Chi Liu, Wei-Yuan Cheng
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Patent number: 7427805Abstract: An LED chip package body includes an LED chip having a pad-installed surface, a plurality of pads installed on the pad-installed surface and a rear surface formed on an opposite side of the pad-installed surface. A light-reflecting coating is disposed on the pad-installed surface and has a plurality of exposed holes for exposure of the corresponding pads. A first insulative layer is formed on the light-reflecting coating and has a plurality of through holes communicating with the corresponding exposed holes. A second insulative layer is disposed on the rear surface and has a central through hole for exposure of a central portion of the rear surface. A lens is received in the central through hole. Each of a plurality of external connected conductive bodies is electrically connected to the corresponding pad and projects out of the corresponding through hole in the first insulative layer.Type: GrantFiled: September 21, 2004Date of Patent: September 23, 2008Inventor: Yu-Nung Shen
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Publication number: 20080224192Abstract: An imager device is disclosed which includes at least one photosensitive element positioned on a front surface of a substrate and a conductive structure extending at least partially through an opening defined in the substrate to conductively couple to an electrical contact or bond pad on the first surface. An insulating material of a conductive laminate film and/or a mold compound material is positioned within the opening between at least a portion of the conductive structure and the substrate. Also disclosed is a device that comprises a substrate and a plurality of openings in the substrate, wherein each of the openings is adapted to be positioned above an imager device when the substrate is positioned above and secured to an imager substrate. A method of forming an imager device is also disclosed.Type: ApplicationFiled: March 14, 2007Publication date: September 18, 2008Inventors: Luke England, Larry Kinsman
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Patent number: 7425758Abstract: Chip-scale packages and assemblies thereof and methods of fabricating such packages including Chip-On-Board, Board-On-Chip, and vertically stacked Package-On-Package modules are disclosed. The chip-scale package includes a core member of a metal or alloy having a recess for at least partially receiving a die therein and includes at least one flange member partially folded over another portion of the core member. Conductive traces extend from one side of the package over the at least one flange member to an opposing side of the package. Systems including the chip-scale packages and assemblies are also disclosed.Type: GrantFiled: August 28, 2006Date of Patent: September 16, 2008Assignee: Micron Technology, Inc.Inventors: David J. Corisis, Chin Hui Chong, Choon Kuan Lee
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Patent number: 7423334Abstract: An image sensor module with a protection layer and a method for manufacturing the same includes a substrate with an upper surface and a lower surface, a chip is mounted on the upper surface of the substrate, a plurality of wires are electrically connected the bonding pads of the chip to the first electrodes of the substrate, a adhered layer is coated on the upper surface of the substrate, a lens holder has a lateral wall, a protection layer and internal thread, the lateral wall is adhered on the upper surface of the substrate by the adhered layer to encapsulate the chip, so that the protection layer is located on adjacent the sensor region of the chip to prevent adhered layer flowed to the sensor region of the chip; and a lens barrel is formed with external thread screwed on the internal thread of the lens holder.Type: GrantFiled: November 17, 2005Date of Patent: September 9, 2008Assignee: Kingpak Technology Inc.Inventors: Hsiu Wen Tu, Chen Pin Peng, Mon Nan Ho, Chung Hsien Hsin
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Patent number: 7423333Abstract: A cerdip type of solid-state image sensing device includes a base on which photoelectric transfer devices are arranged in line along a main scanning direction, a sealed glass disposed on the base for fixing a lead frame, a wind frame disposed on the sealed glass, a transparent cover glass disposed on the wind frame, and a gripped surface for gripping the cerdip type of solid-state image sensing device.Type: GrantFiled: January 25, 2005Date of Patent: September 9, 2008Assignee: Ricoh Company, Ltd.Inventor: Yoshihiro Morii
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Patent number: 7423335Abstract: An image sensor multi-chips package structure, includes a first package including a first chip with image sensors having first bonding pads and micro lens on a first active surface, a first die receiving window and first conductive inter-connecting through holes penetrated from a first upper contact pads on a first upper surface of the first chip to a first lower contact pads on a first lower surface of the first chip, wherein a first upper build up layer on the active surface of the first chip coupling from the first bonding pads to the first upper contact pads; a second package comprising a second chip having second bonding pads on a second active surface, a second die receiving window and second conductive inter-connecting through holes penetrated from a second upper contact pads of a second upper surface of the second chip to a second lower contact pads on a second lower surface of the second chip, wherein a second upper build up layers on the second upper surface for coupling from the second bonding padsType: GrantFiled: December 11, 2007Date of Patent: September 9, 2008Assignee: Advanced Chip Engineering Technology Inc.Inventors: Wen-Kun Yang, Jui-Hsien Chang
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Publication number: 20080211075Abstract: A structure of semiconductor device package having inter-adhesion with gap comprising: a chip with bonding pads and a sensor area embedded into a substrate with die window and inter-connecting through holes, wherein a RDL is formed over the substrate for coupling between the bonding pads and the inter-connecting through holes; a multiple rings (dam bar) formed over the substrate, the RDL, and the bonding pads area except the sensor area; an adhesive glues fill into the space of the multiple ring except the sensor area; and a transparency material bonded on the top of the multiple ring and the adhesive glues, wherein the adhesive glues adhesion between the transparency material and the multiple rings.Type: ApplicationFiled: December 5, 2007Publication date: September 4, 2008Inventors: Wen-Kun Yang, Jui-Hsien Chang, Hsien-Wen Hsu, Diann-Fang Lin
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Patent number: 7420754Abstract: An optical module includes: an optical element; a support member for supporting the optical element; a lid member that seals the optical element with respect to the support member; a sealing member that is provided to bond the lid member with the supporting member; and a case with a lens provided such that the lens is disposed on an optical path of light oscillated by the optical element, wherein the case with the lens is opposed in an optical axis direction of light passing through the lens to and in contact with the supporting member.Type: GrantFiled: January 25, 2007Date of Patent: September 2, 2008Assignee: Seiko Epson CorporationInventor: Kimio Nagasaka
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Patent number: 7417327Abstract: An IC (integrated circuit) chip package includes a substrate (2), a chip (3), a plurality of bonding wires (32), and a cover (5). The substrate has a top surface, a bottom surface, a receiving chamber (23) defined therein, a plurality of solder pads (24) arranged around the top surface and the bottom surface, and a plurality of vias (25) having conductive material electrically connecting the top solder pads with the bottom solder pads defined therein. The chip is mounted in the receiving chamber, and has a plurality of chip solder pads arranged around a top surface thereof. The bonding wires respectively electrically connect the top solder pads of the substrate with the chip solder pads. The cover is fastened to the top surface of the substrate to cover the opening, and has a smaller profile than that of the substrate, thereby not cover a peripheral area of the top surface.Type: GrantFiled: October 31, 2005Date of Patent: August 26, 2008Assignee: Altus Technology Inc.Inventors: Steven Webster, Ying-Cheng Wu, Kun-Hsieh Liu, Po-Chih Hsu
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Publication number: 20080191333Abstract: The present invention provides a structure of package comprising a substrate with a die through hole and a contact through holes structure formed there through, wherein a terminal pad is formed under the contact through hole structure and a contact pad is formed on a upper surface of the substrate. A die having a micro lens area is disposed within the die through hole by adhesion. A wire bonding is formed on the die and the substrate, wherein the wire bonding is coupled to the die and the contact pad. A protective layer is formed to cover the wire bonding. A transparent cover is disposed on the die within the die through hole by adhesion to expose the micro lens area. Conductive bumps are coupled to the terminal pads.Type: ApplicationFiled: February 8, 2007Publication date: August 14, 2008Applicant: Advanced Chip Engineering Technology Inc.Inventors: Wen-Kun Yang, Diann-Fang Lin, Jui-Hsien Chang, Tung-chuan Wang, Hsien-Wen Hsu
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Publication number: 20080191335Abstract: The present invention provides a structure of package comprising a substrate with a die through hole and a contact through holes structure formed there through, wherein a terminal pad is formed under the contact through hole structure and a contact pad is formed on a upper surface of the substrate. A die having a micro lens area is disposed within the die through hole by adhesion. A thick dielectric layer is formed on the die and the substrate except the micro lens, bonding pads and contact pads. A wire bonding is formed on the die and the substrate, wherein the wire bonding is coupled to the die and the contact pad. And core paste is filled into the gap between the die edge and the sidewall of the die through hole of the substrate. A transparent cover is disposed on the die and the thick dielectric layer by adhesion to create a gap between the transparent cover.Type: ApplicationFiled: May 30, 2007Publication date: August 14, 2008Inventors: Wen-Kun Yang, Jui-Hsien Chang, Hsien-Wen Hsu, Diann-Fang Lin
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Publication number: 20080191334Abstract: Glass dam structures for imaging device chip scale package. An optoelectronic device chip scale package comprises a substrate configured as a support structure for the chip scale package. A semiconductor die with die circuitry is attached to the substrate. A glass encapsulant is disposed on the substrate encapsulating the semiconductor die, wherein the glass encapsulant has a dam structure around an opening. A seal layer is disposed between the substrate and the dam structure bonding the two together.Type: ApplicationFiled: February 12, 2007Publication date: August 14, 2008Inventors: Hsiao-Wen Lee, Jui-Ping Weng
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Patent number: 7411284Abstract: A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semiconductor device 14 disposed on the second surface of the wiring substrate 11 and having a connection terminal 14a connected to the flat type external connection terminal 12a, a molding resin 15 for coating the semiconductor device 14 on the second surface of the wiring substrate 11, a card type supporting frame 10a having a concave portion or a hole portion fitting the wiring substrate 11, the semiconductor device 14, and the molding resin 15 in such a manner that the flat type external connection terminal 12a is exposed to the first surface of the wiring substrate 11, and adhesive resin a adhering integrally the flat type external connection terminal 12a, the wiring substrate 11, the semiconductor device 14, the molding resin 15, and the card type supporting frame 10a.Type: GrantFiled: February 3, 2006Date of Patent: August 12, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshi Iwasaki
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Patent number: 7408205Abstract: A digital camera module (200) includes a carrier (20), an image sensor chip (30), a number of wires (50), a holder (60), and a lens module (70). The carrier includes a base (21) and a leadframe (23) embedded in the base. The base includes a board (211), a sidewall (213) and a cavity (24). The leadframe includes a number of conductive leads (233) spaced from each other. Each lead has a first terminal portion (235), a second terminal portion (236), and an interconnecting portion (237) connecting the first and second terminal portions. The chip is mounted on the carrier, and has an active area (301). The wires electrically connect the chip and the leadframe. The holder is mounted to the carrier to close the cavity. The lens module is received in the holder and guides light to the active area of the chip.Type: GrantFiled: September 22, 2006Date of Patent: August 5, 2008Assignee: Altus Technology Inc.Inventors: Steven Webster, Ying-Cheng Wu
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Publication number: 20080164592Abstract: An apparatus for housing a micromechanical system includes a substrate with a surface on which the micromechanical system is formed, a transparent cover and a dry film layer arrangement between the surface of the substrate and the transparent cover. The dry film layer arrangement has an opening, so that the micromechanical system adjoins the opening.Type: ApplicationFiled: January 9, 2008Publication date: July 10, 2008Applicant: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.Inventors: Thor BAKKE, Thilo SANDNER
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Patent number: 7397125Abstract: A semiconductor device having bonding pads on a semiconductor substrate includes: an upper copper layer that is formed on the lower surface of the bonding pads with a barrier metal interposed and that has a copper area ratio that is greater than layers in which circuit interconnects are formed; and a lower copper layer that is electrically insulated from the upper copper layer and that is formed closer to the semiconductor substrate than the upper copper layer.Type: GrantFiled: January 22, 2004Date of Patent: July 8, 2008Assignee: NEC Electronics CorporationInventor: Noriaki Oda
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Patent number: 7391102Abstract: Disclosed is a semiconductor apparatus including: a first molded resin portion; a plate-shaped lead frame closely attached to the first molded resin portion; a second molded resin portion attached facing the first molded resin portion and the lead frame; and one or more elements attached on the lead frame on a side which faces the second molded resin portion, the one or more elements including a semiconductor element, wherein any part of at least one of the elements does not exist in a region composed of an aggregation of line segments, each line segment being formed by any two points on an outer periphery of the plate-shaped lead frame outside the first and second molded resin portions and all of the line segments being contained inside a board of the lead frame.Type: GrantFiled: October 12, 2004Date of Patent: June 24, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Satoshi Komoto, Hajime Okuda, Hirokazu Tanaka
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Patent number: 7388282Abstract: A micro-electro-mechanical system (MEMS) package having a hydrophobic layer is disclosed. The MEMS package includes: a base substrate, with an MEMS element provided on a surface of the base substrate; a lid, spaced apart from the MEMS element provided on the base substrate and covering the MEMS element; a side sealing member provided on a side surface of the base substrate and the surface of the lid, thus hermetically sealing the MEMS element from an external environment; and a hydrophobic layer which covers the part of the side sealing member that is exposed to the external environment, thus removing the hydrophilia from the side sealing member.Type: GrantFiled: July 12, 2005Date of Patent: June 17, 2008Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yeong Gyu Lee, Suk Kee Hong