With Window Means Patents (Class 257/680)
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Patent number: 7696885Abstract: Methods and systems of attaching a radio transceiver to an antenna. At least some of the illustrative embodiments are systems comprising an antenna and an integrated circuit configured to operate as a radio transceiver. The antenna comprises a ground plane having a first edge surface, and an active element having a second edge surface. The ground plane and the active element are retained together such that the first and second edge surfaces are substantially coplanar and form an antenna edge. The integrated circuit is configured to operate as a radio transceiver, and the integrated circuit is mechanically coupled to the edge of the antenna and electrically coupled to the active element.Type: GrantFiled: June 21, 2007Date of Patent: April 13, 2010Assignee: Round Rock Research, LLCInventor: John R Tuttle
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Patent number: 7692288Abstract: A MEMS package and methods for its embodiment are described. The MEMS package has at least one MEMS device mounted on a flexible and foldable substrate. A metal cap structure surrounds the at least one MEMS device wherein an edge surface of the metal cap structure is attached to the flexible substrate and wherein a portion of the flexible substrate is folded under itself thereby forming the MEMS package. A meshed metal environmental hole underlying the at least one MEMS device provides enhanced EMI immunity.Type: GrantFiled: January 17, 2006Date of Patent: April 6, 2010Assignee: Silicon Matrix Pte Ltd.Inventors: Wang Zhe, Miao Yubo
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Patent number: 7692207Abstract: Light-emitting devices, and related components, processes, systems and methods are disclosed.Type: GrantFiled: August 23, 2005Date of Patent: April 6, 2010Assignee: Luminus Devices, Inc.Inventors: Alexei A. Erchak, Paul Panaccione, Robert F. Karlicek, Jr., Michael Lim, Elefterios Lidorikis, Jo A. Venezia, Christian Hoepfner
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Patent number: 7687819Abstract: An optical semiconductor package includes a support with a passage to receive a ring holding a lens situated facing an optical sensor. The support has, in the passage, at least one local release recess and the ring is equipped peripherally with a locally projecting, elastically deformable element. The local release recess and the elastically deformable element are such that, when the ring occupies an angular mounting position, the locally projecting elastically deformable element is engaged in the local recess of the support and, when the ring is pivoted from the aforementioned angular mounting position, the locally projecting elastically deformable element is moved out of the recess of the support and is compressed against the wall of the passage in order to secure the ring relative to the support.Type: GrantFiled: February 3, 2009Date of Patent: March 30, 2010Assignee: STMicroelectronics S.A.Inventor: Julien Vittu
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Patent number: 7683477Abstract: A semiconductor device is disclosed. One embodiment provides a device including a carrier, an electrically insulating layer arranged over the carrier and a first semiconductor chip arranged over the electrically insulating layer, wherein the first semiconductor chip has a first contact element on a first surface and a second contact element on a second surface.Type: GrantFiled: June 26, 2007Date of Patent: March 23, 2010Assignee: Infineon Technologies AGInventor: Ralf Otremba
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Patent number: 7679156Abstract: An optical module has a circuit carrier, a housed semiconductor element placed on the circuit carrier, and a lens unit for projecting electromagnetic radiation onto the semiconductor element. The lens unit, which is constructed separate from the cased semiconductor element, preferably comprises a lens assembly formed of, for example, three lenses and of a diaphragm. The three lenses, optionally together with the diaphragm, are aligned in a well-defined manner due to their geometric design so that no additional optical adjustment is necessary. According to the invention, a support is formed, at least in sections, on the case of the semiconductor element, and the lens unit is placed thereon thus being supported. The concept is that by forming a support directly on the case of a cased semiconductor element even with classically cased semiconductor chips, it is possible to construct a camera module with which every mechanical focus setting can be eliminated.Type: GrantFiled: September 14, 2004Date of Patent: March 16, 2010Assignee: Siemens AktiengesellschaftInventors: Danut Bogdan, Josef Dirmeyer, Henryk Frenzel, Harald Schmidt
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Patent number: 7675132Abstract: A method for producing a surface mounting optoelectronic component comprises the following steps: readying a base body with the optoelectronic transmitter and/or receiver arranged in a recess of the base body, filling the recess of the base body with a transparent, curable casting compound, and placing the optical device onto the base body, whereby the optical device comes into contact with the casting compound.Type: GrantFiled: August 11, 2005Date of Patent: March 9, 2010Assignee: OSRAM GmbHInventors: Günter Waitl, Robert Lutz, Herbert Brunner
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Patent number: 7675027Abstract: A motion-detecting module includes a PCB, a light-emitting unit, and a light-sensing unit. The light-emitting unit is electrically disposed over the PCB. The light-sensing unit has a light-sensing die electrically disposed on the PCB and a package cover covered on the light-sensing die, and the package cover has a through hole corresponding to the light-sensing die and a transparent element disposed in the through hole. The present invention does not need extra package protection body of the prior art for protecting the light-sensing die during the transport of the light-sensing module. The present invention use original package cover to prevent the light-sensing die from being damaged by external force, and the original package cover shelters the light-sensing die from extra stray light.Type: GrantFiled: November 20, 2007Date of Patent: March 9, 2010Assignee: Lite-On Semiconductor Corp.Inventors: Chia-Chu Cheng, Ya-Lun Lee, Yu-Wei Lu
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Patent number: 7671434Abstract: An electronic component includes: a base a seal body fixed to the base, constituting a hermetically sealed space together with the base; and an electronic component main body attached to a metal substrate via an adhesive containing silver within the hermetically sealed space. The base has a nickel plated layer, substantially not containing phosphor, on the seal body side.Type: GrantFiled: December 11, 2006Date of Patent: March 2, 2010Assignee: Fuji Xerox Co., Ltd.Inventors: Eiichi Nagatsuka, Yasumasa Asaya, Kaoru Shida
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Publication number: 20100038764Abstract: In a method and system for fabricating a semiconductor device (100) having a package-on-package structure, a bottom laminate substrate (BLS) (130) is formed to include interconnection patterns (IP) (170, 172) coupled to a plurality of conductive bumps (PCB) (130). A top substrate (TS) (140) is formed to mount a top package (110) by forming a polyimide tape (PT) (142) affixed to a metal layer (ML) (144), and a top die (136) attached to the ML (144) on an opposite side as the PT (142). A laminate window frame (LWF) (150), which may be a part of the BLS (130), is fabricated along a periphery of the BLS (130) to form a center cavity (160). The center cavity (160) enclosed by the BLS, the LWF and the TS houses the top die (136) affixed back-to-back to a bottom die (134) that is affixed to the BLS (130). The IP (170, 172) formed in the BLS and the LWS (150) provide the electrical coupling between the ML (144), the top and bottom dies (136, 134), and the PCB (130).Type: ApplicationFiled: October 26, 2009Publication date: February 18, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Kevin Peter Lyne
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Patent number: 7663200Abstract: A packaging structure suitable for an integrated circuit device receiving short-wavelength laser light is provided. A lead-mounted substrate is placed on the side of the light receiving surface of the integrated circuit device having a photo detecting part. The lead is electrically connected with the integrated circuit device via an electrode. The integrated circuit device and the substrate are encapsulated with an encapsulation section. The substrate has an opening at a position above the photo detecting part.Type: GrantFiled: March 8, 2005Date of Patent: February 16, 2010Assignee: Panasonic CorporationInventors: Yasufumi Shirakawa, Masaki Taniguchi, Hideo Fukuda, Yuzo Shimizu, Shinya Esaki
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Patent number: 7659607Abstract: A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semiconductor device 14 disposed on the second surface of the wiring substrate 11 and having a connection terminal 14a connected to the flat type external connection terminal 12a, a molding resin 15 for coating the semiconductor device 14 on the second surface of the wiring substrate 11, a card type supporting frame 10a having a concave portion or a hole portion fitting the wiring substrate 11, the semiconductor device 14, and the molding resin 15 in such a manner that the flat type external connection terminal 12a is exposed to the first surface of the wiring substrate 11, and adhesive resin a adhering integrally the flat type external connection terminal 12a, the wiring substrate 11, the semiconductor device 14, the molding resin 15, and the card type supporting frame 10a.Type: GrantFiled: January 4, 2008Date of Patent: February 9, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshi Iwasaki
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Patent number: 7652305Abstract: A hermetically sealed package includes: a first plate including inside and outside surfaces; a second plate including inside and outside surfaces; frit material disposed on the inside surface of the second plate; and at least one dielectric layer disposed directly or indirectly on at least one of: (i) the inside surface of the first plate at least opposite to the frit material, and (ii) the inside surface of the second plate at least directly or indirectly on the frit material, wherein the frit material forms a hermetic seal against the dielectric layer in response to heating.Type: GrantFiled: February 23, 2007Date of Patent: January 26, 2010Assignee: Corning IncorporatedInventors: Dilip Kumar Chatterjee, Kelvin Nguyen
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Patent number: 7646092Abstract: A semiconductor device of the invention includes: a substrate having a hollowed hollow section on a top surface; a semiconductor chip mounted in the hollow section of the substrate; and a lid having a substantially plate-shaped top plate section that opposes the substrate and covers the hollow section, and having at least one pair of side wall sections that project from a circumference of the top plate section towards the substrate and that engage with a side surface of the substrate. The substrate and the lid can be accurately positioned.Type: GrantFiled: December 5, 2006Date of Patent: January 12, 2010Assignee: Yamaha CorporationInventors: Hiroshi Saitoh, Toshihisa Suzuki, Shingo Sakakibara
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Patent number: 7642645Abstract: Systems and methods for aligning substrates that include microstructures. The microstructures may be electronic or micromechanical components. The system includes a first substrate having a first alignment structure and a second substrate having a second alignment structure. The substrates are positioned so that the first alignment structure contacts the second alignment structure without the substrates directly contacting each other, and one of the substrates is adjusted in relation to the other substrate until the first and second alignment structures lock into place. After alignment, the microstructures on the first substrate and the second substrate may establish a connection with or be positioned in near proximity to each other.Type: GrantFiled: October 1, 2004Date of Patent: January 5, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Jurgen H. Daniel, Lars-Erik Swartz
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Patent number: 7638865Abstract: A sensor package includes an image sensing chip having a front surface, a plurality of bumps, a glass cover plate, and a connector. The plurality of bumps are formed on the front surface, and are electrically connected to the image sensing chip. The glass cover plate has a bottom surface facing the front surface, and the glass cover plate has a plurality of transparent conductive wires formed on the bottom surface. A terminal of each of the transparent conductive wires is electrically connected to a respective bump, and another terminal of each of the transparent conductive wires extends out of an orthogonal projection area of the image sensing chip on the bottom surface. The connector is electrically connected to the another terminal of each of the transparent conductive wires.Type: GrantFiled: December 27, 2007Date of Patent: December 29, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Ching-Lung Jao, Yu-Te Chou
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Patent number: 7638864Abstract: A digital camera module (100) includes a chip package (110) and a lens module (130), mounted on the chip package, for forming a focused image on the chip package. The chip package includes a supporter (112), a chip (114), a plurality of wires (116), a main adhesive (118), and a cover plate (119). The supporter includes a through hole defined therethrough and has a plurality of top contacts (1130) formed thereon around the through hole. The chip is disposed in the through hole and includes a plurality of pads (1144) arranged thereon. The wires electrically connect the pads to the top contacts. The main adhesive is applied to a gap between the chip and the supporter and fixes the chip to the supporter. The cover plate is adhered and supported on the main adhesive. A method for making the chip package is also provided.Type: GrantFiled: April 2, 2007Date of Patent: December 29, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Ying-Cheng Wu, Chun-Hung Lin
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Publication number: 20090315164Abstract: An integrated circuit package system includes: connecting a carrier and an integrated circuit mounted thereover; preforming a wire-in-film encapsulation having a cavity; pressing the wire-in-film encapsulation over the carrier and the integrated circuit with the cavity exposing a portion of the integrated circuit; and curing the wire-in-film encapsulation.Type: ApplicationFiled: June 20, 2008Publication date: December 24, 2009Inventors: Seng Guan Chow, Rui Huang, Heap Hoe Kuan
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Patent number: 7635904Abstract: Apparatus and methods are provided for packaging IC (integrated circuit) chips to enable both optical access to the back side of an IC chip and electrical access to the front side of the IC chip.Type: GrantFiled: March 21, 2005Date of Patent: December 22, 2009Assignee: International Business Machines CorporationInventors: Alberto Tosi, Franco Stellari, Peilin Song
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Publication number: 20090309202Abstract: A packaging substrate having a semiconductor chip embedded and a fabrication method thereof are provided. The method includes forming a semiconductor chip in a through cavity of a core board and exposing a photosensitive portion of the semiconductor chip from the through cavity; sequentially forming a first dielectric layer and a first circuit layer on the core board, the first circuit layer being electrically connected to the electrode pads of the semiconductor chip; forming a light-permeable window on the first dielectric layer to expose the photosensitive portion of the semiconductor chip and adhering a light-permeable layer onto the light-permeable window, thereby permitting light to penetrate through the light-permeable layer to reach the photosensitive portion. Therefore, when fabricated with the method, the packaging substrate dispenses with conductive wires and dams and thus can be downsized.Type: ApplicationFiled: June 12, 2009Publication date: December 17, 2009Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventors: Shin-Ping Hsu, Kan-Jung Chia
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Publication number: 20090302446Abstract: A method for cutting and molding in small windows of a window-type semiconductor package and the semiconductor package fabricated from the same are revealed. According to the method, a substrate strip has a plurality of small windows disposed at the sides or at the corners of the substrate strip. The external surface of the substrate strip includes a plurality of window molding areas surrounding the small windows and extending to the scribe lines. A plurality of chips are disposed on the substrate strip. Then, an encapsulant is formed in the small windows to encapsulate the electrical connecting components and formed on the window molding areas so that the encapsulant extends to the scribe lines. Therefore, the mold flashes at the small windows can be effectively reduced.Type: ApplicationFiled: August 17, 2009Publication date: December 10, 2009Inventors: Kuo-Yuan LEE, Yung-Hsiang CHEN
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Publication number: 20090294940Abstract: The semiconductor device includes a support substrate 101 on which a semiconductor element 105 to be mounted, a covering member 102 disposed to the support substrate via a bonding member, and a space 107 is defined between the covering member 102 and the support substrate 101. The support substrate 101 has a protruded portion 103 and the covering member 102 is disposed so that a portion thereof is in contact with the protruded portion 103 so as to define an air vent leading from the space 107 to outside.Type: ApplicationFiled: May 28, 2009Publication date: December 3, 2009Inventors: Kunihito SUGIMOTO, Koki MATSUMOTO
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Publication number: 20090283807Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.Type: ApplicationFiled: May 14, 2008Publication date: November 19, 2009Applicant: International Business Machines CorporationInventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
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Publication number: 20090283887Abstract: An optical semiconductor device of the present invention includes a semiconductor chip (11) having an optical element (12) formed on a surface of the semiconductor chip; and a transparent member (13) directly secured on the semiconductor chip (11) with a transparent adhesive (25) so as to cover the optical element (12). The transparent member (13) has a surface opposed to the semiconductor chip (11) and at least one edge line of the surface has one of a chamfered portion (14) and a rounded portion.Type: ApplicationFiled: April 23, 2009Publication date: November 19, 2009Applicant: Panasonic CorporationInventor: Yoshiki Takayama
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Patent number: 7619304Abstract: A panel and a semiconductor component including a composite board with semiconductor chips and plastic package molding compound and a method for the production thereof is disclosed. In one embodiment, the panel includes a composite board with semiconductor chips arranged in rows and columns in a corresponding plastic package molding compound with a plurality of semiconductor component positions. The thickness of the plastic package molding compound corresponds to the thickness of the semiconductor chips so that a coplanar upper side and a coplanar rear side are formed on the composite board. Located on the coplanar rear side of the composite board is a plastic layer whose coefficient of thermal expansion corresponds to the coefficient of thermal expansion of the composite board. Located on the coplanar upper side of the composite board is a wiring structure which has corresponding external contacts.Type: GrantFiled: June 1, 2006Date of Patent: November 17, 2009Assignee: Infineon Technologies AGInventors: Michael Bauer, Kai Chong Chan
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Patent number: 7612440Abstract: According to various illustrative embodiments of the present invention, a device for an integrated circuit includes a monolithic frame having a plurality of alignment features disposed thereon, the monolithic frame having a mounting surface disposed thereon for the integrated circuit, the monolithic frame also having a thermal interface area disposed thereon for the integrated circuit. The device also includes an electrical interface capable of providing an electrical connection for the integrated circuit, the plurality of alignment features being substantially independent of the electrical interface, and an adhesive layer disposed between the monolithic frame and the electrical interface.Type: GrantFiled: May 17, 2006Date of Patent: November 3, 2009Assignee: Texas Instruments IncorporatedInventors: Paul L. Rancuret, John T McKinley
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Patent number: 7612385Abstract: Disclosed herein is a package structure including at least one high power light-emitting diode to exhibit excellent heat release properties. In the package structure, a light-emitting diode chip which generates heat is directly attached to a beacon processed to protrude from part of a heat spreader having high heat conductivity, whereby an electrical wiring portion is separated from a heat release portion, thus maximizing heat release properties and realizing high luminance and reliability.Type: GrantFiled: December 30, 2005Date of Patent: November 3, 2009Assignee: Korea Photonics Technology InstituteInventors: Young-Woo Kim, Tae-Hoon Kim, Young-Moon Yu
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Patent number: 7612441Abstract: An image-sensing chip package module adapted to dual-side soldering includes three substrates, an image-sensing chip and a filter lens. The three substrates are stacked together by pressing (using adhesive as adhesion medium), and the image-sensing chip is electrically connected to the top side of the top substrate and the bottom side of the bottom substrate via conductive bodies that are formed on inner surfaces of through holes passing through the three substrates. Hence, the image-sensing chip package module can use the conductive bodies formed on the bottom side of the bottom substrate (positive face electrical conduction) or the conductive bodies formed on the top side of the top substrate (negative face electrical conduction) to electrically connect with a main PCB. Furthermore, the filter lens is received and hidden in an opening of the top substrate in order to prevent the filter lens from being slid, collided and destroyed.Type: GrantFiled: May 5, 2008Date of Patent: November 3, 2009Assignee: Lite-On Semiconductor Corp.Inventor: Meng-Kun Chen
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Patent number: 7612442Abstract: With this semiconductor device, the distortion and cracking of a thinned portion of a semiconductor substrate are prevented to enable high precision focusing with respect to a photodetecting unit and uniformity and stability of high sensitivity of the photodetecting unit to be maintained. A semiconductor device 1 has a semiconductor substrate 10, a wiring substrate 20, conductive bumps 30, and a resin 32. A CCD 12 and a thinned portion 14 are formed on semiconductor substrate 10. Electrodes 16 of semiconductor substrate 10 are connected via conductive bumps 30 to electrodes 22 of wiring substrate 20. Wiring substrate 20 is subject to a wettability processing by which a region 26a that surrounds a region opposing thinned portion 14 and regions 26b that extend to the outer side from region 26a are lowered in the wettability with respect to the resin.Type: GrantFiled: September 24, 2004Date of Patent: November 3, 2009Assignee: Hamamatsu Photonics K.K.Inventors: Hiroya Kobayashi, Masaharu Muramatsu
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Publication number: 20090267172Abstract: A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity.Type: ApplicationFiled: October 20, 2008Publication date: October 29, 2009Applicants: STMicroelectronics Rousset SAS, STMicroelectronics R&D LimitedInventors: Brendan Dunne, Kevin Channon, Eric Christison, Robert Nicol
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Patent number: 7605467Abstract: An upper sealing ring and a lower sealing ring are adhered by sealing solder. The width of tip end of sealing projection is narrower than the width of the lower sealing ring. Therefore, the sealing solder is placed on lower sealing ring and on the side surface of upper sealing ring. Further, an upper connection pad and a lower connection pad are adhered by connecting solder. The width of a tip end of a connection projection is narrower than the width of lower connection pad. Therefore, the connecting solder is placed on the lower connection pad and on the side surface of upper connection pad. Thus, a package is provided, which attains satisfactory electrical connection and hermetic seal after solder joint of the upper and lower substrates.Type: GrantFiled: September 11, 2006Date of Patent: October 20, 2009Assignee: Mitsubishi Electric CorporationInventors: Yoshio Fujii, Hiroshi Fukumoto, Shinpei Ogawa, Yoshinori Yokoyama
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Patent number: 7605455Abstract: With this semiconductor device, the distortion and cracking of a thinned portion of a semiconductor substrate are prevented to enable high precision focusing with respect to a photodetecting unit and uniformity and stability of high sensitivity of the photodetecting unit to be maintained. A semiconductor device 1 has a semiconductor substrate 10, a wiring substrate 20, conductive bumps 30, and a resin 32. A CCD 12 and a thinned portion 14 are formed on semiconductor substrate 10. Electrodes 16 of semiconductor substrate 10 are connected via conductive bumps 30 to electrodes 22 of wiring substrate 20. Wiring substrate 20 has formed therein a groove portion 26a that surrounds a region opposing thinned portion 14 and groove portions 26b that extend to an exposed surface of wiring substrate 20 from groove portion 26a. Insulating resin 32 fills a gap between outer edge 15 of thinned portion 14 and wiring substrate 20 to reinforce the bonding strengths of conductive bumps 30.Type: GrantFiled: September 24, 2004Date of Patent: October 20, 2009Assignee: Hamamatsu Photonics K.K.Inventors: Hiroya Kobayashi, Masaharu Muramatsu
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Patent number: 7605456Abstract: To provide an inverter unit with excellent manufacturing performance and with current carrying capacity increased and size reduced by further increasing the cooling efficiency of a power efficiency device. The inverter unit includes: a semiconductor chip constituting an arm of an inverter; a first conductor 33 joined to a positive side of the semiconductor chip; and a second conductor 35 joined to a negative side of the semiconductor chip. The first and second conductors are disposed above a cooler 22 cooling the semiconductor chip so that a joint surface of the first conductor 33 which is joined to a positive electrode of the semiconductor chip and a joint surface of the second conductor 35 which is joined to a negative electrode of the semiconductor chip are not in parallel to a surface of the cooler 22.Type: GrantFiled: June 1, 2005Date of Patent: October 20, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Toshiharu Obu, Nobumitsu Tada, Hiroki Sekiya, Gou Ninomiya
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Publication number: 20090256229Abstract: In a camera module (1) of the present invention, a lens member (20) is attached to a semiconductor package (10). The semiconductor package (10) includes: an image sensor (11) mounted on a wiring board (13); and a wire 15 through which the wiring board (13) is electrically connected to the image sensor (11). The image sensor (11) and the wire 15 are sealed with mold resin (14). A step (18) is formed around the perimeter of the surface of the mold resin (14), and the semiconductor package (10) and the lens member (20) are joined by fitting the step (18) and a projection (23) of a lens holder (22). With this arrangement, it is possible to realize a small semiconductor module that allows for highly precise alignment between the semiconductor package and a mounting component to which the semiconductor package is joined.Type: ApplicationFiled: November 1, 2006Publication date: October 15, 2009Applicant: SHARP KABUSHIKI KAISHAInventors: Kazuhiro Ishikawa, Katsuitsu Nishida, Kazuya Fujita, Takahiro Nakahashi
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Patent number: 7598617Abstract: A stack package includes a printed circuit board; at least two semiconductor chips stacked on the printed circuit board, each having first re-distribution lines formed on the upper surface thereof and connected to bonding pads, through silicon vias which are formed therethrough and connected to the first re-distribution lines, and second re-distribution lines formed on the lower surface thereof and connected to the through silicon vias; first and second solder balls interposed between the first and second re-distribution lines which face each other and between the first re-distribution lines of the lowermost semiconductor chip and electrode terminals of the printed circuit board; a molding material for molding the upper surface of the printed circuit board including the stacked semiconductor chips; and third solder balls attached to ball lands formed on the lower surface of the printed circuit board.Type: GrantFiled: December 29, 2006Date of Patent: October 6, 2009Assignee: Hynix Semiconductor Inc.Inventors: Seung Hyun Lee, Min Suk Suh
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Publication number: 20090243064Abstract: A method of manufacturing a semiconductor package involves providing a substrate having a window. The substrate may include a leadframe having half-etched leads. First and second semiconductor devices are mounted to a top surface of the substrate on either side of the window using an adhesive. A third semiconductor device is mounted to the first and second semiconductor devices using an adhesive. The third semiconductor device is disposed over the window of the substrate. A wirebond or other electrical interconnect is formed between the third semiconductor device and a contact pad formed over a bottom surface of the substrate opposite the top surface of the substrate. The wirebond or other electrical interconnect passes through the window of the substrate. An encapsulant is deposited over the first, second, and third semiconductor devices.Type: ApplicationFiled: March 31, 2008Publication date: October 1, 2009Applicant: STATS ChipPAC, Ltd.Inventors: Zigmund R. Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay, Henry D. Bathan
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Patent number: 7595268Abstract: A semiconductor package and a method for manufacturing the same capable of supplying power easily without an increase in the number of pads for power supply. The semiconductor package includes a semiconductor chip having a plurality of pads including pads for power supply disposed in a center portion and an internal wiring disposed to be exposed to outside; an insulating film formed on the semiconductor to expose the pads for power supply and the internal wirings; and re-distribution lines formed on the insulating film to connect between the exposed portions of the pads for power supply and the internal wiring.Type: GrantFiled: July 13, 2007Date of Patent: September 29, 2009Assignee: Hynix Semiconductor Inc.Inventor: Kwon Whan Han
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Patent number: 7595220Abstract: The invention provides an image sensor package and method for fabricating the same. The image sensor package comprises a first substrate comprising a sensor device thereon and a hole therein. A bonding pad comprising a first opening is formed on an upper surface of the first substrate. A second substrate comprising a spacer element with a second opening therein is disposed on the first substrate. A conductive plug is formed in the hole and passes through the first and second openings to the second substrate to electrically contact with the bonding pad. A conductive layer is formed on a lower surface of the first substrate and electrically connects to the conductive plug. A solder ball is formed on the conductive layer and electrically connects to the bonding pad by the conductive plug. The image sensor package further comprises a second substrate bonding to the first substrate. The image sensor package is relatively less thick, thus, the dimensions thereof are relatively reduced.Type: GrantFiled: June 29, 2007Date of Patent: September 29, 2009Assignee: VisEra Technologies Company LimitedInventors: Jui-Ping Weng, Jang-Cheng Hsieh, Tzu-Han Lin, Pai-Chun Peter Zung
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Patent number: 7595549Abstract: A surface mount semiconductor device using a lead frame can suppress stress applied to a package by a load in a forming process performed for the lead frame projecting from the package at a portion at which the lead frame projects the package. Concave portions can be provided in at least one lead of a pair of leads that project laterally from side faces of the package. The concave portions can be arranged at positions where the leads are bent approximately perpendicularly along the side faces of the package at respective central portions of the leads. Thus, a cross-sectional area of a bending portion of the lead can be reduced, thereby enabling the lead (or leads) to be easily bent with a smaller bending load. Therefore, a surface mount semiconductor device can be achieved which prevents disconnection without impairing a heat radiation property and which has good moisture resistance.Type: GrantFiled: January 20, 2006Date of Patent: September 29, 2009Assignee: Stanley Electric Co., Ltd.Inventors: Toshimi Kamikawa, Hayato Oba, Shinichi Miyamura
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Publication number: 20090236740Abstract: A WBGA (window ball grid array) semiconductor package includes a substrate having a slot as a window for a chip. The slot has four straight sections and four rounded corners respectively interconnecting adjacent two straight sides. Each rounded corner has a radius satisfying the minimum distance between the pads and the slot according to the design rule so as to increase the pad pitch in the chip. The plain area increased due to the pad pitch is suitable for ESD circuit or capacitors layout.Type: ApplicationFiled: June 6, 2008Publication date: September 24, 2009Inventor: Ming-Feng Wu
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Publication number: 20090224386Abstract: A semiconductor device is made by providing a semiconductor die having an optically active area, providing a leadframe or pre-molded laminated substrate having a plurality of contact pads and a light transmitting material disposed between the contact pads, attaching the semiconductor die to the leadframe so that the optically active area is aligned with the light transmitting material to provide a light transmission path to the optically active area, and disposing an underfill material between the semiconductor die and leadframe. The light transmitting material includes an elevated area to prevent the underfill material from blocking the light transmission path. The elevated area includes a dam surrounding the light transmission path, an adhesive ring, or the light transmission path itself can be the elevated area. An adhesive ring can be disposed on the dam. A filler material can be disposed between the light transmitting material and contact pads.Type: ApplicationFiled: March 7, 2008Publication date: September 10, 2009Applicant: STATS CHIPPAC, LTD.Inventors: Zigmund R. Camacho, Henry D. Bathan, Lionel Chien Hui Tay, Arnel Senosa Trasporto
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Patent number: 7586185Abstract: A semiconductor device for fingerprint sensors reduces a mounting area of the semiconductor device and improves a processing capacity of assembling and testing process. The semiconductor device has a functional surface that provides a predetermined function. A semiconductor element has a circuit formation surface on which a plurality of electrodes are formed and a back surface opposite to the circuit formation surface. A part of the circuit formation surface functions as the functional surface. Wiring is formed on the back surface of the semiconductor element. A plurality of connection parts extends between the circuit formation surface and the back surface of the semiconductor element so as to electrically connect the electrodes to the wiring. A plurality of external connection terminals are exposed outside the semiconductor device on a side of the back surface of the semiconductor element.Type: GrantFiled: August 24, 2005Date of Patent: September 8, 2009Assignee: Fujitsu Microelectronics LimitedInventor: Norio Fukasawa
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Publication number: 20090218668Abstract: The MEMS package has a mounting substrate on which one or more transducer chips are mounted wherein the mounting substrate has an opening. A top cover is attached to and separated from the mounting substrate by a spacer forming a housing enclosed by the top cover, the spacer, and the mounting substrate and accessed by the opening. Electrical connections are made between the one or more transducer chips and the mounting substrate and/or between the one or more transducer chips and the top cover. A bottom cover can be mounted on a bottom surface of the mounting substrate wherein a hollow chamber is formed between the mounting substrate and the bottom cover, wherein a second opening in the bottom cover is not aligned with the first opening. Pads on outside surfaces of the top and bottom covers can be used for further attachment to printed circuit boards. The top and bottom covers can be a flexible printed circuit board folded under the mounting substrate.Type: ApplicationFiled: February 28, 2008Publication date: September 3, 2009Inventors: Wang Zhe, Chong Ser Choong
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Patent number: 7582959Abstract: A driver module structure includes a flexible circuit board (2) provided with a wiring pattern (7), a semiconductor device mounted on the flexible circuit board (2), and an electrically conductive heat-radiating member (4) joined to the semiconductor device. The wiring pattern (7) includes a ground wiring pattern (8). The flexible circuit board (2) has a cavity (9) that exposes a portion of the ground wiring pattern (8). The exposed portion of the ground wiring pattern (8) and the heat-radiating member (4) are connected to establish electrical continuity via a member (11) that is fitted into the cavity (9).Type: GrantFiled: March 11, 2005Date of Patent: September 1, 2009Assignee: Panasonic CorporationInventor: Hiroyuki Fukusako
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Patent number: 7582944Abstract: An optical apparatus includes an optical device (LED device or semiconductor imaging device) having a photoreceptor/light-emitting region, a peripheral circuit region and an electrode region, a transparent member having a larger light passing through region than the optical device and including, on one surface thereof, protruding electrodes for connection to the optical device, external connection electrodes for connection to a mounting substrate, conductive interconnects for connecting the protruding electrodes and the external connection electrodes, and a transparent adhesive provided between the optical device and the transparent member. In the optical apparatus, one surface of the optical device in which the photoreceptor/light-emitting region is formed and one surface of the transparent member are arrange so as to face to each other and electrodes of the optical device and the protruding electrodes of the transparent member are electrically connected and also adhered by the transparent adhesive.Type: GrantFiled: January 26, 2007Date of Patent: September 1, 2009Assignee: Panasonic CorporationInventors: Toshiyuki Fukuda, Yoshiki Takayama, Masanori Minamio, Tetsushi Nishio, Yutaka Harada
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Patent number: 7576403Abstract: A method of manufacturing an infrared rays receiver comprises the steps of: chip attach; wire bonding; encapsulation; metal housing covering; encapsulation; pin cutting; and testing. A lead frame has several pins, wherein one pin has a coupling part. An infrared rays receiving chip is coupled to the coupling part of the pin of the lead frame, and electrically connected to the other pins by bonding wires. Thereafter, a light-pervious adhesive encapsulates part of the lead frame, the chip, and the bonding wires. Thereafter, the light-pervious adhesive is covered with a metal housing having a through hole so as to expose the infrared rays receiving chip via the through hole. Thereafter, the metal housing and the light-pervious adhesive are encapsulated into a unity by a colored adhesive. Consequently, the infrared rays receiver is protected from the occurrence of short circuits and has a metal shielding effect to provide a longer transmission distance.Type: GrantFiled: August 23, 2007Date of Patent: August 18, 2009Assignee: Unity Opto Technology Co., Ltd.Inventor: Wei Chang
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Patent number: 7576401Abstract: An optical module includes an image sensor having an active area and a window mounted directly to the image sensor above the active area. The optical module further includes a mount mounted to the window, the mount supporting a barrel having a lens assembly. By mounting the window directly to the image sensor and the mount directly to the window, the substrate surface area of the optical module is minimized.Type: GrantFiled: July 7, 2005Date of Patent: August 18, 2009Assignee: Amkor Technology, Inc.Inventors: Arsenio de Guzman, Robert F. Darveaux, Young Ho Kim
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Patent number: 7567235Abstract: One embodiment relates to an optical navigation device. The device includes a lead frame having reference features, a laser, a detector array, and an optical component having alignment features. The laser is attached to the lead frame and positioned in reference to the reference features of the lead frame. The detector array is attached to the lead frame and positioned in reference to the reference features of the lead frame. The optical component is coupled to the lead frame so that its alignment features register to the reference features of the lead frame. In this way, the molded optical component is passively aligned to the laser and the detector array. Other embodiments are also disclosed.Type: GrantFiled: December 12, 2005Date of Patent: July 28, 2009Assignee: Cypress Semiconductor CorporationInventors: Brett A. Spurlock, Steven Sanders, Clinton B. Carlisle
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Patent number: 7566969Abstract: To miniaturize a semiconductor device, a package substrate is provided having terminals formed on the main surface, lands formed on the back surface, through holes formed by laser beam machining and arranged at the upper part of each of the lands, and plating films arranged in the through hole to connect the lands with the terminals electrically. A semiconductor chip is mounted on the main surface of the substrate, a conductive wire connects the pad of the chip and the substrate, and solder bumps are formed in the lands. Since the through holes are formed by laser beam machining, the openings of the through holes are small. Further, the through holes have a larger opening on the main surface of the package substrate than the opening on the back surface of the package substrate. Therefore, it becomes possible to arrange a solder bump directly under each of the through holes, and miniaturization can be realized.Type: GrantFiled: January 3, 2006Date of Patent: July 28, 2009Assignee: Renesas Technology Corp.Inventor: Yoshihiko Shimanuki
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Publication number: 20090184408Abstract: A semiconductor device is disclosed that performs fingerprint recognition on the electrostatic-capacity principle. A finger sweeping across a fingerprint recognition area of a semiconductor chip provides positive fingerprint recognition operations with improved reliability. The semiconductor device includes the semiconductor chip having a sensor unit that performs fingerprint recognition, and a substrate having an opening formed in the position corresponding to the sensor unit. The semiconductor chip is flip chip bonded to the substrate such that the sensor unit corresponds to the opening, and except for the formed position of the opening, an under-fill material is provided between the semiconductor chip and the substrate.Type: ApplicationFiled: March 18, 2009Publication date: July 23, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Akira Okada, Mitsuru Sato