Abstract: In one embodiment, the present invention includes a method for placing a thermal interface material (TIM) between a die including a backside metallic (BSM) layer including copper (Cu) and a heat spreader having a contact surface including Cu, where the TIM is formed of an alloy including indium (In) and tin (Sn), and bonding the TIM to the die and the heat spreader to form at least one quaternary intermetallic compound (IMC) layer. Other embodiments are described and claimed.

Abstract: One embodiment in accordance with the invention is a system that can include a first wafer and a second wafer. The first wafer and the second wafer can be bonded together by a wafer bonding process that forms a gap between the first wafer and the second wafer. The gap can be configured for receiving a heat extracting material.

Abstract: A packaging substrate structure with electronic components embedded therein and a method for fabricating the same are disclosed. The packaging substrate structure comprises a core board with a wiring layer on the two opposite surfaces thereof; a first built-up structure disposed on at least one surface of the core board and having a cavity to expose the surface of the core board; an electronic component disposed in the cavity and having an active surface and an inactive surface, where the active surface has pluralities of electrode pads and the inactive surface faces the surface of the core board; and a solder mask disposed on the surfaces of the first built-up structure and the electronic component, where the solder mask has pluralities of first openings to expose the electrode pads of the electronic component. Accordingly, the packaging substrate disclosed by the present invention can efficiently enhance electrical performance and product reliability.

Abstract: A silicon nitride substrate having appropriately adjusted warpage and surface roughness can be obtained by mixing magnesium oxide of 3 to 4 wt % and at least one kind of rare-earth element oxide of 2 to 5 wt % with silicon nitride source material powder to form a sheet-molded body, sintering the sheet-molded body, and performing a heat treatment at a temperature of 1,550 to 1,700 degree C. with a pressure of 0.5 to 6.0 kPa with a plurality of substrates being stacked. Also, a silicon nitride circuit board and a semiconductor module using the same are provided.

Abstract: The present invention relates to a substantially package-like discrete electronic component of the type comprising a power electronic circuit, a body or casing, substantially parallelepiped, and electric connecting pins connected inside the body with said circuit and projecting from said body for an electric connection on the electronic printed circuit board. The body has a heat dissipating header having at least one surface emerging from the body and laying on a plane whereas the pins project from the body for a first section initially extended parallel to the plane. Advantageously a pair of pins has a substantially U-shaped bending, after the first section parallel to the plane for allowing a more stable bearing of the component during the step of welding to a heat dissipating intermediate die.

Abstract: A semiconductor module 10 includes a ceramic substrate having a front surface on which a semiconductor element 12 is mounted and a rear surface on the opposite side of the front surface, a front metal plate 15 joined to the front surface, a rear metal plate 16 joined to the rear surface, and a heat sink 13 joined to the rear metal plate 16. The rear metal plate 16 includes a joint surface 16b that faces the heat sink 13. The joint surface 16b includes a joint area and a non-joint area. The non-joint area includes recesses 18 which extend in the thickness direction of the rear metal plate 16. The joint area of the rear metal plate 16 is in a range from 65% to 85% of the total area of the joint surface 16b on the rear metal plate 16. As a result, excellent heat dissipating performance can be achieved while occurrence of distortion and cracking due to thermal stress is prevented.

Abstract: An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic component is a special arrangement which is associated with a considerably increased heat dissipation capability for the relevant component and, in addition, also affords further advantages in connection with changes in the population and/or line routing which might occur in practice. The important factor for this is that the component is arranged under a second circuit carrier which is held in a recess in the first circuit carrier. The recess passes through to the top side of the heat sink.

Abstract: The present invention relates to a light-emitting device comprising a substrate, a circuitry, a LED in electrical connection with said circuitry, and a heat sink arranged to transport heat away from the LED, wherein the LED is in thermal contact with said heat sink through an opening in said substrate. The present invention also relates to methods for the manufacture of such a device.

Abstract: Disclosed is a light emitting device having a plurality of light emitting cells. The light emitting device comprises a thermally conductive substrate, such as a SiC substrate, having a thermal conductivity higher than that of a sapphire substrate. The plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. For example, the semi-insulating buffer layer may be formed of AlN or semi-insulating GaN. Since the thermally conductive substrate having a thermal conductivity higher than that of a sapphire substrate is employed, heat-dissipating performance can be enhanced as compared with a conventional sapphire substrate, thereby increasing the maximum light output of a light emitting device that is driven under a high voltage AC power source.

Abstract: An optical element mounting method includes: illuminating ultraviolet light onto a polymer optical waveguide device; under the ultraviolet light illumination, capturing, by an image pickup device, the polymer optical waveguide device including a light incident/exiting position of a waveguide core; and judging, from a difference between bright and dark in a captured image, that a portion brighter than other portions or a portion darker than other portions is the light incident/exiting position of the waveguide core.

Abstract: A power semiconductor module comprising: a power semiconductor element; a case for receiving the power semiconductor element; a control terminal which is connected to a control electrode of the power semiconductor element, the control terminal is installed in a state of protruding from an upper surface of the case; and a conductive spring which is inserted into the control terminal so that an inner surface of the spring makes contact with at least a part of the side surface of the control terminal, the conductive spring is electrically connected to a printed substrate placed as opposed to the upper surface of the case by making pressurization contact with the printed substrate.

Abstract: LED packages are provided that include a material that is both thermally conductive and has a coefficient of thermal expansion that is matched to that of an LED. The material can be a ceramic such as aluminum nitride. The package has a body that includes a bottom surface and a cavity disposed into the body. The cavity has a floor for bonding to the LED so that the LED sits within the cavity. The thermally conductive material is disposed between the floor of the cavity and the bottom surface of the package. The body can be fabricated from a number of layers where the thermally conductive material is in a layer disposed between the floor and the bottom surface. The other layers of the body can also be fabricated from the thermally conductive material. A light emitting device is made by attaching the LED to the LED package.

Abstract: Disclosed is a light emitting device having a plurality of light emitting cells. The light emitting device comprises a thermally conductive substrate, such as a SiC substrate, having a thermal conductivity higher than that of a sapphire substrate. The plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. For example, the semi-insulating buffer layer may be formed of AlN or semi-insulating GaN. Since the thermally conductive substrate having a thermal conductivity higher than that of a sapphire substrate is employed, heat-dissipating performance can be enhanced as compared with a conventional sapphire substrate, thereby increasing the maximum light output of a light emitting device that is driven under a high voltage AC power source.

Abstract: Disclosed is a light emitting device having a plurality of light emitting cells. The light emitting device comprises a thermally conductive substrate, such as a SiC substrate, having a thermal conductivity higher than that of a sapphire substrate. The plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. For example, the semi-insulating buffer layer may be formed of AlN or semi-insulating GaN. Since the thermally conductive substrate having a thermal conductivity higher than that of a sapphire substrate is employed, heat-dissipating performance can be enhanced as compared with a conventional sapphire substrate, thereby increasing the maximum light output of a light emitting device that is driven under a high voltage AC power source.

Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.

Abstract: The invention relates to a metal-ceramic substrate for electric circuits or modules, said substrate including a ceramic layer which is provided with at least one metallic layer of a first type applied to a surface of said ceramic layer in a plane manner. An insulating layer made up of a glass-containing material is applied to at least one partial region of a surface of the metallic layer of the first type, said surface opposing the ceramic layer, and a metallic layer of a second type is applied to the insulating layer, the insulating layer and the metallic layer of a second type respectively being thinner then the ceramic layer and the metallic layer of the first type.

Abstract: A multi chip housing has a lead frame to which plural die are soldered. A heat spreader conductive cap encloses a volume containing the plural die or chips and is fixed to the periphery of the lead frame. The die may be silicon or GaN based MOSFETs or integrated circuits or a mixture thereof. The tops of the die are closely spaced from the interior of the cap and the volume is filled with a thermally conductive, electrically insulating plastic encapsulant. One die can be connected to the clip as well as the lead frame and the other may be an IC die insulated from the clip.

Abstract: A solder preform having multiple layers including a solder layer filled with additives interposed between two unfilled layers for improved wettability. A solder preform having a sphere which contains a solder material filled with additives, and an unfilled surface layer for improved wettability. A thermal interface material having a bonding component and an additive component which is a CTE modifying component and/or a thermal conductivity enhancement component. Active solders containing intrinsic oxygen getters.

Abstract: A method of forming packages containing SiC or other semiconductor devices bonded to other components or conductive surfaces utilizing transient liquid phase (TLP) bonding to create high temperature melting point bonds using in situ formed ternary or quaternary mixtures of conductive metals and the devices created using TLP bonds of ternary or quaternary materials. The compositions meet the conflicting requirements of an interconnect or joint that can be exposed to high temperature, and is thermally and electrically conductive, void and creep resistant, corrosion resistant, and reliable upon temperature and power cycling.

Abstract: An IC package that employs top-side conduction cooling. The IC package has a low thermal resistance between a substrate housed within the package and the lid of the package. Thermal resistance is decreased by increasing the conduction cross-sections laterally through the package and lid and vertically from the package into the lid. The lid may also be modified with an extended mesa portion that reduces the gap between the lid and the IC. A thermally conductive spacer may also be interposed between the IC and the lid. Also, the package housing body and lid may be made from high thermal conductivity materials having thermal conductivities of 50 W/mK or greater with matching CTE between the lid and the package.

Abstract: A power semiconductor module and an inverter apparatus in which a device or a joining part is not mechanically damaged even when the temperature in use becomes a high temperature in the range of 175 to 250° C., resulting in excellent reliability at high temperature retaining test and thermal cycling test. Low thermal expansion ceramic substrates are disposed above and below the device. A material having a coefficient of thermal expansion of 10 ppm/K or less is disposed between the ceramic substrates. In addition, an inorganic material having a coefficient of thermal expansion in the range of 2 to 6 ppm/K or less is disposed around the device.

Abstract: A heat dissipation device comprises a multilayer substrate, a channel formed in the multilayer substrate, and tubes disposed within the channel, the tubes suitable for removing heat from a heat generating device located adjacent to the multilayer substrate.

Abstract: A semiconductor laser diode device comprises a semiconductor laser diode, a primary lead having a sub-mount for mounting the semiconductor laser diode, at least one secondary lead electrically insulated from the primary lead, a first resin member for integrally fixing the primary lead and the secondary lead while insulating the primary lead from the secondary lead, and a second resin member having an emitting opening through which laser beams generated by the semiconductor laser diode are emitted to the outside, and surrounding the primary lead and the first resin member so as to dissipate heat transferred to the primary lead and the first resin member to the outside.

Abstract: An apparatus and method for creating a metallic thermal interface is shown for connecting an electronic module to a heat sink. Using an interface metal such as indium or malleable indium alloys, which have superior heat transfer capability, but are subject to oxidization and degraded thermal transfer capability; a layer of interface material is confined in a recess in the heat sink base into which the module cap is received. The thermal interface region is then evacuated to bring the module top surface and recess major surface into intimate contact and sealed along the interface of the module and recess side walls to exclude air from the metallic interface region.

Abstract: Dendrimer/hyperbranched materials are combined with polyimide to form a low CTE material for use as a dielectric substrate layer or an underfill. In the alternative, ruthenium carbene complexes are used to catalyze ROMP cross-linking reactions in polyimides to produce a class of cross-linkable, thermal and mechanical stable material for use as a dielectric substrate or underfill. In another alternative, dendrimers/hyperbranched materials are synthesized by different methods to produce low viscosity, high Tg, fast curing, mechanically and chemically stable materials for imprinting applications.

Abstract: A co-fired ceramic module includes a ceramic substrate and at least one heat-emitting device. The ceramic substrate has at least one high thermal conductivity material. The heat-emitting device is disposed on the ceramic substrate. The substrate further includes a cavity and the heat-emitting device is disposed in the cavity.

Abstract: A semiconductor device includes: a substrate; a semiconductor element mounted on the substrate; a sealing structure for sealing the semiconductor element, the sealing structure being mounted on the substrate; and an adhesive for bonding the sealing structure and the substrate, wherein the sealing structure has a groove for storing the adhesive.

Abstract: A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.

Abstract: The semi-conducting support comprises a graphite substrate having a front surface and a rear surface and at least a first stack arranged on the front surface of the substrate. The first stack successively comprises a single-crystal diamond layer, an electrically insulating oxide layer and a semi-conducting layer. The support can comprise a second stack arranged on the rear surface of the substrate and comprising the same succession of layers as the first stack or comprising a polymer material layer. A thermal connection passing through the first and/or second stacks and connecting the graphite substrate to an external surface of the support enables heat to be removed. The method can comprise production of the semi-conducting layer by molecular bonding of rectangular silicon strips onto the oxide layer.

Abstract: An IC package that employs top-side conduction cooling. The IC package has a low thermal resistance between a substrate housed within the package and the lid of the package. Thermal resistance is decreased by increasing the conduction cross-sections laterally through the package and lid and vertically from the package into the lid. The lid may also be modified with an extended mesa portion that reduces the gap between the lid and the IC. A thermally conductive spacer may also be interposed between the IC and the lid. Also, the package housing body and lid may be made from high thermal conductivity materials having thermal conductivities of 50 W/mK or greater with matching CTE between the lid and the package.

Abstract: A thermal enhanced structure comprising a packaged electronic device and a heat sink that is removably attached thereto. The thermal enhanced structure includes a plastic ball grid array (PGBA) with an electronic chip, a plastic mold cover, and a heat spreader with a plurality of spaced apart securing studs positioned and caulked at a periphery edge thereof. The mold cover, the heat spreader and studs are molded and embedded with one another to form a single unit with improved torque strength and heat dissipation. The single molded unit and the plastic ball grid array are secured together by an adhesive material. Then the heat sink can be easily and removably attached to the molded single unit by fastening elements to the molded studs, thereby allowing more efficient controllable forces or pressures to be applied as the mechanical fastening elements are removably attached to the molded studs to thereby prevent stress and damage to the PBGA package.

Abstract: A dielectric composition for forming a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like, the composition including at least two fluoropolymers and two inorganic fillers. A circuitized substrate including at least one such dielectric layer and at least one conductive layer thereon is also provided.

Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.

Abstract: A plasma display device which has improved performance of heat dissipation and noise/vibration insulation is disclosed. In one embodiment, the plasma display device includes a plasma display panel, a first base member coupled with the plasma display panel, a second base member connected to the first base member, and a thermally conductive cushion member interposed between the first base member and the second base member.

Abstract: Packaged devices and methods of forming packaged devices are provided. At least one device is disposed on a substrate. The material layer encapsulates the device and covers at least a portion of the substrate, wherein the material layer comprises at least a first portion adjacent to the device and a second portion over the first portion. The second portion has a thermal conductivity higher than a thermal conductivity of the first portion.

Abstract: The present invention relates to a flip chip type nitride semiconductor light emitting device having p-type and n-type nitride semiconductor layers, and an active layer in between. The invention also has an ohmic contact layer formed on the p-type nitride semiconductor layer, a light-transmitting conductive oxide layer formed on the ohmic contact layer, and a highly reflective metal layer formed on the light-transmitting conductive oxide layer.

Abstract: An optical scanner package having a heating dam is provided. The optical scanner package having a heating dam includes: an optical scanner on which a mirror surface is formed; a ceramic package in which the optical scanner is installed at the bottom of a cavity thereof; a glass lid covering a sidewall of the ceramic package; a heating dam formed on the sidewall of the ceramic package; and solder on the heating dam sealing between the glass lid and the sidewall of the ceramic package. The heating dam locally heats the solder to form hermetic sealing.

Abstract: A method of making an energy conversion device includes forming a plurality of pores within a substrate and forming a junction region within each of the plurality of pores. Each of the junction regions has a depletion region and each of the plurality of pores defines an opening size in the substrate and a spacing from adjacent pores so that the depletion regions of each of the pores is at least substantially in contact with the depletion region of the pores which are adjacent.

Abstract: In an electronic circuit device including a substrate including a front surface on which an electronic circuit element is mounted and a reverse surface opposite to the front surface in a thickness direction of the substrate, an electrically conductive terminal member electrically connected to the electronic circuit element, a lead frame extending perpendicular to the thickness direction to face the reverse surface in the thickness direction, and a sealing resin covering at least partially the electronic circuit element, substrate and lead frame while at least a part of the electrically conductive terminal member is prevented from being covered by the sealing resin, the substrate extends to project outward from an end of the lead frame in a transverse direction perpendicular to the thickness direction while the end of the lead frame is covered by the sealing resin.

Abstract: A thermal enhance semiconductor package with a universal heat spreader mainly comprises a carrier, a semiconductor chip and a universal heat spreader. The semiconductor chip is electrically connected to the carrier in a flip-chip fashion and the universal heat spreader is mounted on the back surface of the semiconductor chip. Therein the universal heat spreader has a plurality of through holes for upgrading the efficiency of heat transmission. Moreover, a heat transmission pin is provided in one of the through holes to increase the areas for heat dissipation so as to enhance the thermal performance of the package.

Abstract: A multilayer circuit carrier, electronic devices and panel, and a method for producing a multilayer circuit carrier include at least one semiconductor chip, at least one rewiring layer with a rewiring structure, and at least one insulation layer, which has passage structures.

Abstract: There is provided a small-size electronic heat pump device which is low in power consumption and which secures a vacuum gap without use of an additional circuit. The electronic heat pump device includes an emitter 1 and a collector 2. An electrically and thermally insulative spacer section 5 for keeping a space, i.e. vacuum gap G between an emitter electrode 11 and a collector electrode 21 constant is integrally formed in a semiconductor substrate 20 of the collector 2, which makes it possible to maintain the vacuum gap to be a specified space while a back flow of heat is prevented in a simple structure with a reduced number of component parts.

Abstract: A semiconductor component that is able to be produced simply, quickly, and yet reliably and that usable for power applications, and including a semiconductor chip, a lower, first main electrode layer formed on a first side of the semiconductor chip, a lower control electrode layer formed on the first side, an insulation layer formed on the first side between the lower first main electrode layer and the lower control electrode layer and which partly covers the lower first main electrode layer, an upper first main electrode layer which is formed on the lower first main electrode layer, an upper control electrode layer which is formed on the lower control electrode layer and the insulation layer and extends on the insulation layer partially above the lower first main electrode layer, and a second main electrode layer formed on a second side of the semiconductor chip.

Abstract: In a composite device of the laminate type having a laminate structure of a composite ceramic layer and a dielectric ceramic layer, the composite ceramic layer including a layer portion having the same composition as the dielectric ceramic layer and a plurality of particle portions formed on the surface of the layer portion. The particle portions are made from magnetic ceramic material. This prevents the ceramic layers of the device from cracking and separating when fired.

Abstract: A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

Abstract: A microelectromechanical device package and a low-stress inducing method for packaging a microelectromechanical device are disclosed in this invention. The microelectromechanical device is accommodated within a cavity comprised by a first package substrate and a second substrate, wherein a third substrate is disposed between and bonded to both the microelectromechanical device lower semiconductor substrate and the package bottom substrate. The first and second package substrates are then bonded so as to package the microelectromechanical device inside.

Abstract: This invention relates to a vertically integratable circuit and a method for producing same. Unlike known methods for producing vertical electric connections, the present method uses process steps in the production of the vertically integratable circuit itself to permit vertical integration. This simplifies the sequence of production for vertically integratable circuits and thus the three-dimensional integrated circuit as a whole, thereby optimizing plant running times since process steps are saved. Because finished substrates are no longer the starting point for producing the vertical electric connections, an improved yield is moreover obtained since no process steps which could in particular change the already produced active circuit elements, such as steps with high process temperatures, are necessary any longer after production of the circuit elements.

Abstract: Ultrasonically formed seals, their use in semiconductor packages, and methods of fabricating semiconductor packages. A brittle center member (such as glass) has a molded edge member. That edge member is ultrasonically welded to a body. The molded edge member and body are comprised of ultrasonically weldable materials. A hermetically sealed semiconductor package includes a lid with a brittle center plate and a molded edge. The molded edge is ultrasonically welded to a body. Locating features that enable accurate positioning of the lid relative to the body, and energy directors can be included. Pins having a relieved portion and a protruding portion can also be hermetically sealed to the body. Such pins can have various lengths that enable stadium-type pin rows. The pins can be within channels, which can hold a sealant. The body can include a device that is electrically connected to the pins.

Abstract: A substrate design to improve chip package reliability is provided. The chip package includes a substrate having a ceramic layer formed in a recess. A die is attached to the substrate on the ceramic layer. The substrate may be attached to a printed circuit board. The substrate may be fabricated by forming a recess in a substrate, such as a multi-layer substrate formed of organic dielectric materials. A ceramic layer is then affixed to the substrate in the recess. A die may be attached to the ceramic layer and the substrate may be attached to a printed circuit board.

Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom. The metal clip or drain clip has a plurality, a parallel spaced fins extending from its outwardly facing surface.