Abstract: In forming a pair of impurity regions in an active layer, an intrinsic or substantially intrinsic region having a double-sided comb shape is also formed by using a proper mask. The intrinsic or substantially intrinsic region is composed of a portion that effectively functions as a channel forming region and portions in which a channel is not formed and which function as heat sinks. The heat dissipation effect is improved because the heat sinks are formed by the same material as the channel forming region.

Abstract: A ceramic biomolecule imaging chip includes a ceramic body having a planar imaging surface. The planar imaging surface is highly polished within tolerances of plus or minus 1 microinch. This ceramic chip is compatible with fluorescence laser scanning devices. It is preferred that the ceramic body be 99.6% alumina oxide in order to also be compatible with non-fluorescent detection systems.

Abstract: It is an object of the present invention to provide a ceramic substrate for a semiconductor producing/examining device which has high fracture toughness value, excellent thermal shock resistivity, high thermal conductivity and an excellent temperature rising and falling properties, and is preferable as a hot plate, an electrostatic chuck, a wafer prober and the like. A ceramic substrate, for a semiconductor producing/examining device, having a conductor formed inside thereof or on the surface thereof of the present invention is the ceramic substrate, wherein said ceramic substrate has been sintered such that a fractured section thereof exhibits intergranular fracture.

Abstract: The high-frequency package according to the present invention has a base plate made of copper; a ceramic frame having a space for accommodating a circuit device and mounted on the base plate; and a pattern of circuits developed on the ceramic frame. The base plate and the ceramic frame, and the ceramic frame and the patterned circuits, are both joined together by a DBC technique. According to the present invention, the high-frequency package can be fabricated by a simpler procedure.

Abstract: A heat radiating structure for an electronic device, for cooling an electronic part by transferring the heat generated in the electronic part to a heat spreader has a grading layer, which is located between the electronic part and the heat spreader and having a coefficient of thermal expansion varied such that it is substantially equal or approximate at its portion on the electronic part side to the coefficient of thermal expansion of the electronic part and such that it is substantially equal or approximate at its portion on the heat spreader side to the coefficient of thermal expansion of the heat spreader.

Abstract: In one embodiment, the present invention relates to a method of forming a silicon-on-insulator substrate, involving the steps of providing a first silicon substrate; forming a beryllium oxide layer over the first silicon substrate, the beryllium oxide layer having one of a first thickness from about 100 Å to about 900 Å and a second thickness from about 1,500 Å to about 3,000 Å; forming a first insulation layer over the beryllium oxide layer to provide a first structure; providing a second structure comprising a second silicon layer and a second insulation layer; bonding the first structure and the second structure together so that the first insulation layer is adjacent the second insulation layer; and removing a portion of the second silicon layer thereby providing the silicon-on-insulator substrate.

Abstract: An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature Tg greater than 200° C. and a volumetric coefficient of thermal expansion of ≦75 ppm/° C. A semiconductor device is electrically attached to the laminated substrate.

Abstract: A thermal transfer plate (TTP) includes a thermally conductive plate, at least one footpad and at least one reference protrusion. The footpad includes a spring zone and a standoff member. In an implementation, the reference protrusion contacts a top surface of a substrate. In another implementation, the reference protrusion contacts a top surface of an integrated circuit. Both implementations permit the thickness of the gap between the integrated circuit and the TTP to be optimized for efficient transfer of heat from an integrated circuit.

Abstract: A high power transistor structure comprised of a plurality of field effect transistors fabricated in parallel on a common semiconductor chip and wherein the gate electrodes of the field effect devices are in the form of parallel finger elements having a variable pitch between the fingers which decreases uniformly or non-uniformly from a central portion of the cell to opposite outer end portions thereof.

Abstract: The invention provides a semiconductor package having a substrate, a top surface and at least one semiconductor device attached to the top surface of the substrate. A cover is secured to the substrate creating a space between the cover and the substrate, with the semiconductor device residing within the space. The cover includes an inner chamber that is defined by an upper wall and a lower wall of the cover. The cavity contains a two-phase vaporizable liquid and a wick. Advantageously, the wick on the lower wall includes at least one recess that forms a thinned wall adjacent to a high heat generation portion of the semiconductor device. In one embodiment, the wick on the lower wall includes at least one channel that communicates with at least one of the recesses.

Abstract: A composite ceramic board comprising an insulating board of insulating layers of alumina ceramics and dielectric layers of ceramics having a dielectric constant smaller than at of said insulating layers which are fired as a unitary structure, and metallized wirings of a low-resistance conductor such as of Au, Ag, Cu or Pt formed on the surfaces and inside thereof, and a method of producing the same. The composite ceramic board not only has a large strength and a high thermal conductivity but also exhibits excellent high-frequency chararteristics and is suited for use as a high-frequency wiring board. The invention further provides an optical/electronic-mounted circuit substrate using the above board, and a mounted board having the circuit substrate of the invention connected to an electronic circuit formed on a mother board.

Abstract: The invention relates to a heat-conducting adhesive compound between two workpieces (1, 2). Said compound is provided with a sintered layer (3) that consists of heat-conducting powder, is arranged between the two workpieces and contacts each workpiece in a two-dimensional manner. The inventive compound is also provided with an adhesive (4′) which fills openings (33) on the surface (31) of the layer and adheres to the two workpieces. In a preferred embodiment, the sintered layer consists of silver powder. The sintered layer is produced between the workpieces and said layer is subsequently filled with a liquid adhesive (4) which is then hardened.

Abstract: A monolithic microwave integrated circuit (MMIC) package comprises a MMIC die, a heat sink, an insulation substrate, and a sealing material. The MMIC die has an active region and a peripheral region. The heat sink is located in the active region. A plurality of bonding pads are located in the peripheral region. The insulation substrate has an opening and a plurality of transit ports. The opening is used to contain the heat sink and the transit ports are electrically connected to the bonding pads. The sealing material is filled between the insulation substrate and the MMIC die to cover the whole MMIC die so that the MMIC die is fixed to the insulation substrate and is protected.

Abstract: A semiconductor package with a heat dissipating structure is proposed, in which the heat dissipating structure is precisely positioned on a substrate, in a manner that a plurality of solder balls self-align with ball pads formed on the substrate, and support a heat sink to be positioned above a semiconductor chip mounted on the substrate. This therefore makes the heat sink closely abut a molding cavity of an encapsulating mold in a molding process, and prevents resin flash from occurring on the heat sink, so that a surface of the heat sink can be directly exposed to the atmosphere for improving heat dissipating efficiency. Moreover, the solder balls characterized in softness deform in response to a pressure generated by the encapsulating mold during molding. Therefore, the substrate can be protected from being damaged by the pressure, and thus quality of the semiconductor package can be assured.

Abstract: A packaged electronic structure includes an electronic device, and a package to which the electronic device is affixed. At least a portion of the package is made of a composite material of aluminum nitride dispersed in aluminum. The composite material is preferably prepared by mixing powders of the aluminum nitride and aluminum, and thereafter pressing and sintering the mixture.

Abstract: An electronic component includes an electronic component element and a package to house the electronic component element. The package includes a concave area in which the electronic component element is housed, an area for a sealing frame which is located along the periphery of the concave area, and a sealing cover which is mounted on the area for a sealing frame so as to cover the concave area. Connecting electrodes are electrically connected to the electronic component element and a conductive pattern to be used for image recognition is provided on the upper surface of the area for a sealing frame.

Abstract: A transistor package comprises a first layer in which a thermally conductive flange is integrated into a dielectric substrate layer, a transistor attached to the flange, and input and output contacts coupled to the transistor. The transistor package is attached to a circuit board such that its input and output contacts are electrically coupled to associated conductors on the circuit board. In one embodiment, the transistor package further comprises additional dielectric layers, bonded to the bottom layer, in which a top layer forms a lid covering the transistor. The layers intermediate the bottom and top layers have central areas cut away where the layers overlap the transistor, thereby forming an interior chamber in the package. Impedance matching networks may also be provided to couple the transistor input and output terminals to their respective contacts, where the matching networks tune the input and output impedances of the package.

Abstract: An insulating tape for use in LOC (lead-on-chip) type semiconductor chip packages. With a tripartite structure in which two adhesive layers are provided to both surfaces of a base film, the insulating tape ranges, in coefficient of thermal expansion, from 16.0 to 23.5 ppm/° C. and is very useful in improving the reliability of LOC semiconductor chip packages having lead frames.

Abstract: A thermally enhanced package for an integrated circuit, the integrated circuit having a surface with bond pads formed thereon, includes a heat sink structure attached to a central region of the integrated circuit surface inward of the bond pads. The package further includes a substrate attached to the heat sink structure. The heat sink structure includes a heat sink and first, second adhesive layers between the heat sink and the integrated circuit, substrate, respectively. The heat sink enhances heat transfer between the integrated circuit and the substrate. Further, the first, second adhesive layers decouple any difference in thermal expansion between the integrated circuit, the heat sink and the substrate.

Abstract: A semiconductor mounting package includes at least one diamond member having a first surface on which at least one semiconductor chip is mounted and a second surface opposite the first surface, and a high thermal conductivity metal member adhered to the second surface of the diamond member.

Abstract: In a housing of a semiconductor device there are provided a plurality of semiconductor chips captivated in a preformed sub-assembly and arranged to present contact areas for connection to anode and emitter electrodes of the semiconductor housing. Electrically conductive contact pin arrangements project from electrically insulated channels in the preformed sub-assembly, an inward end of each of the pin arrangements being so arranged, when urged into its channel, as to provide an electrical connection to a part of the surface of a semiconductor chip. There is a sheet of electrically conductive material, resting on a base level of an inner surface of the emitter electrode and electrically isolated therefrom by an electrically insulating insert, as a means for distributing an electrical signal and making simultaneous contact with the opposite ends of the pin arrangements.

Abstract: This is a semiconductor power module provided with: a ceramic substrate; a metallic plate bonded to a surface of this substrate; a cylindrical metallic flange which is hermetically bonded to a surface of substrate or the metallic plate; a ceramic housing for hermetically sealing an opening of the metallic flange; and at least one or more semiconductor chips soldered to the metallic plate. The metallic flange is made of metal with a low thermal expansion coefficient. A hermetically sealed container is created by welding the metallic flange, the ceramic substrate and the housing with silver brazing. Moreover, external collector, emitter and gate electrodes are bonded on the housing by using the silver brazing. The collector, emitter and gate conductive pillars are respectively connected to the external collector, emitter and gate electrodes with calking. Thus, this hermetically sealed container is strong in mechanical strength and high in explosion-proof durability and excellent in moisture resistance.

Abstract: A heat conducting metal is placed under a semiconductor chip and wraps around a substrate of the semiconductor device package to serve as the heat sink for the chip. The metal can wrap around a through-hole in the middle of the substrate, or wrap around the edge of the substrate. A metal plate can be placed between the chip and the heat conducting metal to hold the semiconductor chip.

Abstract: An insulating material of high electrically insulating properties and high thermal conductivity is provided wherein the high thermal conductivity is attained by having a liquid crystal resin comprising a polymerization product of a resin composition containing a monomer which has a mesogen group.

Abstract: In a semiconductor package for radio frequency, slits arranged like dotted lines, elongated metallic plates, or rectangular dielectric members are provided on a surface for grounding of the package, on which a semiconductor element is mounted, whereby an area for grounding positioned just below the semiconductor element and areas in the surface for grounding of the package being in contact with wires for grounding are arranged with extremely short intervals to thereby substantially reduce components of inductance causing deterioration of radio frequency properties; and disconnections of the wires in the surface for grounding caused by extrusion of a jointing material 6 are prevented.

Abstract: A semiconductor ceramic device includes a semiconductor ceramic sintered body and external electrodes. The semiconductor ceramic sintered body contains a lanthanum cobalt type oxide major component, about 0.1 to 10 mol % on an element conversion basis of an oxide of Cr as a sub-component, and about 0.001 to 0.5 mol % on an element conversion basis of at least one of the oxides of Li, Na, K, Rb, Cs, Be, Mg, Ca, Sr, Ba, Ni, Cu and Zn.

Abstract: A dual leadframe package. A chip including a first surface and a second surface is provided. A gate and a first source/drain region are located on the first surface, and a second source/drain region is located on the second surface. A first lead including a first innerlead and a first outerlead and a second lead including a second innerlead and a second outerlead are provided. The first innerlead is coupled to the first source/drain region, and the second innerlead is coupled to the gate. A conductive plate including a top surface and a bottom surface is provided, and the top surface is coupled to the second source/drain region. A packaging material seals the chip, the first innerlead, the outerlead and a portion of the conductive plate. The bottom surface, the first outerlead and the second outerlead are exposed.

Abstract: A semiconductor device for mounting on an external substrate includes a semiconductor chip, a high thermal elastic internal substrate and a high elastic liquid resin. The semiconductor chip has bump electrodes formed on its main surface. The high thermal elastic internal substrate includes a conductive pattern on one surface and external electrodes on the other surface. The conductive pattern is electrically connected to the bump electrodes. The external electrodes are electrically connected to the conductive pattern and mounted on the external substrate. The high elastic liquid resin covers the surface of the semiconductor chip, the one surface of the internal substrate and the bump electrodes. The internal substrate has a Young modulus of about 8000 to 15000 kg/mm2, which is larger than a Young modulus of the external substrate.

Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.

Abstract: A hermetic thin pack semiconductor device. The semiconductor device has a semiconductor substrate and at least one electrode on the upper surface of the semiconductor substrate. A lid of a ceramic material for the semiconductor device has at least one opening extending through the lid. A first electrically conductive material is located on the interior surface of the at least one opening, a second electrically conductive material is located on at least a portion of the upper surface of the lid, and a third electrically conductive material is located on at least a portion of the lower surface of the lid. A solder material is positioned between the electrode and the third electrically conductive material and positioned on a corresponding portion of the electrode opposite a corresponding opening in the lid.

Abstract: A method of making a semiconductor device including: a ceramic base board formed of AlN; a CPU chip and a CMU chip which are flip-chip bonded on a circuit board which includes the ceramic base board; SRAM chips which are die-bonded to the lower major surface of the circuit board; first heat conductive blocks adhesively attached to the CPU chip and the CMU chip; second heat conductive blocks adhesively attached to the upper major surface of the AlN ceramic base board; a resin package; and a heat sink which, adhesively attached on the upper major surface of the resin package, is in close contact with the first heat conductive blocks and the second heat conductive blocks. The heat generated by the CPU chip and the CMU chip is transferred to the heat sink via the first heat conductive blocks and is radiated from the heat sink.

Abstract: An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T.sub.g greater than 200.degree. C. and a volumetric coefficient of thermal expansion of .ltoreq.75 ppm/.degree.C. A semiconductor device is electrically attached to the laminated substrate.

Abstract: A package for multiple IC chip module. The IC chip is attached to electric wires on ceramic substrate which has good heat dissipating capability. The bonding pads along the periphery of the ceramic substrate are lead-bonded to a second substrate with printed wiring on at least one side of the surfaces and ball grid array at the bottom surface. Double-sided printed wiring can be used to provide multiple-layered interconnection. The IC chip is separated from the second substrate by a resin to cushion the stress due to difference in thermal expansion coefficients of the IC chip and the second substrate.

Abstract: The present invention relates generally to a new method for improving the reliability of cooling designs using thermal paste to cool chips in semiconductor modules and structure thereof. More particularly, the invention encompasses a structure and a method that uses surface chemistry modification of the inside of the thermal cooling caps where it contacts thermal paste. The internal surface of the cap is modified by embedding particles that have the same chemical composition as one or more of the solids used in the thermal paste. The particles may be embedded in the cap by casting, grit blasting, or pressing the particles permanently into the surface.

Abstract: An integrated circuit heat transfer element (6,30) is made by selecting thermally conductive fibers having aspect ratios of length to diameter of more than 1, selecting a resin and combining the fibers and the resin to create a formable resin/fiber compound. The resin/fiber compound is formed into a composite material in part by applying pressure to the formable resin/fiber compound, which aligns the fibers, and when cured creates a thermally anisotropic composite material to maximize heat conduction along the aligned fibers. The thermally anisotropic composite material has a coefficient of thermal expansion (CTE) of less than about 10.times.10.sup.-6 cm/cm/.degree. C. The composite material has a thermal conductivity in the direction of the carbon fibers of at least 50 W/m.degree. K. The IC device is preferably secured to the heat transfer element using a thermally conductive adhesive.

Abstract: A reworkable multi-chip module contains a large multi-chip module package (2) with an opening at the top to permit access to an internal region for semiconductor devices, the opening being at least four square inches area with the length or width dimension being at least two inches. The opening is sealed with a stiff closure (1) of sufficient rigidity to withstand at least one atmosphere of differential pressure without significant deflection, is removable in a single piece and may be reinstalled. The closure includes a panel of electrically non-conductive material (3) and a metal flange (5) borders the periphery of the panel to support the panel on the top of the module package.

Abstract: A bipolar transistor (3) is provided with a first main surface (4) in contact with a conductive mounting surface (2), and with an opposed second main surface (12) having connection pads (5, 6, 40) for an emitter, base, and collector. The lateral dimensions of the conductive mounting surface (2) are practically equal to the dimensions of the first main surface (4) of the transistor (3), and may thus be relatively small. The high-frequency properties of the transistor (3) are strongly determined by the size of the conductive mounting surface (2), which through an insulating substrate (1) forms a parasitic capacitance with a conductive ground surface (18), which capacitance is connected to the transistor (3). This parasitic capacitance is very important especially for high-frequency applications. Furthermore, the bonding wires (E, B) for the connection pads of emitter and base are shorter than in the prior art because they need not pass over a relatively large conductive mounting surface (2).

Abstract: In a lead frame, leads are formed on a surface of protective insulation film having a device hole. Protruding electrodes (solder balls) are formed on the surface of the leads opposite the surface closer to the protective insulation film. A reinforcement plate is also formed on the rear surface of the protective insulation film.

Abstract: A semiconductor device which improves heat radiation performance and realizes size reduction and enables heat to be radiated swiftly from both of the principal surfaces of a semiconductor chip even when the semiconductor chip has a construction vulnerable to stresses. It comprises several IGBT chips each having a collector electrode on one principal surface and an emitter electrode and a gate electrode on the other principal surface and two high thermal conductivity insulating substrates sandwiching these IGBT chips and having electrode patterns for bonding to the electrodes of the IGBT chips disposed on their sandwiching surfaces, the electrodes of the IGBT chips and the electrode patterns of the high thermal conductivity insulating substrates being bonded by brazing.

Abstract: A paste of active metallic brazing material is applied to the entire surface of each side of aluminum nitride or alumina ceramic substrate 1; circuit forming copper plate 3 having a thickness of 0.3 mm is placed in contact with one surface of the substrate and a heat dissipating copper plate 4 having a thickness of 0.25 mm placed in contact with the other surface; the individual members are compressed together and heated at 850.degree. C.

Abstract: A wired ceramic board has on a main surface of a ceramic substrate thereof a plurality of bonding pads each of which has a projection having a solderable outer surface and positioned inside an outer periphery of each bonding pad when observed in a plan view. To each bonding pad is bonded a solder ball by using solder which is lower in melting point than the solder ball. The ceramic board and a resinous printed board are placed one upon another in such a manner that their bonding pads are aligned with each other. The bonding pads are soldered together with low melting point solder. The projection of each bonding pad is embedded in or surrounded by a mass of low melting point solder and joined with the mass of solder to constitute an integral unit while serving as a core of the unit.

Abstract: A microelectronic component for mounting a rigid substrate, such as a hybrid circuit to a rigid support substrate, such as a printed circuit board. The microelectronic component includes a rigid interposer which may have a chip mounted on its first surface; a pattern of contacts on the rigid interposer; a flexible interposer overlying the second surface of the rigid interposer; a pattern of terminals on the flexible interposer; flexible leads; and solder coated copper balls mounted on the flexible interposer. The microelectronic component may have a socket assembly mounted on the first surface of the rigid interposer. The microelectronic component may be mounted on a rigid support substrate.

Abstract: A highly reliable member for a semiconductor device, in which a high melting point metallizing layer, which consists mainly of a high melting point metal such as W and/or Mo, and an intervening metal layer, which has a melting point of not greater than 1,000.degree. C. and consists mainly of at least one selected from among Ni, Cu and Fe, are provided on an AlN substrate material in this order on the AlN substrate material, and a conductor layer consisting mainly of copper is directly bonded to the intervening metal layer without intervention of a solder material layer. A semiconductor element or the like is mounted on the member for a semiconductor device, thereby fabricating a semiconductor device. The high melting point metallizing layer is formed on an aluminum nitride substrate by post-fire or co-fire matallization.

Abstract: A semiconductor device and fabrication method are presented which employ a thermally conductive substrate having an outer layer of palladium. The substrate may be made of, for example, a metal such as copper. The substrate does not itself include layers of signal traces or bonding pads which function as device terminals, but provides a stiff backing for support of a flexible circuit which includes signal traces and bonding pads. An adhesive layer bonds the flexible circuit to the substrate. The outer layer of palladium has a desired surface roughness and chemical properties which improve the adhesion of the adhesive layer to the substrate. The substrate has opposed, substantially planar upper and underside surfaces. In one embodiment, the underside surface of the substrate has a die cavity, and the flexible circuit includes a set of conductors bonded to one side of a sheet of dielectric material (e.g., polyimide film).

Abstract: The present invention relates generally to a new process for hermetically sealing of a high thermally conductive substrate, such as, an aluminum nitride substrate, using a low thermally conductive interposer and structure thereof. More particularly, the invention encompasses a hermetic cap which is secured to an aluminum nitride substrate using the novel thermal interposer. The novel thermal interposer basically comprises of layers of relatively high thermal conductive metallic materials sandwiching a core layer of low thermal conductive metallic material.

Abstract: A thin type semiconductor package having a low thermal resistance and a low electric resistance is disclosed, that comprises a nitride ceramic supporting substrate having a first main surface and a second main surface, the nitride ceramic supporting substrate having via-holes that pass through from the first main surface to the second main surface, a resin film having a wiring layer, the resin film being bonded to the first main surface of the supporting substrate, the wiring layer being electrically connected to an edge portion of the via-holes on the first main surface, the resin film having an opening region, a semiconductor chip directly mounted on the first main surface of the nitride ceramic supporting substrate, disposed at the opening region of the resin film, and electrically connected to the wiring layer of the resin film, and external connection terminals disposed on the edge portion of the via-holes of the second main surface.

Abstract: This invention provides a package for complex semiconductor devices and a ceramic terminal block useful for the package. For example, the package might contain a semiconductor laser diode and a Peltier device for cooling the laser diode. A ceramic terminal block has metallized electrode patterns formed thereon which extend inside and outside the package. Grooves are formed in some of the metallized electrode patterns for the leads of the Peltier device. Inward extending leads are fixed on the grooves of the electrode patterns for the Peltier leads. The leads of the Peltier device are soldered to the inward leads.

Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.

Abstract: A package for mounting an integrated circuit chip includes a body having at least a first region and a second region. The first region has a first coefficient of thermal expansion (CTE), and the second region has a second, different CTE. The first region approximately matches the CTE of the integrated circuit chip mounted on the package, and the second region approximates the CTE of the printed wiring board to which the package is mounted.

Abstract: An apparatus and method that permits the removal of heat from the back side surface of an integrated circuit semiconductor substrate while performing optical based testing through or at the back side surface of the semiconductor substrate.In one embodiment, the present invention includes a semiconductor device having an infrared transparent heat slug attached to the back side surface of the device. Heat is removed from the semiconductor device through an infrared transparent heat slug that is then thermally cooled by a conventional cooling technique.