Abstract: A semiconductor device including a substrate, a semiconductor element mounted on the substrate and a stiffener attached via an adhesive to a surface of the substrate opposite a surface thereof on which the semiconductor element is mounted. The adhesive has a coefficient of thermal expansion smaller than that of the substrate and that of the stiffener, and the modulus of longitudinal elasticity of the adhesive is equal to or larger than 10 GPa. Otherwise, the adhesive has a coefficient of thermal expansion larger than that of the substrate and that of the stiffener, and the modulus of longitudinal elasticity of the adhesive is equal to or smaller than 10 GPa. The height of the stiffener is less than that of the external terminals.

Abstract: A structure and method are provided for dissipating heat from a semiconductor device chip. A first layer of a dielectric material (e.g. polyimide) is formed on a front side of a heat spreader (typically Si). A plurality of openings are formed through this first layer; the openings are filled with metal (typically Cu), thereby forming metal studs extending through the first layer. A second layer of metal is formed on the backside of the device chip. The first layer and the second layer are then bonded in a bonding process, thereby forming a bonding layer where the metal studs contact the second layer. The bonding layer thus provides a thermal conducting path from the chip to the heat spreader.

Abstract: Some embodiments disclose a low temperature semiconductor packaging apparatus and method. An apparatus generally comprises a heat spreader, a silicon die, and a thermal interface material disposed between the heat spreader and the silicon die comprising a plurality of metals capable of forming a transient liquid phase bond. A method generally comprises attaching a silicon die to a substrate, depositing a thermal interface material on at least one of the silicon die and a heat spreader, and attaching the heat spreader to the silicon die, wherein the thermal interface material comprises a plurality of metals capable of forming a transient liquid phase bond. Other embodiments are also described and claimed.

Abstract: The invention provides a semiconductor package having a substrate, a top surface and at least one semiconductor device attached to the top surface of the substrate. A cover is secured to the substrate creating a space between the cover and the substrate, with the semiconductor device residing within the space. The cover includes an inner chamber that is defined by an upper wall and a lower wall of the cover. The cavity contains a two-phase vaporizable liquid and a wick. Advantageously, the wick on the lower wall includes at least one recess that forms a thinned wall adjacent to a high heat generation portion of the semiconductor device. In one embodiment, the wick on the lower wall includes at least one channel that communicates with at least one of the recesses.

Abstract: A thermal interposer is provided for attachment to the back surface of a semiconductor device so as to give a very low thermal resistance. In one preferred embodiment, the thermal interposer has two plates containing wick structures such as grooves. The thermal interposer is integrated with a semiconductor device so as to form a vapor chamber. In particular, the back surface of the semiconductor chip is in direct contact with the interior sealed volume of the vapor chamber, so as to greatly reduce the thermal resistance from the combination of the chip and the vapor chamber. Further, the upper plate is thermally coupled to a heat-sinking fixture such as a heat sink or a cold plate.

Abstract: A ceramic multilayer substrate includes a plurality of ceramic substrates being stacked vertically, each substrate having a designated thickness; pattern layers formed on surfaces of the ceramic substrates so as to form circuit elements; external terminal vertically formed on side surfaces of the stacked ceramic substrates; and internal connection parts, each of which is formed on a part of one of the pattern layers, is connected to one of the external terminals so as to exchange signals with the outside, and is broad enough to surround at least partially the connected external terminal.

Abstract: A hermetically sealed, opto-electronic array housing assembly having a ceramic base, electrical connectors, a metal can, and a glass window. The glass window can support a micro-lens array. The metal can receives the glass window. The electrical impedance of the electrical connectors is beneficially carefully controlled to enable high-speed data communications. A multi-element optical fiber connector can provide for optical communications to and/or from an opto-electronic array contained within the housing.

Abstract: The semiconductor module comprises a base element (1), an insulating element (2), which is metallized on both sides and rests on the base element by one of the two metallizations, and at least one semiconductor element (6) arranged on the other of the two metallizations. An electrically insulating layer (51) is arranged in the edge region of the insulating element (2), the surface of this insulating layer forming a common planar surface with the surface of the second metallization. The blunting of the edges and corners of the metallization by level embedding of the entire metallized insulating element improves the insulating property of semiconductor module in the area of the critical electrical field region. Moreover, the arrangement in one plane permits simple and low-cost production.

Abstract: A semiconductor package with an embedded heat spreader (EHS) is proposed, which can be used for the fabrication of a semiconductor package, such as a FCBGA (Flip-Chip Ball Grid Array) package with a heat spreader, and which is characterized by the provision of a plurality of recessed portions, either in the heat spreader attach area of the substrate, or in the support portion of the heat spreader, or in both, so as to allow the fill-in portions of the adhesive layer that are filled in these recessed portions to form anchor structures to benefit the heat spreader against crosswise shear stress. Moreover, since the provision of these recessed portions allows an increase in the contact area of the adhesive layer with the substrate and the heat spreader, it can help increase the adhesive strength to provide the heat spreader more securely adhered in position on the substrate.

Abstract: A power semiconductor module has a circuit assembly body, which includes a metal base, a ceramic substrate, and a power semiconductor chip, and is combined with a package having terminals formed integrally. The ceramic substrate of the module has a structure such that an upper circuit plate and a lower plate are joined to both sides of a ceramic plate, respectively, and the metal base and the ceramic substrate are fixed to one another using solder, thereby improving reliability and lengthening a life of a power semiconductor module by optimizing a ceramic substrate and a metal base thereof, the dimensions thereof, and material and method used for a join formed between the ceramic substrate and metal base.

Abstract: Thin film circuit elements including capacitors, resistors, and inductance elements are formed on a large substrate, and semiconductor chips are wire bonded to the substrate. The elements and chips are sealed by potting a sealing resin. The large substrate is divided into multiple stripe substrates by dicing and a thin-film conductive layer is sputtered on cut surfaces of the stripe substrates, thereby electrically connecting edges of lower conductive patterns to edges of upper conductive patterns exposed from side surfaces of the sealing resin through the thin-film conductive layer. A Ni foundation layer and Au layer are successively plated on a surface of the thin-film conductive layer to form edge electrodes on side surfaces of the stripe substrates and the stripe substrates are divided finely into individual alumina substrates.

Abstract: The present invention provides a ceramic substrate which can keep a sufficiently large breakdown voltage even if the pore diameter of its maximum pore is 50 ?m or less to be larger than that of conventional ceramic substrates, can give a large fracture toughness value because of the presence of pores, can resist thermal impact, and can give a small warp amount at high temperature. The ceramic substrate of the present invention is a ceramic substrate for a semiconductor-producing/examining device having a conductor formed on a surface of the ceramic substrate or inside the ceramic substrate, wherein: the substrate is made of a non-oxide ceramic containing oxygen; and the pore diameter of the maximum pore thereof is 50 ?m or less.

Abstract: A ceramic substrate for a semiconductor producing/examining device which has high fracture toughness value, excellent thermal shock resistivity, high thermal conductivity and an excellent temperature rising and falling properties, can be used as a hot plate, an electrostatic chuck, a wafer prober and the like. A ceramic substrate, for a semiconductor producing/examining device, having a conductor formed inside or on the surface thereof has been sintered such that a fractured section thereof exhibits intergranular fracture.

Abstract: A semiconductor device includes a semiconductor chip, an external connection electrode connected to the chip and a resin package for covering the chip. The resin package includes a mounting surface which faces a supporting substrate. The electrode includes a thick portion and a thin portion. The thick portion is partially exposed to the outside at the mounting surface of the package.

Abstract: The invention provides a semiconductor package having a substrate, a top surface and at least one semiconductor device attached to the top surface of the substrate. A cover is secured to the substrate creating a space between the cover and the substrate, with the semiconductor device residing within the space. The cover includes an inner chamber that is defined by an upper wall and a lower wall of the cover. The cavity contains a two-phase vaporizable liquid and a wick. Advantageously, the wick on the lower wall includes at least one recess that forms a thinned wall adjacent to a high heat generation portion of the semiconductor device. In one embodiment, the wick on the lower wall includes at least one channel that communicates with at least one of the recesses.

Abstract: A plasma display device which improves the adhesion rate of a thermal conductive medium. A chassis base is disposed substantially parallel to a plasma display panel. A thermally conductive medium is disposed between the plasma display panel and the chassis base and is closely adhered to both the plasma display panel and the chassis base. An adhesive pad is interposed between the plasma display panel and the chassis base along the edge of the thermally conductive medium and is adhered to both the plasma display panel and the chassis base. The thermally conductive medium includes a plurality of thermally conductive particles of high thermal conductivity.

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; at least one chip mounted on the top surface of the substrate and electrically connected to the substrate; a heat sink attached to the top surface of the substrate by an adhesive material applied therebetween; and a plurality of solder balls implanted on the bottom surface of the substrate. The heat sink has a flat portion and a support portion connected to the flat portion. The support portion has at least one recess portion facing toward the top surface of the substrate and at least one burr formed on an interior surface of the recess portion such that the adhesive material can fill the recess portion and submerge the burr to provide an anchoring effect to firmly secure the heat sink in position on the substrate.

Abstract: A semiconductor module and a method for its fabrication are described. The semiconductor module has at least one semiconductor component that is disposed directly on a substrate body. The substrate body has an insulating ceramic provided with a metal layer. At least one connection conductor is joined to the metal layer by welding, in particular laser microwelding.

Abstract: A heat sink and heat spreader assembly including a solid member of a conductive material and a layer of a low melting alloy having phase change properties bonded to at least one surface of the solid member such that a welded joint is formed there between possessing a thickness of from 0.0001 to 0.020 inches and having a composition consisting essentially of said low melting alloy with the welded joint having an exposed relatively flat surface suitable for direct attachment to an electronic heat source or heat sink respectively.

Abstract: An object of the present invention is to provide a ceramic substrate for a semiconductor producing/examining device, capable of controlling the temperature of a resistance heating element, thereby suitably controlling the temperature of a semiconductor wafer placed on a ceramic substrate or the like and evenly heating the semiconductor wafer. The ceramic substrate for a semiconductor producing/examining device according to the present invention comprises at least a resistance heating element formed on a surface thereof or inside thereof, wherein a region: where a semiconductor wafer is directly placed; or where a semiconductor wafer is placed apart from the surface thereof while keeping a given distance, exists inside a surface region corresponding to the region where said resistance heating element is formed.

Abstract: Method and apparatus for optically testing (e.g., using a laser beam) an operating integrated circuit (device under test—DUT) that actively control the operating temperature of the DUT. This is chiefly useful with flip-chip packaged ICs. The temperature of the DUT varies with its operating power consumption, and this fluctuation in temperature adversely affects the results obtained during optical probing or other optical testing. Furthermore, the DUT may be damaged if its temperature exceeds design limits. The temperature of the DUT is controlled by thermally contacting the exposed backside surface of the DUT die to a diamond film heat conductor, an associated heat sink structure, and at least one thermoelectric device. The thermoelectric device is controlled by a temperature sensor proximal to the DUT. By controlling the amount and direction of the electrical current supplied to the thermoelectric device in response to the sensed temperature, the temperature of the DUT is maintained.

Abstract: An object of the present invention is to provide a hot plate which is superior in thermal conductivity, is superior in temperature-rising/dropping property, particularly in temperature-dropping property, and has high cooling thermal efficiency at the time of cooling. The hot plate of the present invention is a hotplate comprising: a ceramic substrate; and a resistance heating element formed on the surface of said ceramic substrate or inside said ceramic substrate, wherein said ceramic substrate has a leakage quantity of 10−7 Pa·m3/sec (He) or less by measurement with a helium leakage detector.

Abstract: A high-frequency semiconductor device is provided with a ceramic substrate, an element group including semiconductor elements and passive components mounted onto a bottom portion of the ceramic substrate, and a composite resin material layer formed on the bottom portion of the ceramic substrate so as to bury the element group. The composite resin material layer is formed by a composite resin material including an epoxy resin and an inorganic filler material, and has a flat bottom surface on which electrodes for connecting to the outside are formed. As packaging of a structure in which the receiving system and the transmitting system are formed in a single unit, such as an RF module, the high-frequency semiconductor device achieves a small size, a high mounting density, and excellent heat release properties.

Abstract: A high-frequency semiconductor device is provided with a ceramic substrate, an element group including semiconductor elements and passive components mounted onto a bottom portion of the ceramic substrate, and a composite resin material layer formed on the bottom portion of the ceramic substrate so as to bury the element group. The composite resin material layer is formed by a composite resin material including an epoxy resin and an inorganic filler material, and has a flat bottom surface on which electrodes for connecting to the outside are formed. As packaging of a structure in which the receiving system and the transmitting system are formed in a single unit, such as an RF module, the high-frequency semiconductor device achieves a small size, a high mounting density, and excellent heat release properties.

Abstract: It is an object of the present invention to provide a ceramic substrate for a semiconductor producing/examining device which has high fracture toughness value, excellent thermal shock resistivity, high thermal conductivity and an excellent temperature rising and falling properties, and is preferable as a hot plate, an electrostatic chuck, a wafer prober and the like. A ceramic substrate, for a semiconductor producing/examining device, having a conductor formed inside thereof or on the surface thereof of the present invention is the ceramic substrate, wherein said ceramic substrate has been sintered such that a fractured section thereof exhibits intergranular fracture.

Abstract: Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises providing the substrate assembly successively into each of the plurality of process zones to bond the first and second aluminum layers to the dielectric layer and obtain a direct bonded aluminum (DAB) substrate, attaching a semiconductor die to the first aluminum layer of the DAB substrate, and forming an enclosure around the semiconductor die and the DAB substrate while exposing a substantial portion of the second aluminum layer for enhanced heat dissipation.

Abstract: The present invention provides a semiconductor device comprising as a core substrate a high thermo conductive ceramic substrate having circuit patterns on opposed surfaces. The high thermo conductive ceramic substrate has on one surface a first circuit board of at least one layer having a first cavity structure, and on the other surface a second circuit board of at least one layer having a second cavity structure. A first active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the first cavity, a second active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the second cavity, an external electrode is integrated with the surface of the second circuit board, and the first circuit board surface is equipped with a cap or sealed with resin.

Abstract: A stereolithographically fabricated package that surrounds at least a portion of a semiconductor die so as to substantially hermetically seal the same. The package may be fabricated from thermoplastic glass, other types of glass, ceramics, or metals. Stereolithographic processes are used to fabricate at least a portion of the substantially hermetic package around the semiconductor dice of assemblies including carrier substrates or leads or around bare or minimally packaged semiconductor dice, including on dice that have yet to be singulated from a wafer. As at least a portion of the substantially hermetic package is stereolithographically fabricated, that portion may include a series of superimposed, contiguous, mutually adhered layers of a suitable hermetic material. The layers can be fabricated by consolidated selected regions of a layer of unconsolidated particulate or powdered material, or by defining an object layer from a sheet of material.

Abstract: In a ceramic circuit board having a ceramic substrate and a metal circuit plate bonded to one surface of the ceramic substrate, assuming that the warpage of the ceramic circuit board is a difference in height between the center and edge of the metal circuit plate and is positive (+) when the circuit board warps so as to be concave on the side of the metal circuit plate, the warpage of the ceramic circuit board is in the range of from −0.1 mm to +0.3 mm when the ceramic circuit board is heated to 350° C., and in the range of from +0.05 mm to +0.6 mm when the temperature of the ceramic circuit board is returned to a room temperature after the ceramic circuit board is heated to 350° C. The initial warpage of the ceramic circuit board is in the range of from +0.05 mm to +0.6 mm.

Abstract: A monolithic semiconducting ceramic electronic component includes barium titanate-based semiconducting ceramic layers and internal electrode layers alternately deposited, and external electrodes electrically connected to the internal electrode layers. The semiconducting ceramic layers contain ceramic particles having an average particle size of about 1 &mgr;m or less and the average number of ceramic particles per layer in the direction perpendicular to the semiconductor layers is about 10 or more. The internal electrode layers are preferably composed of a nickel-based metal.

Abstract: A circuit component package of the present invention includes a mounting member including a substrate and a wiring pattern provided on the substrate, a circuit component including a component body and an external electrode provided at an end of the component body, the circuit component being arranged on the mounting member, and a conductive material that electrically connects the external electrode with the wiring pattern. In the circuit component, the component body is shaped so that a first portion of the component body on which the external electrode is provided is thinner than a second portion of the component body, the second portion being a portion on which the external electrode is not provided, and further, the external electrode is arranged in a region on a side on which the component body is positioned with respect to a reference plane containing a predetermined surface of the component body.

Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom. The metal clip or drain clip has a plurality, a parallel spaced fins extending from its outwardly facing surface.

Abstract: A highly reliable member for a semiconductor device, in which a high melting point metallizing layer, which consists mainly of a high melting point metal such as W and/or Mo, and an intervening metal layer, which has a melting point of not greater than 1,000° C. and consists mainly of at least one selected from among Ni, Cu and Fe, are provided on an AlN substrate material in this order on the AlN substrate material, and a conductor layer consisting mainly of copper is directly bonded to the intervening metal layer without intervention of a solder material layer. A semiconductor element or the like is mounted on the member for a semiconductor device, thereby fabricating a semiconductor device. The high melting point metallizing layer is formed on an aluminum nitride substrate by post-fire or co-fire metallization.

Abstract: An electronic device has a semiconductor chip and a passive component, whose electrical values can be varied. The semiconductor chip is electrically conductively connected to a rewiring structure that, together with the semiconductor chip and with the passive component, is enclosed by a housing made of plastic. A method for producing the electronic device is also described.

Abstract: Optical systems for cooling optoelectronic elements are provided. A representative optical system includes a substrate and a first optoelectronic element supported by the substrate. Additionally, a first channel is formed in the substrate and a first heat transfer fluid is arranged in the first channel. The first heat transfer fluid is thermally coupled with the first optoelectronic element so that at least a quantity of heat produced by the first optoelectronic element is dissipated by the first heat transfer fluid. Methods and other systems also are provided.

Abstract: A composite ceramic board comprising an insulating board of insulating layers of alumina ceramics and dielectric layers of ceramics having a dielectric constant smaller than that of said insulating layers which are fired as a unitary structure, and metallized wirings of a low-resistance conductor such as of Au, Ag, Cu or Pl formed on the surfaces and inside thereof, and a method of producing the same. The composite ceramic board not only has a large strength and a high thermal conductivity but also exhibits excellent high-frequency characteristics and is suited for use as a high-frequency wiring board. The invention further provides an optical/electronic-mounted circuit substrate using the above board, and a mounted board having the circuit substrate of the invention connected to an electronic circuit formed on a mother board.

Abstract: A semiconductor package and a method for forming the same are provided. The semiconductor package comprises a chip having an active surface and a back surface. The semiconductor package further comprises a substrate having an upper surface and a lower surface opposite the upper surface. The chip is electrically connected to the upper surface of the substrate. A lid is thermally coupled to the back surface of the chip. A thermal interface material (TIM) is located between the chip and the lid. The TIM includes voids to reduce thermomechanical stresses applied on the chip and the TIM, thereby preventing package cracks.

Abstract: A semiconductor device is formed from a semiconductor on insulator substrate, with the insulator or dielectric layer being formed from a polymer precursor to ceramic. The polymer precursor to ceramic may be SiC, diamond, or diamond-like carbon. The resulting device has improved thermal properties, smoothness, dielectric properties, ease of processing, and performance. A method of making the semiconductor device is also disclosed.

Abstract: A bottom plate (4a) of a box-shaped package (4) is made of a metal. Portions of the package (4) (peripheral wall (4b) and cover plate (4c)) other than the bottom plate (4a) are made of a resin or a ceramic that is more economical than the metal. The material cost of the package (4) can thus be reduced in comparison with the case where the package (4) is made of the metal as a whole. A Peltier module (5) is fixed to the bottom plate (4a). A base (6) is fixed over the Peltier module (5), and a semiconductor laser chip (2) is disposed on this base (6). Heat from the semiconductor laser chip (2) and from the Peltier module (5) can be efficiently radiated through the bottom plate (4a) made of the metal, and deterioration of heat radiation performance can be prevented.

Abstract: A power semiconductor module has a circuit assembly body, which includes a metal base, a ceramic substrate, and a power semiconductor chip, and is combined with a package having terminals formed integrally. The ceramic substrate of the module has a structure such that an upper circuit plate and a lower plate are joined to both sides of a ceramic plate, respectively, and the metal base and the ceramic substrate are fixed to one another using solder, thereby improving reliability and lengthening a life of a power semiconductor module by optimizing a ceramic substrate and a metal base thereof, the dimensions thereof, and material and method used for a join formed between the ceramic substrate and metal base.

Abstract: A monolithic semiconducting ceramic electronic component includes barium titanate-based semiconducting ceramic layers and internal electrode layers alternately deposited, and external electrodes electrically connected to the internal electrode layers. The semiconducting ceramic layers contain ceramic particles having an average particle size of about 1 &mgr;m or less and the average number of ceramic particles per layer in the direction perpendicular to the semiconductor layers is about 10 or more. The internal electrode layers are preferably composed of a nickel-based metal.

Abstract: A semiconductor package with a heat sink is provided, wherein a substrate is formed with a metal core layer and at least an opening that penetrates through the substrate. At least a semiconductor chip is mounted on the substrate, with bond pads formed on the semiconductor chip being exposed to the opening, so as to allow the semiconductor chip to be electrically connected to the substrate by a plurality of gold wires that are bonded to the bond pads and formed through the opening. The metal core layer of the substrate provides a grounding plane to improve electrical quality of the semiconductor package, and acts as a heat sink to enhance heat-dissipating efficiency of the semiconductor package. Moreover, an encapsulant for encapsulating the semiconductor chip contains a plurality of thermally conductive metal particles to further facilitate dissipation of heat produced from the semiconductor chip.

Abstract: A semiconductor-on-insulator (SOI) device includes a thermoelectric cooler on a back side of the device. The thermoelectric cooler is formed on a thinned portion of a deep bulk semiconductor layer of the SOI device. The thermoelectric device includes a plurality of pairs of opposite conductivity semiconductor material blocks formed on a metal layer deposited on the thinned portion. The thinning of the thinned portion may be accomplished in multiple etching steps of the deep silicon layer, such as a fast etching down to an etch stop and a slower, more controlled etch to the desired thickness for the thinned portion.

Abstract: An electronic package includes a multi-layer substrate module that includes electrically parallel vias to carry an electrical data signal between two nodes. For example, the vias may be coupled between nodes of different metallization layers in or on the substrate module. Alternatively, the vias may be coupled between a node of one of the metallization layers and a signal transmission line that feeds or receives data signals or an interconnection that connects the multi-layer module to a next higher level of the assembly, such as a printed circuit board. In other implementations, the vias may be coupled between a data signal transmission line and an interconnection to the next-higher level of the assembly.

Abstract: A semiconductor device comprises at least one first semiconductor layer (1-4) and a second layer (8) applied on at least a surface portion of the first layer for protecting the device. The protecting layer is of a second material having a larger energy gap between the valence band and the conduction band than a first material forming said first layer. The second material has at least in one portion of said protecting layer a nano-crystalline and amorphous structure by being composed of crystalline gains with a size less than 100 nm and a resistivity at room temperature exceeding 1×1010 &OHgr;cm.

Abstract: A semiconductor chip is shown containing an integral heat spreading layer that more effectively transmits heat from the die to ambient as a result of spreading the heat out on the die over a larger cross sectional area. Local hot spots are minimized which allows the semiconductor chip to operate at a higher frequency for a given upper threshold temperature. Also shown is a method of manufacturing such a semiconductor chip, and the associated method of cooling a semiconductor chip.

Abstract: A multilayer ceramic electronic component includes an electronic component body a notch formed in a side surface of the electronic component body, and a joining electrode formed by dividing a joining via hole conductor is formed at a portion of an inside surface defining the notch. A cover that is mounted to the electronic component body has a leg, with the leg of the cover being positioned inside the notch. By joining the leg to the joining electrode, the cover is secured to the electronic component body. The multilayer ceramic electronic component includes an LGA (land grid array) type external terminal electrode. The multilayer ceramic electronic component makes it possible to mount a cover for covering a mounted component without increasing the planar dimensions of the electronic component and without decreasing an area for mounting a component to be mounted.

Abstract: A sealed ceramic package for a semiconductor device and a method of fabricating the same are disclosed. In one embodiment, a ceramic substrate has a set of cavities each having an opening at a substrate top surface. A semiconductor die is disposed within each cavity, and is electrically connected through the substrate to input/output terminals of the substrate. The substrate has a metal film on the top surface thereof around the opening of the respective the cavities. A metal lid panel, covering the cavity openings, is soldered to the metal film by reflowing a layer of solder disposed over a lid panel bottom surface, thereby sealing the die in each cavity. Subsequently, individual packages are singulated from the ceramic substrate.

Abstract: A die has a part that is sealed with a cap. The seal can be hermetic or non-hermetic. If hermetic, a layer of glass or metal is formed in the surface of the die, and the cap has a layer of glass or metal at a peripheral area so that, when heated, the layers form a hermetic seal. A non-hermetic seal can be formed by bonding a cap with a patterned adhesive. The cap, which can be silicon or can be a metal paddle, is electrically coupled to a fixed voltage to shield the part of the die.

Abstract: The present invention provides a silicon nitride ceramic substrate composed of a silicon nitride sintered body in which maximum size of pore existing in grain boundary phase of the sintered body is 0.3 &mgr;m or less, and having a thermal conductivity of 50 W/mK or more and a three point bending strength of 500 MPa or more, wherein a leak current is 1000 nA or less when an alternative voltage of 1.5 kV-100 Hz is applied to a portion between front and back surfaces of the silicon nitride sintered body under conditions of a temperature of 25° C. and a relative humidity of 70%. According to the above structure of the present invention, there can be provided a silicon nitride ceramic substrate capable of effectively suppressing a leak current generation when the above substrate is assembled into various power modules and circuit boards, and capable of greatly improving insulating property and operative reliability of power modules in which output power and capacity are greatly increased.