Abstract: A relay connector that is interposed between two substrates provided with mutually connectable connecting parts and that indirectly connects the two substrates, wherein the relay connector is provided with a first connecting part capable of mechanistically connecting to the connecting part of one of the substrates, and a second connecting part capable of mechanistically connecting to the connecting part of the other substrate.

Abstract: A semiconductor package includes a semiconductor chip electrically connected to a substrate, and a molding part including first molding members and second molding members arranged in an alternating pattern. The first molding members have a first physical flexibility which is different from a second physical flexibility of the second molding members.

Abstract: An insertion vertical electrode region and part of a case-contact horizontal electrode region of an electrode insertion part of an external electrode is inserted and molded in an intra-case insertion region of a housing case. Inserting the case-contact horizontal electrode region, which serves as part of the electrode insertion part, in the intra-case insertion region allows the upper and lower surfaces of the case-contact horizontal electrode region to be in contact with the intra-case insertion region.

Abstract: An integrated circuit package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween and a semiconductor die mounted on the first surface of the substrate. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulant encapsulates the wirebonds and the semiconductor die. A heat spreader has a cap, at least a portion of the cap extending inwardly toward and being spaced from the semiconductor die. The encapsulant fills the space between the portion of the cap and the semiconductor die. The heat spreader further has at least one sidewall extending from the cap, the at least one sidewall disposed on the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.

Abstract: According to one embodiment, a circuit board is provided with a first rectangular electronic component, a board and a reinforcing plate. The first electronic component has a plurality of connection terminals. The board has the first electronic component mounted thereon via the connection terminals, and has a through hole for receiving a second electronic component at a position at which the first electronic component overlaps with the second electronic component. The reinforcing plate is attached to the back surface of the board, and has a plurality of first portions near the corner portions of the first electronic component, and a second portion of a strip shape coupling the first portions and located near the hole. The first and second portions are formed integral as one body.

Abstract: Embodiments of the invention comprise a homogeneous heat spreading cap element in chip packages to facilitate better heat spreading and dissipation. The heat spreading cap comprises a single high-K graphite layer supported by a copper frame for increased stability and reduced thermal warpage during handling and operation while minimizing thermal penalty by reducing the amount of material having a relatively low heat conductivity that is needed in conventional heat spreading caps.

Abstract: A semiconductor module may include a heat-transferring part connecting at least one of a control device, a buffer semiconductor device, and a memory device to a connector. The heat-transferring part may be configured to have a thermal conductivity higher than the substrate. Accordingly, during the operation of the semiconductor module, the connector can have a temperature lower than the devices.

Abstract: A wafer having a plurality of light-emitting diode (LED) submounts and a method for fabricating an LED submount are provided. Each of the plurality of LED submounts of the wafer includes: a substrate (201), including through vias (203a); an LED die (208) mounted in a cavity (204) on a first side of the substrate (201) and connected to the through vias (203a); a redistribution layer (205a) attached to a second side of the substrate (201) connected to the LED die (208) through the through vias (203a). The method includes providing a wafer as a substrate (201); providing a cavity (204) in the substrate (201) on a first side of the substrate (201); providing through vias (203a) in the substrate (201), providing a redistribution layer (205a) on the second side of the substrate (201), and mounting an LED (208) in the cavity (204), wherein the LED die (208) is connected to the redistribution layer (205a) through the through vias (203a).

Abstract: An LED driving circuit package includes a rectification unit to receive an AC power voltage and rectify the AC power voltage to generate a ripple voltage, an LED driving switching unit including a plurality of switch units and a plurality of current control units. The LED driving circuit package further includes a low voltage control unit including a circuit power supply unit to generate low voltage power, a voltage detection unit to detect a magnitude of the ripple voltage, a reference frequency generation unit to generate a reference frequency, and a reference pulse generation unit to generate a reference pulse for controlling the operation of the LED driving switch unit according to the reference frequency and a magnitude of the voltage detected by the voltage detection unit.

Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.

Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.

Abstract: A light source and method for making the same are disclosed. The light source includes a conducting substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer overlying the first layer, and a second layer of semiconductor material of an opposite conductivity type from the first conductivity type overlying the active layer. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first layer in the first segment to the second layer in the second segment. A power contact is electrically connected to the second layer in the first segment, and a second power contact electrically connected to the first layer in the second segment.

Abstract: A method of manufacturing a package may include forming a package module by disposing a plurality of components on an insulating plate filled with a viscous insulating liquid and curing the viscous insulating liquid, exposing at least portions of terminals of the plurality of components by polishing the insulating plate to have a predetermined thickness and then etching at least one portion of the insulating plate, forming a conductive stud on the at least exposed portions of the terminals and cutting the package module into predetermined unit packages, and examining reliability of a printed circuit board and bonding the unit package to the printed circuit board having confirmed reliability using the conductive stud.

Abstract: A power semiconductor module includes a metal plate having a through hole with an eaves; an insulated metal block including a metal block having an element mounting region on an upper surface, and an insulating layer on surfaces other than the upper surface and a portion of the upper surface other than the element mounting region; a circuit pattern disposed over the metal plate with the insulating material interposed therebetween; a power semiconductor element fixed to the element mounting region of the upper surface of the metal block; and a connection conductor connecting the power semiconductor element and the circuit pattern. The insulated metal block is fitted into the through hole in the metal plate so that the insulating layer on the upper surface of the insulated metal block contacts the eaves of the through hole to electrically insulate between the metal block and the metal plate.

Abstract: A heat sink has a fixation surface and a heat release surface opposite from the fixation surface. A fin is provided in a central portion of the heat release surface. An insulating member is provided on the fixation surface of the heat sink. An electroconductive member is provided on the insulating member. A semiconductor chip is provided on the electroconductive member. A metal frame is connected to the semiconductor chip. A molding resin covers the heat sink, the insulating member, the electroconductive member, the semiconductor chip, and the metal frame so that the fin is exposed to outside. A hole extends through a peripheral portion of the heat sink and a peripheral portion of the molding resin. The semiconductor module is mounted on a cooling jacket by passing a screw through the hole.

Abstract: A semiconductor device with substrate-side exposed device-side electrode (SEDE) is disclosed. The semiconductor device has semiconductor substrate (SCS) with device-side, substrate-side and semiconductor device region (SDR) at device-side. Device-side electrodes (DSE) are formed for device operation. A through substrate trench (TST) is extended through SCS, reaching a DSE turning it into an SEDE. The SEDE can be interconnected via conductive interconnector through TST. A substrate-side electrode (SSE) and a windowed substrate-side passivation (SSPV) atop SSE can be included. The SSPV defines an area of SSE for spreading solder material during device packaging. A device-side passivation (DSPV) beneath thus covering the device-side of SEDE can be included. A DSE can also include an extended support ledge, stacked below an SEDE, for structurally supporting it during post-wafer processing packaging.

Abstract: An apparatus relates generally to a microelectronic assembly. In this apparatus, a first substrate and a second substrate each have opposing surfaces. Contact arrangements are disposed on a surface of the first substrate, including: first contacts disposed as a ring to provide a first array of the contact arrangements on such surface; and second contacts disposed interior to the ring of the first contacts to provide a second array of the contact arrangements on the first surface. The first contacts and the second contacts are for interconnection with first microelectronic dies and second microelectronic dies. The second microelectronic dies are disposed below the first microelectronic dies in same a package as the first microelectronic dies. The first microelectronic dies and the second microelectronic dies include at least two ranks thereof for commonly sharing the first contacts and the second contacts among the first microelectronic dies and the second microelectronic dies.

Abstract: An apparatus for passively cooling electronics. The apparatus for passively cooling electronics includes at least one heat sink configured to be thermally coupled to at least one cabinet. When the at least one cabinet is thermally coupled to the at least one heat sink, the at least one heat sink draws heat from the at least one cabinet.

Abstract: In a semiconductor device, heat radiation plates are respectively disposed on a front surface side and a rear surface side of semiconductor chips in an upper arm and a lower arm. A lead-out conductor part includes a parallel conductor that includes a positive electrode terminal, a negative electrode terminal, and an insulating film disposed between the positive electrode terminal and the negative electrode terminal, and the positive electrode terminal and the negative electrode terminal are disposed oppositely while sandwiching the insulation film. The semiconductor chips are covered by a resin mold part, surfaces of the heat radiation plates opposite to the semiconductor chips, a part of the positive electrode terminal, and a part of the negative electrode terminal are exposed from the resin mold part, and at least a part of the parallel conductor in the lead-out conductor part enters the resin mold part.

Abstract: A junction box for a vehicle is provided. The junction box includes at least one printed circuit board having a metal core and a heat transfer member formed at an edge of the printed circuit board. In addition, the junction box includes a case in which at least one printed circuit board is disposed. Further, the heat transfer member contacts the inner surface of the case.

Abstract: A multi-component heat spreader comprising a top component having a first surface and an opposing second surface with either a cavity extending therein from the second surface thereof or a projection extending from the second surface thereof. The multi-component heat spreader further includes at least one additional component, such as a footing component or a spacer component, having a first surface and an opposing second surface with either a cavity extending therein from the second surface thereof or a projection extending from the second surface thereof, which is opposite from the top component cavity/projection. The additional component is attached to the top component, such as by brazing, wherein the top component cavity/projection is mated to the additional component cavity/projection.

Abstract: In one embodiment, a semiconductor package includes a circuit substrate, a plurality of semiconductor chips stacked on the circuit substrate, insulating adhesive patterns interposed between the semiconductor chips, a heat slug provided on an uppermost semiconductor chip and adhered to the uppermost semiconductor chip by a heat dissipative adhesive pattern, and a mold structure provided on the circuit substrate to cover sidewalls of the semiconductor chips, the insulating adhesive patterns, the heat dissipative adhesive pattern and the heat slug. A failure of the semiconductor package during a manufacturing process of the mold structure may be reduced. The semiconductor package may therefore have good operating characteristics and reliability.

Abstract: An embodiment of an electronic assembly for mounting on an electronic board includes a plurality of electric contact regions exposed on a mounting surface of the electronic board. The electronic assembly includes a chip of semiconductor material in which at least one electronic component is integrated, at least one support element including a first main surface and a second main surface opposite to the first main surface, the chip being enclosed by the at least one support element, a heat dissipation plate thermally coupled to said chip to dissipate the heat produced by it, exposed on the first main surface of the support element, a plurality of contact elements, each electrically coupled to a respective electric terminal of the electronic component integrated in the chip, exposed on the same first main surface of which is exposed to the dissipation plate.

Abstract: A semiconductor device has a substrate having a front surface, and a rear surface including a fin forming region and a peripheral region surrounding the fin forming region. An insulating substrate is disposed on the front surface of the substrate. A semiconductor chip is disposed on the insulating substrate. A plurality of fins is formed in the fin forming region, and a reinforcing member is formed on the substrate through a bonding member, so as to overlap the peripheral region.

Abstract: The present invention relates to a light-emitting diode package having a plurality of inner leads, a plurality of outer leads extending from the inner leads, a slug electrically connected to at least one of the inner leads, the slug having a thermally conductive material, a light-emitting chip arranged on the slug, and a housing supporting the light-emitting diode package.

Abstract: A semiconductor device includes a cooling device, an insulating substrate, a semiconductor element, an external connection terminal, and a resin portion. The insulating substrate is brazed to an outer surface of the cooling device. The semiconductor element is brazed to the insulating substrate. The external connection terminal includes a first end, which is electrically connected to the semiconductor element, and an opposite second end. The resin portion is molded to the insulating substrate, the semiconductor element, the first end of the external connection terminal, and at least part of the cooling device.

Abstract: A semiconductor device has a semiconductor die mounted to a substrate. A recess is formed in a back surface of the semiconductor die to an edge of the semiconductor die with sidewalls on at least two sides of the semiconductor die. The sidewalls are formed by removing a portion of the back surface of the die, or by forming a barrier layer on at least two sides of the die. A channel can be formed in the back surface of the semiconductor die to contain the TIM. A TIM is formed in the recess. A heat spreader is mounted in the recess over the TIM with a down leg portion of the heat spreader thermally connected to the substrate. The sidewalls contain the TIM to maintain uniform coverage of the TIM between the heat spreader and back surface of the semiconductor die.

Abstract: Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.

Abstract: A chip stacking packaging structure is provided for achieving high-density stacking and improving a heat dissipation efficiency of the chip stacking packaging structure. The chip stacking packaging structure includes a main substrate and at least one stacking substrate in which a main chip is disposed in the main substrate, at least one stacking chip is disposed on the stacking substrate, and a side edge of the stacking substrate is disposed on the main substrate, so that the stacking chip is connected to the main chip.

Abstract: Provided is a semiconductor package including a lower package, an interposer on the lower package, and an upper package on the interposer. The lower package may include a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower heat-transfer layer on the lower semiconductor chip. The interposer may include an interposer substrate, first and second heat-transfer openings defined by recessed bottom and top surfaces, respectively, of the interposer substrate, an upper interposer heat-transfer pad disposed in the second heat-transfer opening, and an upper heat-transfer layer disposed on the upper interposer heat-transfer pad. The upper package may include an upper package substrate, an upper package heat-transfer pad, which may be disposed in a third heat-transfer opening defined by a recessed bottom surface of the upper package substrate, and an upper semiconductor chip disposed on the upper package substrate.

Abstract: The present invention provides a semiconductor device with an improved yield ratio and reduced height and manufacturing cost; and a method of manufacturing the semiconductor device. According to an aspect of the present invention, there is provided a semiconductor device including a substrate, a semiconductor element that is flip-chip connected to the substrate, and a molding portion that seals the semiconductor element. The side surfaces of the semiconductor element are enclosed by the molding portion. An upper surface of the semiconductor element is not enclosed by the molding portion. Damage to the side surfaces of the semiconductor element caused by an external impact when the semiconductor device is stored is minimized, because the molding portion protects the side surfaces of the semiconductor element. Accordingly, the yield ratio of the semiconductor device is improved.

Abstract: An integrated circuit comprises a heat sink devoid of electronic components and interposed between a back side of a bottom electronic chip and an upper exterior side of an encapsulation, the sink comprising a front side placed on the back side of the bottom electronic chip. The back side of the bottom electronic chip comprises pads and the front side of the sink comprises pads mechanically fastened to facing pads of the back side of the bottom electronic chip.

Abstract: A semiconductor device includes a semiconductor element in the form of a flat plate that has opposed first and second surfaces, an insulating layer that covers control wiring located on the first surface side of the semiconductor element, a metal block that is bonded to the first surface side of the semiconductor element via a solder layer, and a protective film that is formed between the metal block and the insulating layer, the protective film having a hardness equal to or greater than a hardness of the metal block. When viewed from the first surface side, the protective film is formed in an area at least including a position where an edge portion of the metal block and the control wiring cross each other.

Abstract: In order to produce a plastic container (1, 2) having a planar electronic element (15), a planar electronic element (15) is introduced into a recess (29) of an inner face of a mold. The mold comprises an outer mold part (10) and a mold core (11), which form a mold cavity (12). Molten plastic material is injected into the mold cavity (12). After the subsequent cooling of the plastic material, mold removal is carried out. The recess (29) is arranged on an inner face (26) of the outer mold part (10). The molten plastic material is injected into the mold cavity in such a way that the molten plastic material flows substantially parallel along a surface (25) of the planar electronic element (15) facing the mold cavity (12). The planar electronic element (15) is an RFID inlay, for example. The planar electronic element does not require a protective casing and can be sprayed directly.

Abstract: A semiconductor device includes a carrier, a die including a first surface and a second surface, a plurality of first conductive bumps disposed between the second surface of the carrier and the die, wherein the die is flip bonded on the carrier, and a molding disposed over the carrier and surrounding the die, wherein the molding includes a recessed portion disposed on the first surface of the die thereby leaving a portion of the first surface is uncovered by the molding. Further, a method of manufacturing a semiconductor device includes providing a carrier, flip bonding a die on the carrier, disposing a rubber material on a first surface of the die and within the first surface of the die, and forming a molding surrounding the rubber material and covering the carrier.

Abstract: Microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the method includes forming one or more redistribution layers over an encapsulated die having a frontside bond pad area and a frontside passivated non-bond pad area. The redistribution layers are formed to have a frontside opening over the non-bond pad area of the encapsulated die. A primary heat sink body is provided in the frontside opening and thermally coupled to the encapsulated die. A contact array is formed over the redistribution layers and is electrically coupled to a plurality bond pads located on the frontside bond pad area of the encapsulated die.

Abstract: A socket is provided that is configured to be secured to a surface of a host circuit board by solder using a solder reflow process. The solder reflow process that is used for this purpose may be the same solder reflow process that is used to make electrical connections between the array of electrical contacts disposed on the lower surface of the socket and the array of electrical contacts disposed on the upper surface of the host CB. Because the solder reflow process is an automated process, the process of securing the socket to the surface of the host CB does not have to be performed manually, but can be performed automatically as part of a typical automated surface mount technology (SMT) process of the type that is typically used to mount components on a PCB.

Abstract: An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark.

Abstract: Integrated passive devices for silicon on insulator (SOI) FinFET technologies and methods of manufacture are disclosed. The method includes forming a passive device on a substrate on insulator material. The method further includes removing a portion of the insulator material to expose an underside surface of the substrate on insulator material. The method further includes forming material on the underside surface of the substrate on insulator material, thereby locally thickening the substrate on insulator material under the passive device.

Abstract: A chip-package includes a chip-carrier configured to carry a chip, the chip arranged over a chip-carrier side, wherein the chip-carrier side is configured in electrical connection with a chip back side; an insulation material including: a first insulation portion formed over a first chip lateral side; a second insulation portion formed over a second chip lateral side, wherein the first chip lateral side and the second chip lateral side each abuts opposite edges of the chip back side; and a third insulation portion formed over at least part of a chip front side, the chip front side including one or more electrical contacts formed within the chip front side; wherein at least part of the first insulation portion is arranged over the chip-carrier side and wherein the first insulation portion is configured to extend in a direction perpendicular to the first chip lateral side further than the chip-carrier.

Abstract: A structure for heat dissipation of motors including a heat dissipation component. A plurality of bosses for heat dissipation is arranged at intervals on the bottom of the heat dissipation component and an airflow passage is formed at the periphery of each boss. The heat dissipation component is a motor controller or an end cover. The structure for heat dissipation of motors is simple and reasonable. It features fast dissipation speed and excellent dissipation effects. It uses fewer materials, and is low in cost.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: A semiconductor device which includes a substrate, a semiconductor element arranged on the substrate, a heat dissipation component arranged on the semiconductor element, and a mold component covering an upper part of the substrate, the semiconductor element and the heat dissipation component, wherein an area of a surface on the semiconductor element of the heat dissipation component is larger than an area of a surface on which the heat dissipation component of the semiconductor element is arranged.

Abstract: A semiconductor device including a chip stack structure having a plurality of semiconductor chips, the semiconductor chips being stacked such that they are electrically connected using through-electrodes, and a support frame attached to a side surface of the chip stack structure.

Abstract: A semiconductor module arrangement includes a semiconductor module having a top side, an underside opposite the top side, and a plurality of electrical connection contacts formed at the top side. The semiconductor module arrangement additionally includes a printed circuit board, a heat sink having a mounting side, and one or a plurality of fixing elements for fixing the printed circuit board to the heat sink. Either a multiplicity of projections are formed at the underside of the semiconductor module and a multiplicity of receiving regions for receiving the projections are formed at the mounting side of the heat sink, or a multiplicity of projections are formed at the mounting side of the heat sink and a multiplicity of receiving regions for receiving the projections are formed at the underside of the semiconductor module. In any case, each of the projections extends into one of the receiving regions.

Abstract: Flip chip packages are described that include two or more thermal interface materials (TIMs). A die is mounted to a substrate by solder bumps. A first TIM is applied to the die, and has a first thermal resistance. A second TIM is applied to the die and/or the substrate, and has a second thermal resistance that is greater than the first thermal resistance. An open end of a heat spreader lid is mounted to the substrate such that the die is positioned in an enclosure formed by the heat spreader lid and substrate. The first TIM and the second TIM are each in contact with an inner surface of the heat spreader lid. A ring-shaped stiffener may surround the die and be connected between the substrate and heat spreader lid by the second TIM.

Abstract: A method includes attaching a wafer on a carrier through an adhesive, and forming trenches in the carrier to convert the carrier into a heat sink. The heat sink, the carrier, and the adhesive are sawed into a plurality of packages.

Abstract: A heat dissipation device of a light engine for a projector has a housing, a fan module, a light engine and a heat sink. The light engine is positioned in the housing and connected to the heat sink. The heat sink is positioned out of the housing. The housing has a fan-enclosed flow channel attached on an outer surface of the housing. The fan module is guided by the fan-enclosed flow channel to the heat sink to enhance heat dissipation efficiency of the light engine for the projector.

Abstract: The present specification relates to a semiconductor device in which a metal plate is attached onto a surface of a resin package, and provides a structure in which the metal plate is not easy to separate. The semiconductor device disclosed in the present specification includes semiconductor chips (IGBT, diode), a resin package molding the semiconductor chips, and metal plates fixed onto the surface of the resin package. An anchoring member is bridged between two points on a back face of the metal plate. A space between one of the metal plates and the anchoring member is filled with a molding resin of the resin package. The anchoring member firmly bites the resin package, and therefore, the metal plate is difficult to be released from the resin package.