Abstract: The present specification relates to a semiconductor device in which a metal plate is attached onto a surface of a resin package, and provides a structure in which the metal plate is not easy to separate. The semiconductor device disclosed in the present specification includes semiconductor chips (IGBT, diode), a resin package molding the semiconductor chips, and metal plates fixed onto the surface of the resin package. An anchoring member is bridged between two points on a back face of the metal plate. A space between one of the metal plates and the anchoring member is filled with a molding resin of the resin package. The anchoring member firmly bites the resin package, and therefore, the metal plate is difficult to be released from the resin package.

Abstract: An encapsulated semiconductor device includes: a first conduction path formative plate (1); a second conduction path formative plate (5) joined to the first conduction path formative plate; a power element (12) bonded to the first conduction path formative plate; a heatsink (14) held by the first conduction path formative plate with an insulation sheet (13) interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin (9) configured to encapsulate the first and second conduction path formative plates. A through hole (3) or a lead gap (1b) is formed in a region of the first conduction path formative plate in contact with the insulation sheet. The insulation sheet is press-fitted into the through hole or the lead gap.

Abstract: An integrated heat sink array is introduced in SOI power devices having multiple unit cells, which can be used to reduce the temperature rise in obtaining more uniform temperature peaks for all the unit cells across the device area, so that the hot spot which is prone to breakdown can be avoided, thus the safe operating area of the device can be improved. Also the array sacrifice less area of the device, therefore results in low Rdson.

Abstract: A semiconductor module system includes a first semiconductor module and a second semiconductor module. The first semiconductor module has a first housing and a first base plate. The second semiconductor module has a second housing and a second base plate. The first base plate includes a first fitting segment fitted with a semiconductor component, and a first adjustment segment separated from the first fitting segment. The first adjustment segment also has a first adjustment device. The second base plate has a second adjustment device. The first semiconductor module and the second semiconductor module are configured to be positioned relative to one another using the first adjustment device and the second adjustment device so as to form at least one undercut connection. The first fitting segment and the first adjustment segment are connected to the first housing in a captive manner even when the undercut connection is not formed.

Abstract: Methods and apparatuses for improved integrated circuit (IC) packages are described herein. In an aspect, an IC device package includes an IC die having a contact pad, where the contact pad is located on a hotspot of the IC die. The hotspot is thermally coupled to a thermal interconnect member. In an aspect, the package is encapsulated in a mold compound. In a further aspect, a heat spreader is attached to the mold compound, and is thermally coupled to the thermal interconnect member. In another aspect, a thermal interconnect member thermally is coupled between the heat spreader and the substrate.

Abstract: Method for manufacturing an electronic semiconductor package, in which method an electronic chip (100) is coupled to a carrier, the electronic chip is at least partially encapsulated by means of an encapsulation structure having a discontinuity, and the carrier is partially encapsulated, and at least one part of the discontinuity and a volume connected thereto adjoining an exposed surface section of the carrier are covered by an electrically insulating thermal interface structure, which electrically decouples at least one part of the carrier with respect to its surroundings.

Abstract: A heat spreader for a resistive element is provided, the heat spreader having a body portion that is arranged over a top surface of the resistive element and electrically insulated from the resistive element. The heat spreader also includes one or more leg portion that extends from the body portion and are associated with the heat sink in a thermally conductive relationship.

Abstract: A system for clamping a heat sink that prevents excessive clamping force is provided. The system may include a heat sink, a semiconductor device, a printed circuit board, and a cover. The semiconductor device may be mounted onto the circuit board and attached to the cover. The heat sink may be designed to interface with the semiconductor device to transfer heat away from the semiconductor device and dissipate the heat into the environment. Accordingly, the heat sink may be clamped into a tight mechanical connection with the semiconductor device to minimize thermal resistance between the semiconductor device and the heat sink. To prevent excessive clamping force from damaging the semiconductor device, loading columns may extend between the cover and the heat sink.

Abstract: A power semiconductor chip and a low-power portion that has power consumption lower than that of the power semiconductor chip are located on a predetermined surface side of a heat sink having conductivity. A first plate-shaped insulating member extends between the power semiconductor chip and the heat sink. A second plate-shaped insulating member extends between the low-power portion and the heat sink. A portion, which faces the low-power portion, of the second plate-shaped insulating member is thicker than a portion, which faces the power semiconductor chip, of the first plate-shaped insulating member.

Abstract: An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark.

Abstract: A semiconductor device includes a substrate having a conductor; a semiconductor chip disposed on the substrate and electrically connected to the conductor; a tubular electrode having one end electrically connected to the conductor; and a sealing resin sealing the substrate, the semiconductor chip and the electrode. The electrode is configured to be extendable and contractible in the stacking direction in which the substrate and the semiconductor chip are stacked in the state before sealing of the sealing resin. The edge of the other end of the electrode is exposed from the sealing resin. The electrode has a hollow space opened at the edge of the other end. Therefore, a semiconductor device reduced in size and a method of manufacturing this semiconductor device can be provided.

Abstract: An integrated circuit package is presented. In an embodiment, the integrated circuit package has a package substrate, an integrated circuit die attached to the package substrate, and a package level heat dissipation device, such as an integrated heat spreader, attached to the package substrate encapsulating the integrated circuit die. The package level heat dissipation device has a top side with a ridge formed on top of a perimeter of the top side, and a bottom side that couples to the integrated circuit die.

Abstract: A power semiconductor module includes a first printed circuit board having a first insulation carrier, and a first upper metallization and a first lower metallization applied to the first insulation carrier on mutually opposite sides, and a second printed circuit board having a second insulation carrier and a second upper metallization applied to the second insulation carrier. The second printed circuit board is spaced apart from the first printed circuit board in a vertical direction oriented perpendicular to the opposite sides of the first insulation carrier. A semiconductor chip is disposed between the printed circuit boards and electrically conductively connected at least to the second upper metallization. The first lower metallization and the second upper metallization face one another. The first printed circuit board has a first thick conductor layer at least partly embedded in the first insulation carrier and which has a thickness of at least 100 ?m.

Abstract: A lower package includes a semiconductor chip. A first upper package and a second upper package are disposed on the lower package. A heat spreader is disposed on the lower package. The heat spreader includes an upper plate and an extension part connected to the upper plate. At least a part of each of the first and second upper packages vertically overlaps the semiconductor chip. The upper plate may be arranged on the first upper package and the second upper package. The extension part may be arranged between the first upper package and the second upper package. The extension part has a vertical height that is greater than its horizontal width.

Abstract: In a package structure, a stiffener ring is over and bonded to a top surface of a first package component. A second package component is over and bonded to the top surface of the first package component, and is encircled by the stiffener ring. A metal lid is over and bonded to the stiffener ring. The metal lid has a through-opening.

Abstract: A flip chip microelectronic package having a heat spreader is provided. In one embodiment, the microelectronic package comprises a die having a first surface and a second surface, the first surface being coupled to a substrate; a thermal interface material disposed in thermal conductive contact with the second surface of the die; and a heat spreader adapted for dissipating heat from the die, the heat spreader disposed in thermal conductive contact with the thermal interface material. The heat spreader includes a lid having an inner chamber therein defined by a first wall and a second wall, the second wall securely joined to the first wall to seal the chamber, the lid being mounted to the substrate and a wick layer positioned in the chamber.

Abstract: A semiconductor device includes: a first output unit configured to output a first phase; a second output unit configured to output a second phase different from the first phase, the second output unit being disposed to be stacked on the first output unit; and a controller configured to control the output units.

Abstract: A DC voltage conversion module includes a substrate, an input terminal, an output terminal, a ground terminal, a DC voltage conversion control element mounted on the substrate, a coil mounted on the substrate and connected to the DC voltage conversion control element and the output terminal, an input-side capacitor mounted on the substrate and connected to the input terminal and the ground terminal, and an output-side capacitor mounted on the substrate and connected to the output terminal and the ground terminal. The input terminal, the output terminal and the ground terminal project in a predetermined projecting direction parallel to each other. The ground terminal is arranged between the input terminal and the output terminal in a direction perpendicular to the projecting direction.

Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting a device mounting structure over a bottom substrate; mounting a heat spreader having an opening formed by a single integral structure with a dam and a flange, the dam having a dam height greater than a flange height of the flange; and forming a package encapsulation over the device mounting structure and the bottom substrate with the device mounting structure exposed within the opening.

Abstract: A semiconductor device includes a plate-shaped semiconductor element and an electrically insulating resin member. The semiconductor element has a front-surface electrode on its front surface and a back-surface electrode on its back surface. The resin member encapsulates the semiconductor element. The front-surface electrode is exposed to a front side of an outer surface of the resin member. The back-surface electrode is exposed to a back side of the outer surface of the resin member. The resin member has an extension portion that covers the entire side surface of the semiconductor element and extends from the side surface of the semiconductor element in a direction parallel to the front surface of the semiconductor element.

Abstract: A package includes a die, which includes a semiconductor substrate, a plurality of through-vias penetrating through the semiconductor substrate, a seal ring overlapping and connected to the plurality of through-vias, and a plurality of electrical connectors underlying the semiconductor substrate and connected to the seal ring. An interposer is underlying and bonded to the die. The interposer includes a substrate, and a plurality of metal lines over the substrate. The plurality of metal lines is electrically coupled to the plurality of electrical connectors. Each of the plurality metal lines has a first portion overlapped by the first die, and a second portion misaligned with the die. A heat spreader encircles the die and the interposer. A wire includes a first end bonded to one of the plurality of metal lines, and a second end bonded to the heat spreader.

Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a thermal attach cluster includes: forming a heat collector having a heat dissipation surface, forming a cluster bridge, having a thermal surface, connected to the heat collector, forming a cluster pad, having an attachment surface, connected to the end of the cluster bridge opposite the heat collector; connecting an integrated circuit to the thermal attach cluster; and forming an encapsulation over the thermal attach cluster with the heat dissipation surface, the thermal surface, and the attachment surface exposed from and coplanar with the encapsulation.

Abstract: Integrating a semiconductor component with a substrate through a low loss interconnection formed through adaptive patterning includes forming a cavity in the substrate, placing the semiconductor component therein, filling a gap between the semiconductor component and substrate with a fill of same or similar dielectric constant as that of the substrate and adaptively patterning a low loss interconnection on the fill and extending between the contacts of the semiconductor component and the electrical traces on the substrate. The contacts and leads are located and adjoined using an adaptive patterning technique that places and forms a low loss radio frequency transmission line that compensates for any misalignment between the semiconductor component contacts and the substrate leads.

Abstract: A semiconductor module includes a case including a receiving space that is formed by a frame portion and a pair of wall portions disposed to face each other with the frame portion therebetween. The wall portion includes a heat-dissipation portions and a support wall that supports the heat-dissipation portions at the frame portion, and the wall portion includes a heat-dissipation portion and a support wall that supports the heat-dissipation portion at the frame portion. The heat-dissipation portions provided at the wall portion are separately provided by being disposed to face a plurality of semiconductor device blocks respectively. A plurality of separate heat-dissipation portions is surrounded by the support wall, the support wall is deformed to recessed from the frame portion through the separate heat-dissipation portions inside the case such that a plurality of insulating sheets is closely joined to a plurality of lead frames and the plurality of heat-dissipation portions.

Abstract: A re-workable heat dissipation assembly may include a non-removable adhesive layer. A first interposer layer may be adhered to a device via the non-removable adhesive layer. A removable adhesive layer may be adhered to the first interposer layer. A heat dissipation assembly may be adhered to the removable adhesive layer. Use of an interposer layer and a removable adhesive layer in combination with a non-removable adhesive layer, provides a high performance heat dissipation assembly while enabling re-working of the assembly following initial manufacture.

Abstract: An integrated circuit package apparatus includes a packaging substrate, an integrated circuit coupled to an upper side of the packaging substrate, an array of contacts coupled to an underside of the packaging substrate for electrically coupling the integrated circuit to a circuit board, and a lid coupled to the upper side of the packaging substrate. In one form, the lid includes a central portion lying on a first plane, corner areas lying on a second plane, and arcuate wall portions disposed between and interconnecting the corner areas and the central portion. Other forms of the lid are provided.

Abstract: An integrated circuit package comprising an active semiconductor device layer and at least one heat-transfer semiconductor layer on the active semiconductor device layer. The heat-transfer semiconductor layer has a coefficient of thermal expansion that substantially matches a coefficient of thermal expansion of the active semiconductor device layer.

Abstract: An electronic component package includes a substrate having a first surface, an electronic component mounted to the substrate, traces on the first surface, a terminal on the first surface, and a solder mask on the first surface. The solder mask includes a solder mask opening exposing the terminal. An electrically conductive coating and/or conductive coating feature is formed on the solder mask and extends into the solder mask opening to contact and be electrically connected to the terminal. The conductive coating may be grounded to shield the electronic component from electromagnetic interference (EMI). Further, the conductive coating provides a ground plane for the traces facilitating impedance matching of signals on the traces. In addition, the conductive coating has a high thermal conductivity thus enhancing heat dissipation from the electronic component.

Abstract: A package includes a first die and a second die underlying the first die and in a same first die stack as the first die. The second die includes a first portion overlapped by the first die, and a second portion not overlapped by the first die. A first Thermal Interface Material (TIM) is over and contacting a top surface of the first die. A heat dissipating lid has a first bottom surface contacting the first TIM. A second TIM is over and contacting the second portion of the second die. A heat dissipating ring is over and contacting the second TIM.

Abstract: A package on packaging structure provides for improved thermal conduction and mechanical strength by the introduction of a sold thermal coupler between the first and second packages. The first package has a first substrate and through vias through the first substrate. A first set of conductive elements is aligned with and coupled to the through vias of the first substrate. A solid thermal coupler is coupled to the first set of conductive elements and to a die of the second package. A second set of conductive elements is coupled to the die and a bottom substrate is coupled to the second set of conductive elements. The thermal coupler may be, e.g., an interposer, a heat spreader, or a thermal conductive layer.

Abstract: Integrated circuit (IC) packages with an inter-die thermal spreader are disclosed. A disclosed IC package includes a plurality of stacked dies disposed on a package substrate. A heat spreader is disposed on a top die of the plurality of stacked dies. The IC package further includes a thermal spreader layer disposed adjacent to at least one die of the plurality of stacked dies. The thermal spreader layer may extend out of a periphery of the plurality of stacked dies and may be attached to the heat spreader through a support member.

Abstract: A heat dissipation device is used in a circuit board, where the circuit board includes a chip and at least one positioning hole disposed around the chip, and each of the positioning holes has a bare metal area on its periphery. The heat dissipation device includes a heat dissipation element, a conductive element and at least one fixing part. The heat dissipation element is disposed on the chip; the conductive element is connected electrically to the bare metal area of the circuit board and the heat dissipation element respectively; the fixing part passes through the fixing holes and is connected to the positioning hole, so as to fix the heat dissipation element to the circuit board. A circuit board is also provided, which includes a substrate, a chip, a positioning hole and the heat dissipation device.

Abstract: A metal plate covers an opening on the upper surface of a core substrate and exposes an outer edge of the upper surface of the core substrate. A conductive layer covers the lower surface of the core substrate. A semiconductor chip bonded to a first surface of the metal plate is exposed through the opening. A first insulating layer covers the upper and side surface of the metal plate and the outer edge of the upper surface of the core substrate. A second insulating layer fills the openings of the metal plate and the conductive layer and covers the outer edge of the lower surface of the core substrate, the conductive layer, and the semiconductor chip. The metal plate is thinner than the semiconductor chip. Total thickness of the conductive layer and the core substrate is equal to or larger than the thickness of the semiconductor chip.

Abstract: A semiconductor device includes a substrate, a semiconductor chip mounted on the substrate, an encapsulating body encapsulating the semiconductor chip on the substrate, the encapsulating body including a top surface and a side surface, and a plurality of heat sink plates embedded in the encapsulating body, each of the heat sink plates including an upper portion and a lower portion, the upper portion having an upper surface exposed from the top surface of the encapsulating body, the lowering portion being embedded in the encapsulating body, each of the plurality of heat sink plates being spaced from the semiconductor chip by the encapsulating body. The lower portion of each of the plurality of the heat sink plates includes a protrusion extending horizontally to an outside of an outer edge of the lower portion.

Abstract: The present invention discloses an electronic element packaging structure and a carrier substrate thereof. The electronic element packaging structure includes a heat conduction substrate, which is a vapor chamber having a vacuum cavity thereinside or a heat pipe; a circuit layer disposed on the heat conduction substrate, insulated from the heat conduction substrate, and exposing the upper surface of the heat conduction substrate; at least one chip directly disposed on the upper surface of the heat conduction substrate; an electric connection structure electrically connecting the chip and the circuit layer; and an encapsulant covering the chip and the electric connection structure.

Abstract: Microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the method includes forming one or more redistribution layers over an encapsulated die having a frontside bond pad area and a frontside passivated non-bond pad area. The redistribution layers are formed to have a frontside opening over the non-bond pad area of the encapsulated die. A primary heat sink body is provided in the frontside opening and thermally coupled to the encapsulated die. A contact array is formed over the redistribution layers and is electrically coupled to a plurality bond pads located on the frontside bond pad area of the encapsulated die.

Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, a heat radiating plate disposed on the substrate and covering the semiconductor element, and a connection member connecting an upper surface of the semiconductor element and a lower surface of the heat radiating plate, wherein the connection member includes a first member being in contact with the upper surface of the semiconductor element and having a first melting point, a second member being in contact with the first member, having a larger area than the first member, and having a second melting point higher than the first melting point, and a third member interposed between the second member and the heat radiating plate, having an area smaller than the second member, and having a third melting point lower than the second melting point.

Abstract: A light emitting die package and a method of manufacturing the die package are disclosed. The die package includes a leadframe, at least one light emitting device (LED), a molded body, and a lens. The leadframe includes a plurality of leads and has a top side and a bottom side. A portion of the leadframe defines a mounting pad. The LED device is mounted on the mounting pad. The molded body is integrated with portions of the leadframe and defines an opening on the top side of the leadframe, the opening surrounding the mounting pad. The molded body further includes latches on the bottom side of the leadframe. The lens is coupled to the molded body. A composite lens is used as both reflector and imaging tool to collect and direct light emitted by LED(s) for desired spectral and luminous performance.

Abstract: A semiconductor package which is allocated between a wiring board and a cooling member, the semiconductor package, includes: a package board; a heating element which is mounted on the package board; a chip part which is mounted on the package board and provided around the heating element; and a heat transfer element having a main body unit which is jointed to the heating element with a metal joint material and a leg part which extends from the main body part to the package board and of which a tip is attached to the package board, and wherein the leg part, comprising: a first leg part allocated in a corner of the package board; and a second leg part which is allocated inside the first leg part between the heating element and the chip part on the package board.

Abstract: A semiconductor module including a cooling unit by which a fine cooling effect is obtained is provided. A plurality of cooling flow paths (21c) which communicate with both of a refrigerant introduction flow path which extends from a refrigerant introduction inlet and a refrigerant discharge flow path which extends to a refrigerant discharge outlet are arranged in parallel with one another in a cooling unit (20). Fins (22) are arranged in each cooling flow path (21c). Semiconductor elements (32) and (33) are arranged over the cooling unit (20) so that the semiconductor elements (32) and (33) are thermally connected to the fins (22). By doing so, a semiconductor module (10) is formed. Heat generated by the semiconductor elements (32) and (33) is conducted to the fins (22) arranged in each cooling flow path (21c) and is removed by a refrigerant which flows along each cooling flow path (21c).

Abstract: A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.

Abstract: A heat dissipating assembly which releases heat produced by an electronic device comprising a heat dissipating device and a plurality of elastic fastening members. The heat dissipating assembly includes a base plate having a plurality of engaging holes formed thereon. Each elastic fastening member includes a connecting member and a spring. The connecting member has a head portion and a bolt body that extends therefrom. The bolt body has an outer thread formed on the surface thereof and is being insertable into the respective engaging hole. The spring includes a winding portion woundable around the outer periphery of the bolt body, a clutching portion outwardly extended and downwardly bent from the bottom end of the winding portion to the base surface of the base plate, and a fastening segment extending from the clutching portion back under the winding portion. The instant disclosure further provides an elastic fastening member.

Abstract: A semiconductor device includes a plurality of die pad sections, a plurality of semiconductor chips, each of which is arranged in each of the die pad sections, a resin encapsulation portion having a recess portion for exposing at least a portion of the die pad sections, the resin encapsulation portion configured to cover the die pad sections and the semiconductor chips, and a heat radiation layer arranged in the recess portion. The heat radiation layer includes an elastic layer exposed toward a direction in which the recess portion is opened. The heat radiation layer directly faces at least a portion of the die pad sections. The elastic layer overlaps with at least a portion of the die pad sections when seen in a thickness direction of the heat radiation layer.

Abstract: One embodiment of an integrated circuit includes a discrete device that defines a top surface, an integrated circuit substrate, and a heat dissipation structure fully covering the top surface of the discrete device and being thermally connected to the integrated circuit substrate.

Abstract: A semiconductor device includes an IGBT as a vertical semiconductor element provided between first, and second lead frames, in pairs, the first, and second lead frames being opposed to each other, first and second sintered-metal bonding layers provided on first and second bonding surfaces of the IGBT, in pairs, respectively, a through-hole opened in the second lead frame, and a heat-release member having a surface on one side thereof, bonded to a second sintered-metal bonding layer of the second bonding surface while a side (lateral face) of a surface of the heat-release member, on the other side thereof, being fitted into the through-hole. A solder layer is formed in a gap between an outer-side wall of the side of the surface of the heat-release member, on the other side thereof, and an inner-side wall of the through-hole.

Abstract: The subject matter of the present application relates to a heat dissipation device that is embedded within a microelectronic die. The heat dissipation device may be fabricated by forming at least one trench extending into the microelectronic die from a microelectronic die back surface, which opposes an active surface thereof, and filling the trenches with at least one layer of thermally conductive material. In one embodiment, the heat dissipation device may be a thermoelectric cooling device.

Abstract: A structure includes a thermal interface material, and a Perforated Foil Sheet (PFS) including through-openings therein, with a first portion of the PFS embedded in the thermal interface material. An upper layer of the thermal interface material is overlying the PFS, and a lower layer of thermal interface material is underlying the PFS. The thermal interface material fills through-openings in the PFS.

Abstract: A semiconductor module and a cooler capable of cooling a semiconductor element efficiently. The semiconductor module supplies a refrigerant to a water jacket configuring the cooler, to cool a circuit element part disposed on an outer surface of a fin base. This semiconductor module has: a fin connected thermally to the circuit element part; a refrigerant introducing passage in the water jacket, which has a guide part that has one surface and another surface inclined to guide the refrigerant toward one side surface of the fin; a refrigerant discharge passage disposed in the water jacket to be parallel to the refrigerant introducing passage, which has a side wall parallel to another side surface of the fin; and a cooling passage formed in a position for communicating the refrigerant introducing passage and the refrigerant discharge passage with each other in the water jacket. The fin is disposed in the cooling passage.

Abstract: Various packages and methods are disclosed. A package according to an embodiment includes a substrate, a chip attached to a surface of the substrate with electrical connectors, a molding compound on the surface of the substrate and around the chip, an adhesive on a surface of the chip that is distal from the surface of the substrate, and a lid on the adhesive. In an embodiment, a region between the molding compound and the lid at a corner of the lid is free from the adhesive. In another embodiment, the lid has a recess in a surface of the lid facing the surface of the molding compound.

Abstract: Embodiments of the present disclosure describe techniques and configurations for paste thermal interface materials (TIMs) and their use in integrated circuit (IC) packages. In some embodiments, an IC package includes an IC component, a heat spreader, and a paste TIM disposed between the die and the heat spreader. The paste TIM may include particles of a metal material distributed through a matrix material, and may have a bond line thickness, after curing, of between approximately 20 microns and approximately 100 microns. Other embodiments may be described and/or claimed.