Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including a first layer having a first conformable material; a second layer having a second conformable material; one or more electronic components embedded within the stack of layers; and a heat dissipating element configured dissipating heat generating from the one or more electronic components, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.

Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including a first layer having a first conformable material; a second layer having a second conformable material; one or more electronic components embedded within the stack of layers; and a vertical filtering structure arranged periodically between the one or more electronic components, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.

Abstract: An integrated circuit assembly includes a heat sink and a substrate coupled to the heat sink. The heat sink includes a base and a plurality of fins disposed on the base, the base has an intermediate portion and two side portions connected to the intermediate portion, the intermediate portion has a first width and the side portions has a second width larger than the first width, and the fins are disposed on the side portions of the base. The substrate is made of ceramic material and has an upper surface with an opening and a lower surface with a groove, the groove matches the intermediate portion of the heat sink, and the opening is configured to expose a portion of the intermediate portion to receive an integrated circuit package.

Abstract: An electronic component built-in wiring board includes: at least a pair of wiring patterns; an insulating layer disposed between the pair of wiring board; an electronic component embedded in the insulating layer; and a metallic body provided at least on or above a main surface of the electronic component in the insulating layer and thermally contacted with the electronic component.

Abstract: Disclosed herein is a power package module, including: a power package mounted with a plurality of semiconductor chips; a heat radiation module coming into contact with the power package and including a first heat radiation member for discharging heat generated from the power package; and a second heat radiation member, one side of which is connected to the first heat radiation member and the other side of which is connected to the power package.

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

Abstract: Methods and apparatus for improved electrical, mechanical and thermal performance of stacked IC packages are described. An IC package comprises a substrate, a first die, a second die, and an interposer with an opening in a first surface of the interposer configured to accommodate the first die. The first IC die is attached a first surface of the substrate. The interposer is mounted on the first surface of the substrate such that the first IC die is placed within the opening in the interposer. The second die is mounted on a second surface of the interposer. Wire bonds couple bond pads on the first surfaces of IC die are coupled to the first surface of the substrate. A mold compound encapsulates the first IC die, the second IC die, the interposer and the wire bonds.

Abstract: A semiconductor module includes a semiconductor package generating thermal energy, a heat collecting member transferring thermal energy from the semiconductor package to a heat collection area in the heat collecting member, a heat radiating member transferring thermal energy received from the heat collecting member and package to the outside, and a thermoelectric device transferring thermal energy through the heat collection area to the heat radiating member via the thermoelectric effect. The heat collecting member and heat radiating member may be otherwise insulated so thermal energy is transferred and controlled by the thermoelectric device. The package may be a dynamic random access memory (DRAM), microprocessor, central processing unit (CPU), graphic processing unit (GPU), or flash memory. The heat radiating member may be an external case of a solid state disk (SSD), and the thermoelectric device may be a Peltier cooler controlled through a power line.

Abstract: A modular equipment testing apparatus is suitable for use in severe environments. The testing apparatus comprises a base computing unit, an interchangeable test instrument board, and an interchangeable equipment interface pod. The base computing unit and the interchangeable test instrument board are sealed within a computing case. A bottom panel of the computing case is formed of a heat conducting material and acts as a heat sink for removing heat from inside the computing case. The computing case and the equipment interface pod interface to form a hermetically sealed case, which can withstand a drop of 1 meter to a solid surface and immersion to a depth of 0.5 meters in water without damage to components located within the sealed case.

Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.

Abstract: Provided is an electronic component module which has high reliability and is capable of suppressing reduction in handling performance of a mounting machine. An electronic component module includes a plurality of electronic components mounted on a top surface of a module substrate, a planar top plate covering the electronic components, and a top plate holding member for holding the top plate. The plurality of electronic components include a quartz resonator, and a RF-IC which has a height smaller than that of the quartz resonator and is disposed on the top surface of the module substrate so as to be side by side with the quartz resonator. In addition, the top plate is fixed to the quartz resonator, and the top plate holding member for holding the top plate is disposed between the RF-IC and the top plate.

Abstract: A device includes a semiconductor substrate including a front side and a backside. A through-substrate via (TSV) penetrates the semiconductor substrate. A dummy metal line is formed on the backside of the semiconductor substrate, and may be connected to the dummy TSV.

Abstract: Methods and associated structures of forming an indium containing solder material directly on an active region of a copper IHS is enabled. A copper indium containing solder intermetallic is formed on the active region of the IHS. The solder intermetallic improves the solder-TIM integration process for microelectronic packaging applications.

Abstract: A semiconductor package structure with a heat dissipating stiffener and method of fabricating the same are provided. In one embodiment, the package structure comprises a substrate having a front side and a back side; a semiconductor chip mounted on the front surface of the substrate; a thermally-conductive stiffener mounted over the front surface of the substrate and surrounding the chip, the stiffener having a first portion and a second portion, wherein the first portion is wider than the second portion so as to allow for easy egress of a dispenser into a gap between the chip and the substrate; an underfill layer filled and cured in the gap; and a plurality of solder balls mounted on the back surface of the substrate.

Abstract: An integrated circuit device includes an integrated circuit formed in a semiconductor die and an integrated circuit package containing the semiconductor die. The integrated circuit package includes a thermal interface material substantially between the semiconductor die and a heat spreader of the integrated circuit device for conducting heat from the semiconductor die to the heat spreader. The thermal interface material includes diamond particles and has a thickness selected to reduce capacitance between the semiconductor die and the heat spreader over that of a conventional integrated circuit device without reducing the rate of thermal conduction from the semiconductor die to the heat spreader. As a result, the integrated circuit device has improved electrostatic discharge immunity.

Abstract: An electronic circuit device that suppresses deformation of an adhesive layer of a flexible printed circuit board during formation of a resin seal portion, and suppresses deterioration of the circuit board caused by deformation of the adhesive layer. The electronic circuit device includes a substrate mounted with an electronic component; a flexible printed circuit board electrically connectable to the substrate and an external device, and includes a wiring conductor and a pair of insulation films covering upper and lower surfaces of the wiring conductor; and a resin molding portion to seal the substrate and a portion of the circuit board. The wiring conductor of the circuit board is adhered through an adhesive layer to at least one of the pair of insulation films, and a dummy wiring material that does not function as wiring is disposed on an outer side of a border between the circuit board and an outer peripheral portion of the plastic molding portion, and disposed between the pair of insulation films.

Abstract: An integrated circuit chip package is described. The integrated circuit package comprises a substrate, a chip attached to the substrate, and a heat spreader mounted over the chip for sealing the chip therein. The heat spreader includes a thermally-conductive element having a side opposed to the top of the chip for transmitting heat away from the chip to the heat spreader, and a compliant element having a first portion attached to and positioned around the periphery of the thermally-conductive element and a second portion affixed to a surface of the substrate.

Abstract: According to one embodiment, an information processing apparatus includes a main body, a heating device provided in the main body, a cooling fan provided in the main body, which cools the heating device, a temperature sensor provided in the main body, which senses a temperature of the heating device, and a fan control unit provided in the main body, which rotates the cooling fan at a first rotation speed or higher during power-on of the main body and switches a rotation speed of the cooling fan to a second rotation speed which is higher than the first rotation speed when the temperature of the heating device sensed by the temperature sensor reaches a given threshold value.

Abstract: A semiconductor package having a heat dissipation member capable of efficiently conveying excess heat away from semiconductor chips is presented. The semiconductor package includes a semiconductor chip, through-electrodes, and a heat dissipation member. The semiconductor chip has a first surface, a second surface facing away from the first surface, and bonding pads which are disposed on the first surface. The through-electrodes are electrically connected with the bonding pads and passing through the first and second surfaces of the semiconductor chip, and protrude outward from the second surface. The heat dissipation member faces the second surface of the semiconductor chip and is coupled to the through-electrodes.

Abstract: A semiconductor package having an internal cooling system is presented which includes a semiconductor chip and a through-electrode. The semiconductor chip has a circuit section. The through-electrode passes through an upper surface and a lower surface the semiconductor chip. The through-electrode is electrically connected with the circuit section of the semiconductor chip. The through-electrode also has a through-hole for allowing cooling fluid to flow therethrough.

Abstract: A layered chip package includes: a plurality of layer portions stacked, each of the layer portions including a semiconductor chip; and a heat sink. Each of the plurality of layer portions has a top surface, a bottom surface, and four side surfaces. The heat sink has at least one first portion, and a second portion coupled to the at least one first portion. The at least one first portion is adjacent to the top surface or the bottom surface of at least one of the layer portions. The second portion is adjacent to one of the side surfaces of each of at least two of the plurality of layer portions.

Abstract: In some embodiments, a semiconductor cooling apparatus includes a monolithic array of cooling elements. Each cooling element of the monolithic array of cooling elements is configured to thermally couple to a respective semiconductor element of an array of semiconductor elements. At least two of the semiconductor elements have a different height and each cooling element independently flexes to conform to the height of the respective semiconductor element.

Abstract: A power semiconductor package that includes a power semiconductor device having a threshold voltage that does not vary when subjected to an autoclave test.

Abstract: A semiconductor assembly includes a first subassembly comprising a heat sink and a first patterned polymer layer disposed on a surface of the heat sink to define an exposed portion of the first surface. The exposed portion of the first surface extends radially inward along the heat sink surface from the first layer. The subassembly also includes a second patterned polymer layer disposed on a radially outer portion of the first patterned polymer layer. The first and second layers define a cell for accommodating a power semiconductor die. Solder material is disposed on the exposed portion of the heat sink surface and in the cell. A power semiconductor die is located within the cell on a radially inward portion of the first layer and thermally coupled to the heat sink by the solder material.

Abstract: An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain electrode all on a first side of the high voltage switching transistor. The source electrode is electrically connected to a conducting structural portion of the package. Assemblies using the abovementioned transistor with another transistor can be formed, where the source of one transistor can be electrically connected to a conducting structural portion of a package containing the transistor and a drain of the second transistor is electrically connected to the second conductive structural portion of a package that houses the second transistor. Alternatively, the source of the second transistor is electrically isolated from its conductive structural portion, and the drain of the second transistor is electrically isolated from its conductive structural portion.

Abstract: In a three-dimensional chip configuration, a heat spreading material may be positioned between adjacent chips and also between a chip and a carrier substrate, thereby significantly enhancing heat dissipation capability. Furthermore, appropriately sized and positioned through holes in the heat spreading material may enable electrical chip-to-chip connections, while responding thermally conductive connectors may extend to the heat sink without actually contacting the corresponding chips.

Abstract: A packaged heat dissipating assembly for an intermediate bus converter (IBC) has a frame being mounted on and around the IBC and a heat sink being mounted on the frame. The packaged heat dissipating assembly is easily detached from the IBC. Therefore, a broken bus converter module (BCM) or heat sink is easily replaced separately. Consequently, heat dissipating designs and maintenance of a server or communication equipment is facilitated and maintenance costs of the IBC and the server or communication equipment are lowered.

Abstract: A packaged integrated circuit having a thermal pathway to exhaust heat from the integrated circuit. The integrated circuit is disposed on a package substrate, with an encapsulant disposed around the integrated circuit. A heat sink is disposed at least partially within the encapsulant, with at least a portion of one surface of the heat sink exposed outside of the encapsulant. The integrated circuit has an uppermost passivation layer, where the passivation layer is not electrically conductive, with a port disposed in the passivation layer. The port extends completely through the passivation layer to expose an underlying layer. A thermal pathway is disposed at least partially within the port, and makes thermal contact to both the underlying layer and the heat sink. The thermal transfer rate of the thermal pathway is greater than the thermal transfer rate either the passivation layer or the encapsulant.

Abstract: Semiconductor package structures are provided which are designed to have liquid coolers integrally packaged with first level chip modules. In particular, apparatus for integrally packaging a liquid cooler device within a first level chip package structure include structures in which a liquid cooler device is thermally coupled directly to the back side of an integrated circuit chip flip-chip mounted on flexible chip carrier substrate. The liquid cooler device is mechanically coupled to the package substrate through a metallic stiffener structure that is bonded to the flexible package substrate to provide mechanical rigidity to the flexible package substrate.

Abstract: A method, apparatus and system with a semiconductor package including a microchimney or thermosiphon using carbon nanotubes to modify the effective thermal conductivity of an integrated circuit die.

Abstract: A molded leadless package (MLP) semiconductor device includes a heat spreader with a single connecting projection extending from an edge of a cap of the heat spreader to a leadframe. The heat spreader can include additional projections on its edges that act as heat collectors and help to secure the spreader in the MLP. The connecting projection is attached to a lead of the leadframe so that heat gathered by the cap can be transferred through the connecting projection to the lead and to a printed circuit board to which the lead is connected. In embodiments, the heat spreader includes a central heat collector projection from the cap toward the die, preferably in the form of a solid cylinder, that enhances heat collection and transfer to the cap. The cap can include fins projecting from its top surface to facilitate radiant and convection cooling.

Abstract: An integrated circuit package employs a stiffener layer that houses a passive electronic component to maintain mechanical properties when a thinner substrate is used. The use of either a retention wall or a stiffener allows for the manufacture of these integrated circuit package using strip, matrix, or array technology where a larger board with a plurality of integrated circuit packages is produced industrially and then cut to individual units.

Abstract: The semiconductor device includes a substrate, a first semiconductor element, a second semiconductor element, a first heat sink and a second heat sink. The first and the second semiconductor elements are provided on the substrate. The maximum power consumption of the first semiconductor element is lower than that of the second semiconductor element. The first heat sink is fixed to the first semiconductor element. The second heat sink is fixed to the second semiconductor element. The first heat sink is spaced apart from the second heat sink.

Abstract: Semiconductor package structures are provided which are designed to have liquid coolers integrally packaged with first level chip modules. In particular, apparatus for integrally packaging a liquid cooler device within a first level chip package structure include structures in which a liquid cooler device is thermally coupled directly to the back side of an integrated circuit chip flip-chip mounted on flexible chip carrier substrate. The liquid cooler device is mechanically coupled to the package substrate through a metallic stiffener structure that is bonded to the flexible package substrate to provide mechanical rigidity to the flexible package substrate.

Abstract: Apparatus and methods are provided for integrating microchannel cooling modules within high-density electronic modules (e.g., chip packages, system-on-a-package modules, etc.,) comprising multiple high-performance IC chips. Electronic modules are designed such that high-performance (high power) IC chips are disposed in close proximity to the integrated cooling module (or cooling plate) for effective heat extraction. Moreover, electronic modules which comprise large surface area silicon carriers with multiple chips face mounted thereon are designed such that integrated silicon cooling modules are rigidly bonded to the back surfaces of such chips to increase the structural integrity of the silicon carriers.

Abstract: A package includes a thermal interface member which includes a bulk layer and a surface layer that is disposed on at least a portion of a surface of the bulk layer. The surface layer is highly thermally conductive, has a melting point exceeding a solder reflow temperature, and has a maximum cross-sectional thickness of less than about 10 microns.

Abstract: A chip package includes: a substrate; a plurality of conductive connections in contact with the silicon carrier; a silicon carrier in a prefabricated shape disposed above the substrate, the silicon carrier including: a plurality of through silicon vias for providing interconnections through the silicon carrier to the chip; liquid microchannels for cooling; a liquid coolant flowing through the microchannels; and an interconnect to one or more chips or chip stacks.

Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and having an upper portion formed on a side of the chip and lower portion formed on another side of the chip, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board.

Abstract: A method and a package for circuit chip package having a bent structure. The circuit chip package includes: a substrate having a first coefficient of thermal expansion (CTE); a circuit chip, having a second CTE, mounted onto the substrate; a metal foil disposed on the circuit chip in thermal contact with the chip; a metal lid having (i) a third CTE that is different from the first CTE and (ii) a bottom edge region, where the metal lid is disposed on the metal foil in thermal contact with the metal foil; and an adhesive layer along the bottom edge of the metal lid, cured at a first temperature, bonding the lid to the substrate, producing an assembly which, at a second temperature, is transformed to a bent circuit chip package.

Abstract: Through heat discharge only by wiring connected to a conventional semiconductor chip, sufficient heat discharge performance may not be achieved in a recent semiconductor device. A semiconductor device according to an aspect of the present invention includes: a flexible substrate including a first main surface and a second main surface; a semiconductor chip; a first heat conductive layer formed on the first main surface of the flexible substrate and electrically connected to the semiconductor chip; and a second heat conductive layer formed on the second main surface of the flexible substrate and electrically insulated from the semiconductor chip.

Abstract: An integrated circuit includes a semiconductor substrate, a first electrical contact formed on the semiconductor substrate, and a first heat sink element bonded to the first electrical contact via a galvanic bond.

Abstract: A load driving device includes: an output power device for driving a load; a driving IC for controlling the output power device, wherein the driving IC is electrically coupled with the output power device through a wire or a connection member; and a first electrode substrate. The output power device and the driving IC are mounted on the first electrode substrate. In this case, the output power device is controlled with high speed, and a mounting area of the output power device and the driving IC is reduced.

Abstract: A heat sink substrate has a composite structure including a three-dimensional network structure of SiC ceramic having pores infiltrated with Si, and has a thermal conductivity of not less than 150 W/m·K and an oxygen content of not greater than 7 ppm. The heat sink substrate is easily allowed to have an increased surface area. Further, the heat sink substrate has a higher thermal conductivity and a coefficient thermal expansion close to that of the SiC. Therefore, the heat sink substrate is superior in the efficiency of heat conduction from a semiconductor device. The heat sink substrate is produced by infiltrating a thermally melted Si into the pores of the three-dimensional network structure in a non-oxidative atmosphere in the presence of an oxygen absorber.

Abstract: A chip assembly may comprise a substrate having a top surface and a bottom surface. The chip assembly may comprise a first die having a circuit surface and a connecting surface, the circuit surface comprising one or more integrated circuits. The chip assembly may comprise a chip-scale frame having an inside surface, an outside surface, and a well region, the well region having an opening within the inside surface, the well region having a wall, the well region housing the first die, the first die attached to the wall by a first coupling mechanism, the inside surface coupled to the top surface of the substrate by a second coupling mechanism. The chip assembly may comprise a heat sink coupled to the outside surface of the chip-scale frame using a third coupling mechanism.

Abstract: A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.

Abstract: A semiconductor module is provided which includes a resin molded package which is made by a resinous mold assembly. The resin molded package is clamped by covers through a fastener to make the semiconductor module. The resinous mold assembly has formed therein a coolant path that is a portion of a coolant passage through which a coolant flows to coal a semiconductor chip embedded in the resin molded package. The resinous mold assembly is made up of a first mold and a second mold. The first mold has the semiconductor chip, heat spreaders, and electric terminals embedded therein. The second mold is wrapped around an outer periphery of the first mold. The second mold is made of resin which is lower in softening temperature than that of the first mold, thereby facilitating ease of removing the first mold from the resin molded package for reusing the resin molded package.

Abstract: A semiconductor module is provided which includes a semiconductor unit which is made by a resin mold. The resin mold has formed therein a coolant path through which a coolant flows to cool a semiconductor chip embedded in the resin mold. The resin mold also includes heat spreaders, and electric terminals embedded therein. Each of the heat spreaders has a fin heat sink exposed to the flow of the coolant. The fin heat sink is welded to a surface of each of the heat spreaders through an insulator, thus minimizing an electrical leakage from the heat spreader to the coolant.

Abstract: An electromagnetic shielding device with a heat dissipating function for shielding at least one electronic element on a circuit board is provided. The electromagnetic shielding device includes a frame, a cover, and a heat dissipating element. The frame is disposed on the circuit board and surrounds the electronic element, and the frame is one-piece and seamless. The cover has a top portion and a side portion bent from borders of the top portion. The heat dissipating element is disposed on the top portion. The top portion of the cover is connected to borders of the frame, and the side portion is tightly combined with the frame so that the cover, the frame and the circuit board form a shielding space to surround the electronic element.

Abstract: According to various aspects of the present disclosure, exemplary embodiments are disclosed of thermally-conductive interface assemblies suitable for use in dissipating heat from one or more components of a memory module. The thermally-conductive interface assembly may generally include a flexible heat-spreading material having first and second sides and one or more perforations extending through the flexible heat-spreading material from the first side to the second side. The flexible heat-spreading material may be sandwiched between first and second layers of soft thermal interface material. A portion of the soft thermal interface material may be disposed within the one or more perforations. The thermally-conductive interface assembly may be positioned relative to one or more components of a memory module to provide a thermally-conductive heat path from the one or more components to the first layer of soft thermal interface material.

Abstract: A cooling apparatus for semiconductor chips includes radiation fins formed on the opposite surface of metal base opposite to the surface of metal base, to which an insulator base board mounting semiconductor chips thereon, is disposed. The radiation fins, such as sheet-shaped fins having different lengths are arranged such that the surface area density of the fins becomes higher in the coolant flow direction, whereby the surface area density is the total surface area of radiation fins on a unit surface area of the metal base. As a result, the temperatures of semiconductor chips arranged along the coolant flow direction are closer to each other.