Abstract: A method of packaging one or more semiconductor dies is provided. The method includes: providing a first die having a circuit surface and a connecting surface; providing a chip-scale frame having an inside surface and an outside surface, the chip-scale frame having a well region having an opening in the inside surface; coupling the first die to a wall of the well region using a first coupling mechanism for electrical and mechanical coupling; providing a substrate having a top surface and a bottom surface; coupling the inside surface of the chip-scale frame with the top surface of the substrate by a second coupling mechanism, wherein a gap is provided between the circuit surface of the first die and the top surface of the substrate; coupling a heat sink to the outside surface of the chip-scale frame using a third coupling mechanism.

Abstract: A power switch and connector that are conventionally included in a body are formed in spaces created at the outer ends of the shafts of hinges other than the body and a display, whereby the body is thinned. Electronic device comprises a body, a display, and a hinge that joins the body and display so that they can be freely opened or closed. A power switch is formed at an end of the shaft of the hinge. Furthermore, the electronic device comprises the body, the display, and another hinge that joins the body and display so that they can be freely opened or closed. A port of a connector opens at an end of the shaft of the hinge.

Abstract: According to one embodiment, an electronic apparatus includes a housing, a circuit board in the housing, a heat sink, and a fixing portion. The circuit board includes a heating component. The heat sink has a plate shape and faces the heating component. The fixing portion is attached to the heat sink and fixed to the circuit board at least at two points.

Abstract: A semiconductor package includes a wiring board, a semiconductor device mounted on the wiring board, an electrically-conductive thermal interface material provided on the semiconductor device, a test electrode in contact with a first surface of the thermal interface material to be electrically connected to the thermal interface material, and an electrically-conductive heat spreader in contact with a second surface of the thermal interface material opposite to its first surface.

Abstract: A semiconductor package includes a substrate, a stiffener ring coupled to the substrate and configured to form a well with the substrate, and a die positioned in the well. A thermal interface is positioned on the die. A heat spreader is coupled to the stiffener ring so that a portion of the heat spreader is positioned in the well and the thermal interface thermally couples the heat spreader to the die. The portion of the heat spreader positioned in the well adds rigidity to the semiconductor package and facilitates the use of thin dies.

Abstract: Provided is a semiconductor device including a flexible circuit board which includes a first external electrode provided on a first face and second and third external electrodes provided on a second face; a plurality of memory devices and passive components; a supporter which is provided with a groove on one face; and a computing processor device. The memory devices and the passive components are connected to the first external electrode, the one face of the supporter is bonded on the first face of the flexible circuit board so that the groove houses the memory devices and the passive components. The flexible circuit board is bent along a perimeter of the supporter to be wrapped around a side face and another face of the supporter. On the flexible circuit board, the second external electrode is provided on the second face which is opposite to the first external electrode, and the third external electrode is provided on the second face which is bent to the another face of the supporter.

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; attaching a package stack assembly, having a contact pad, on the base substrate; applying an encapsulation having a cavity with a tapered side directly over the package stack assembly, the contact pad exposed in the cavity; attaching a recessed circuitry unit in the cavity and on the contact pad, a chamber of the cavity formed by the recessed circuitry unit and the tapered side of the cavity; and mounting a thermal structure over the recessed circuitry unit, the cavity, and the encapsulation.

Abstract: An apparatus includes a plurality of islands each carrying multiple cantilevers. The apparatus also includes a fluidic network having a plurality of channels separating the islands. The channels are configured to provide fluid to the islands, and the fluid at least partially fills spaces between the cantilevers and the islands. Heat from the islands vaporizes the fluid filling the spaces between the cantilevers and the islands to transfer the heat away from the islands while driving the cantilevers into oscillation. The apparatus may also include a casing configured to surround the islands and the fluidic network to create a vapor chamber, where the vapor chamber is configured to retain the vaporized fluid. The islands and the fluidic network could be formed in a single substrate, or the islands could be separate and attached together by a binder located within the channels of the fluidic network.

Abstract: A system contains a temperature sensitive device and a printed circuit board. The temperature sensitive device is coupled to the printed circuit board. An aperture is cut out of the printed circuit board between the temperature sensitive device and a heat generating device to act as an insulator for the temperature sensitive device.

Abstract: A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the substrate extends beyond the outer perimeter of the microelectronic element. The microelectronic package includes a plurality of etched conductive posts exposed at a surface of the substrate and being electrically interconnected with the microelectronic element, whereby at least one of the etched conductive posts is disposed in the outer region of the substrate. The package includes an encapsulating mold material in contact with the microelectronic element and overlying the outer region of the substrate, the encapsulating mold material extending outside of the etched conductive posts for defining an outermost edge of the microelectronic package.

Abstract: A semiconductor device and method is disclosed. One embodiment provides an active region in a semiconductor substrate, including a first terminal region and a second terminal region.

Abstract: A stacked microprocessor package architecture includes one or more microprocessor packages, the microprocessor packages including one or more microprocessor die disposed on a substrate, a satellite die, a thermal bus thermally coupled to the microprocessor die and thermally connected to system cooling, and a power bus providing power to the microprocessor die and coupled to system power. The microprocessor packages may include a module cap providing mechanical protection and/or thermal isolation or a thermal cooling path for stacked modules. Variable height standoffs provide signal connection from substrates of the stacked microprocessor packages to a system board.

Abstract: According to an embodiment, an integrated circuit package comprises a chip, a thermal component, and a molding compound. The chip comprises an active surface and a backside surface opposite the active surface. The thermal component is physically coupled to the backside surface of the chip. The molding compound encapsulates the chip, and an exposed surface of the thermal component is exposed through the molding compound. Another embodiment is a method to form an integrated circuit package.

Abstract: A power semiconductor module assembly is disclosed including a power semiconductor module comprising a load terminal electrically conductively joined to a contact conductor. Part of the heat materializing during operation of the power semiconductor module in the load terminal is dissipated by using a heat dissipating element.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a bump that includes first, second and third bent corners that shape a cavity. The conductive trace includes a pad and a terminal. The semiconductor device is located within the cavity, is electrically connected to the conductive trace and is thermally connected to the bump. The bump extends into an opening in the adhesive and provides a recessed die paddle and a reflector for the semiconductor device. The conductive trace provides signal routing between the pad and the terminal.

Abstract: Disclosed herein are a heat-radiating substrate and a method of manufacturing the same. The heat-radiating substrate includes: a core layer including a core metal layer and a core insulating layer formed on the core metal layer and divided into a first region and a second region; a circuit layer formed in the first region of the core layer; a build-up layer formed in the second region of the core layer and including a build-up insulating layer and a build-up circuit layer; an adhesive layer formed between the second region of the core layer and the build-up layer; and an impregnation device mounted on the build-up layer to be impregnated into the adhesive layer. A heat generating element is mounted on the circuit layer and a thermally weakened element is mounted on the build-up layer, thereby preventing the thermally weakened element from being damaged by heat of the heat generating element.

Abstract: The heat-release properties of semiconductor device are to be improved and the reliability thereof is to be improved. The semiconductor device has a wiring substrate, a heat-releasing plate having a convex part inserted into a through-hole of the wiring substrate, a semiconductor chip mounted over the convex part of the heat-releasing plate, and a bonding wire coupling an electrode pad of the semiconductor chip with a bonding lead of the wiring substrate, and further has a sealing portion covering a portion of an upper surface of the wiring substrate, a sealing portion covering a portion of a lower surface of the wiring substrate including the semiconductor chip and the bonding wire, and a solder ball placed over a lower surface of the wiring substrate.

Abstract: A package is provided. The package includes a substrate having first and second surfaces, a stiffener coupled to the first surface of the substrate, and a thermal connector coupled to the second surface of the substrate that is configured to be coupled to a printed circuit board.

Abstract: A semiconductor package includes a first semiconductor chip having a first surface and a second surface which faces away from the first surface, a heat dissipation member, defined with a cavity, disposed on the first surface of the first semiconductor chip and having a plurality of metal pillars which contact the first semiconductor chip, and one or more second semiconductor chips stacked on the first surface of the first semiconductor chip in the cavity to be electrically connected with one another and with the first semiconductor chip.

Abstract: A power semiconductor chip (first semiconductor chip) 41 is mounted on the main surface of a first radiator plate 31, and a control IC chip (second semiconductor chip) 42 is mounted on the main surface of a second radiator plate 32. The first radiator plate 31 has an extending portion 31A extending toward the side on which the second radiator plate 32 is provided in the arrangement direction of first lead terminals (lead terminals 21 to 24). The first lead terminals (lead terminals 21 to 24) are connected to a first side of the first radiator plate 31 to function as extraction electrodes of a rear side electrode (D: drain electrode) of the power semiconductor chip 41. A second lead terminal (lead terminal 25) is connected to a bonding pad 411 serving as a source electrode (S). The third lead terminals (lead terminals 26 to 28) are connected to an electrode of the control IC chip 42.

Abstract: A die stack package is provided and includes a substrate, a stack of computing components, at least one thermal plate, which is thermally communicative with the stack and a lid supported on the substrate to surround the stack and the at least one thermal plate to thereby define a first heat transfer path extending from one of the computing components to the lid via the at least one thermal plate and a fin coupled to a surface of the lid and the at least one thermal plate, and a second heat transfer path extending from the one of the computing components to the lid surface without passing through the at least one thermal plate.

Abstract: A semiconductor device is provided that may include an insulating substrate having a ceramic substrate and metal coating layers on opposite surfaces of the ceramic substrate, a semiconductor chip mounted on one surface of the insulating substrate, and a heat sink directly or indirectly fixed to the other surface of the insulating substrate and thermally connected to the semiconductor chip through the insulating substrate. The heat sink may include a housing that is made of a metal sheet and radiating fins that are fixed in the housing and made of aluminum. The metal sheet may have a coefficient of thermal expansion between those of the insulating substrate and the radiating fin.

Abstract: To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the power MOSFET Q1, a diode DD2 for detecting the heat generation of the power MOSFET Q2, and plural pad electrodes PD are formed. The power MOSFET Q1 and the diode DD1 are arranged in a first MOSFET region RG1 on the side of a side SD1, and the power MOSFET Q2 and the diode DD2 are arranged in a second MOSFET region RG2 on the side of a side SD2. The diode DD1 is arranged along the side SD1, the diode DD2 is arranged along the side SD2, and all pad electrodes PD other than the pad electrodes PDS1 and PDS2 for the source are arranged along a side SD3 between the diodes DD1 and DD2.

Abstract: A semiconductor package, containing two or more stacked IC devices attached to a substrate. Each of the IC devices has a plurality of electrical contact regions which are connected to the substrate by means of electrical connections.

Abstract: Provided is a multi-layered semiconductor apparatus with improved heat diffusion and improved heat release. The multi-layered semiconductor apparatus (100) includes a plurality of layered semiconductor chips (20-1, 20-2) that each include at least one circuit region, and the circuit regions are arranged such that heat generated by the circuit regions as a result of the circuit regions being driven is spread out. The multi-layered semiconductor apparatus (100) further comprises a heat releasing section (50) that releases the heat generated by the circuit regions, and the circuit regions are arranged such that there is less thermal resistance between the heat releasing section and circuit regions that generate a greater amount of heat per unit area.

Abstract: This invention is to provide an electronic substrate device which is capable of reliably and stably transferring heat generated by a heat generating component to a base member serving as a heat dissipater without intermediation of an electronic substrate.

Abstract: An electrical package with improved thermal management. The electrical package includes a die having an exposed back surface. The package further includes a plurality of fins extending outwardly from the back surface for dissipating heat from the package. The die can be arranged in a multi-die stacking configuration. In another embodiment, a method of forming a die for improved thermal management of an electrical package is provided.

Abstract: A component loading system includes a board having a socket. A first base member is secured to the board through a plurality of first heat dissipater coupling posts. A first securing member is moveably coupled to the first base member. A second base member is secured to the board through a plurality of second heat dissipater coupling posts. A second securing member is moveably coupled to the second base member. A loading member is moveably coupled to the first base member and includes a pair of opposing side edges that define a width of the loading member. A heat dissipater is operable to be coupled to the plurality of first heat dissipater coupling posts and the plurality of second heat dissipater coupling posts.

Abstract: A semiconductor device package includes a semiconductor chip including a conductive pad, a die pad on which the semiconductor chip is mounted and having a first thickness, a lead pattern including a first portion disposed adjacent to the edge of the die pad and having the first thickness and a second portion having a second thickness greater than the first thickness, a heat radiation member disposed on the die pad and the lead pattern and including a groove formed at its bottom surface, and a conductive line disposed to electrically connect the conductive pad to the lead pattern corresponding to the conductive pad and partially inserted into the groove.

Abstract: A semiconductor package may include at least one semiconductor chip mounted on a substrate, a molding layer adapted to mold the at least one semiconductor chip, a heat slug, on the molding layer, having a structure in which a dielectric is provided between conductors, and a through mold via electrically connecting the heat slug to the substrate.

Abstract: An underfill film for an electronic device includes a thermally conductive sheet. The electronic device may include a printed circuit board, an electrical component, an underfill, and the thermally conductive sheet. The underfill is situated between the circuit board and the component. The thermally conductive sheet is situated within the underfill, and together with the underfill, constitutes the underfill film. The device may include solder bumps affixing the component to the circuit board, the underfill film having holes within which the solder bumps are aligned. There may be solder bumps on the underside of the circuit board promoting heat dissipation. There may be heat sinks on the circuit board to which the thermally conductive sheet is affixed promoting heat dissipation. The thermally conductive sheet may be affixed to a chassis promoting heat dissipation. The thermally conductive sheet thus promotes heat dissipation from the component to at least the circuit board.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a thermal post and a base. The thermal post extends upwardly from the base into a first opening in the adhesive, and the base extends laterally from the thermal post. The conductive trace includes a pad, a terminal and a signal post. The signal post extends upwardly from the terminal into a second opening in the adhesive.

Abstract: A cooling structure of a semiconductor device includes an output electrode, a semiconductor element and a semiconductor element disposed to face each other with the output electrode interposed therebetween, a radiator disposed for the semiconductor element on a side opposite to the output electrode, and a radiator disposed for the semiconductor element on the side opposite to the output electrode. The output electrode includes an element mounting portion and a heat transport portion. The element mounting portion is electrically connected to the semiconductor element and the semiconductor element, and is formed of a conductive material. The heat transport portion is disposed to extend from the element mounting portion toward the radiator and the radiator. With this structure, a cooling structure of a semiconductor device with which excellent cooling efficiency is realized can be provided.

Abstract: A CMOS thermoelectric refrigerator made of an NMOS transistor and PMOS transistor connected in series through a cold terminal is disclosed. Active areas of the NMOS and PMOS transistors are less than 300 nanometers wide, to reduce thermal conduction between the cold terminal and the IC substrate. Drain nodes of the NMOS and PMOS transistors are connected through hot terminals to a biasing circuit. The drain node of the NMOS transistor is biased positive with respect to the drain node of the PMOS transistor, to extract hot electrons and hot holes from the cold terminal. Biases on the drain nodes and gates of the NMOS and PMOS transistors may be adjusted to optimize the efficiency of the CMOS thermoelectric refrigerator or maximize the thermal power of the CMOS thermoelectric refrigerator. The cold terminal may be configured to cool a selected component in the IC, such as a transistor.

Abstract: A mount board includes a laminated wiring section including a plurality of wiring layers formed on a surface of a substrate in a laminated manner, wherein a portion of an inner wiring layer is exposed to the outside, the inner wiring layer being any of the plurality of wiring layers excluding an uppermost wiring layer.

Abstract: A projector includes at least one light source module, an optical system, an imaging unit, and a projection lens. Each light source module includes a lamp unit and a heat-dissipating module in close contacting with the lamp unit. Each of the at least one light source module is positioned at one end of the optical system. The imaging unit is positioned at the other end of the optical system. The projection lens is positioned at the same end of the optical system with the imaging unit. Each lamp unit can be adjusted along a first direction relative to the heat-dissipating module, each light source module can be adjusted along a second direction relative to the optical system, the first direction and the second direction both perpendicular to the light emitting direction of the corresponding lamp unit.

Abstract: A microelectronic assembly can include first and second microelectronic packages mounted to opposed surfaces of a circuit panel. Each package can include a substrate having first, second, and third apertures extending therethrough, first, second, and third microelectronic elements each having a surface facing the first surface of the substrate and a plurality of contacts aligned with at least one of the apertures, a plurality of terminals exposed at the second surface in a central region thereof, and leads connected between the contacts of each microelectronic element and the terminals. The apertures of each substrate can have first, second, and third axes extending in directions of their lengths. The first and second axes can be parallel to one another. The third axis can be transverse to the first and second axes. The terminals of each package can be configured to carry all of the address signals transferred to the respective package.

Abstract: An electronic apparatus includes: a housing; a circuit board accommodated in the housing; a face mounting component mounted on the circuit board; a heating component mounted on the circuit board; a reinforcing member having a thermal conductivity and configured to reinforce a region on the circuit board on which the face mounting component is mounted; and a radiation unit extended from the reinforcing member and connected thermally to the heating component.

Abstract: In a stacked layer type semiconductor package constructed by stacking a plurality of packages with each other, the plurality of packages include a semiconductor package including: a semiconductor chip; a substrate in which a concave portion has been formed, the semiconductor chip being mounted in the concave portion; and a wiring line structure constructed in such a manner that the wiring line structure can be externally connected to the semiconductor chip at least just above and just under the semiconductor chip.

Abstract: A heat-transfer mechanism which transfers heat of a heat-generating component mounted on a board to a housing includes a heat-transfer plate having a bottom face portion which has contact with the heat-generating component, a first heat-transfer portion which is screwed near one end portion of the housing and a second heat-transfer portion which is screwed near the other end portion of the housing.

Abstract: An electronic component storing package which generates a large quantity of heat during operation and an electronic apparatus storing such an electronic component are provided. In the electronic component storing package and the electronic apparatus, a heat dissipating member (1) is used which comprising at least five layers including first metal layers (11) having good thermal conductivity and second metal layers (12) having a smaller coefficient of thermal expansion and less thickness compared with the first metal layers (11), the first metal layers (11) and second metal layers (12) being alternately stacked, the first metal layers uppermost and lowermost layers of the layers, a thickness of at least one internally-arranged first metal layer (11a) being thicker than that of the lowermost and uppermost layers.

Abstract: Microprocessor, miniprocessor and heat sink surfaces having increased surface areas and increased heat dissipation are femtosecond pulsed laser machined. Nano structures formed and created on surfaces by the femtosecond pulsed laser machining provide increased surface areas which radiate heat by intensified IR radiation.

Abstract: A Printed Circuit Board (PCB) is provided in which at least one built-in Integrated Circuit (IC) package has a plurality of conductive bumps on an IC. The plurality of conductive bumps are for external electrical connection. The IC package is accommodated within a core layer of a multi-layer PCB by a connection member on the IC. The connection member is formed between the conductive bumps and the core layer with contact holes in contact with the conductive bumps. The conductive bumps are electrically connected through conductor layers formed in the contact holes.

Abstract: A power module includes one or more semiconductor power devices bonded to an insulated metal substrate (IMS). A plurality of cooling fluid channels is integrated into the IMS.

Abstract: Provided is a semiconductor integrated circuit. The semiconductor integrated circuit comprises: a pair of interconnections; a fuse connecting the pair of interconnections; and one or more heat dissipation patterns connecting the pair of interconnections and are disposed around the fuse.

Abstract: The power semiconductor module (1) comprises several semiconductor components (6, 7, 8), located on a substrate (2). The aim of the invention is to prevent a reduction in the pressure of the substrate against a cooling surface and the resulting loss of cooling arising from deformations. Said aim is achieved, whereby the substrate (2) comprises several substrate regions (3, 4, 5), with one or several connection regions (31, 32), located between substrate regions (3, 4, 5), by means of which the substrate regions (3, 4, 5) are connected such as to move relative to each other.

Abstract: This publication discloses a method for manufacturing a circuit-board structure.1. The structure comprises a conductor pattern (3) and at least one component (6), which is surrounded by an insulating-material layer (10), attached to it by means of a contact bump (5). According to the invention, the contact bumps (5) are made on the surface of the conductor pattern (3), before the component (6) is attached to the conductor pattern (3) by means of the contact bump (5). After attaching, the component (6) is surrounded with an insulating-material layer (10).

Abstract: A heat spreader is presented which can provide effective thermal management in a cost effective manner. The heat spreader includes a plurality of diamond particles arranged in a single layer surrounded by a metallic mass. The metallic mass cements the diamond particles together. The layer of diamond particles is a single particle thick. Besides the single layer of diamond particles, the metallic mass has substantially no other diamond particles therein. A thermal management system including a heat source and a heat spreader is also presented, along with methods for making and methods for use of such heat spreaders.

Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including: a first layer having a first conformable material; a second layer having a second conformable material; a third layer having a third material; and one or more electronic components embedded within the stack of layers, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.

Abstract: In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the chip 2, and the source terminal ST1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT2. Furthermore, source terminal ST2 and gate terminal GT2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.