Abstract: The epoxy resin molding material of the invention comprises (A) an epoxy resin and (B) a curing agent, wherein the (B) curing agent contains a polyvalent carboxylic acid condensate. The thermosetting resin composition of the invention comprises (A) an epoxy resin and (B) a curing agent, wherein the viscosity of the (B) curing agent is 1.0-1000 mPa·s at 150° C., as measured with an ICI cone-plate Brookfield viscometer.

Abstract: A semiconductor device includes a housing made of a thermoplastic resin and having an internal space that is opened on one side and an inner wall portion that has an inner peripheral surface defining the internal space; and a core portion engaged in the internal space of the housing. The core portion includes a substrate, a semiconductor element mounted on the substrate, a wire electrically connecting the substrate and the semiconductor element, and a mold resin sealing the substrate, the semiconductor element and the wire. The core portion has a side surface provided with a convex portion that is in contact with the inner peripheral surface of the inner wall portion. Accordingly, a semiconductor device allowing a lengthened life and improved productivity, and a method of manufacturing the semiconductor device can be provided.

Abstract: A device in accordance with one embodiment comprises component (1) and an encapsulation arrangement (2) for the encapsulation of the component (1) with respect to moisture and/or oxygen, wherein the encapsulation arrangement (2) has a first layer (21) and thereabove a second layer (22) on at least one surface (19) of the component (1), the first layer (21) and the second layer (22) each comprise an inorganic material, and the second layer (22) is arranged directly on the first layer (21).

Abstract: A barrier layer capable of preventing permeability of moisture, oxygen, other gases, solvents and volatile organic compounds is provided. The barrier layer includes a surface profile undulating in all directions. Further, the surface profile is characterized by the absence of non-undulating surface, straight lines and sharp edges. Further, the surface profile bends in reaction to at least one of thermal stress, mechanical stress, and load caused by deformation of an adjoining substrate or layer. This allows the barrier layer to stretch and shrink in all directions in a plane along the surface profile of the barrier layer and prevents cracking of the barrier layer.

Abstract: In a MEMS element 500 where a MEMS structure 201 is hermetically sealed in a cavity 110 by a substrate 301 and laminated structure 120, interface sealing layers 101, 102 and 103 are provided between two layers that constitute the laminated structure 120, so as to prevent gas from breaking into the cavity 110 through the interface between two layers along the direction parallel to the surface of the substrate 301.

Abstract: Present embodiments are directed to an adhesive and method for assembling a chip package. The adhesive may be used to couple a chip to a substrate, and the adhesive may include an epoxy-based dielectric material, an epoxy resin, a photoacid generator, an antioxidant, and a cold catalyst corresponding to the photoacid generator.

Abstract: A dual backplate MEMS microphone system including a flexible diaphragm sandwiched between two single-crystal silicon backplates may be formed by fabricating each backplate in a separate wafer, and then transferring one backplate from its wafer to the other wafer, to form two separate capacitors with the diaphragm.

Abstract: The epoxy resin molding material of the invention comprises (A) an epoxy resin and (B) a curing agent, wherein the (B) curing agent contains a polyvalent carboxylic acid condensate. The thermosetting resin composition of the invention comprises (A) an epoxy resin and (B) a curing agent, wherein the viscosity of the (B) curing agent is 1.0-1000 mPa·s at 150° C., as measured with an ICI cone-plate Brookfield viscometer.

Abstract: A semiconductor apparatus according to aspects of the invention can include a metal base; resin case having a bonding plane facing metal base; a coating groove formed in bonding plane and holding adhesive for bonding resin case to metal base at a predetermined position, with the top plane of the wall that forms coating groove being spaced apart from the plane which contains bonding plane such that an escape space is formed between the metal base and the resin case; the escape space receiving the excess amount of adhesive which has flowed out from the coating groove; and a receiver groove communicating to the escape space and receiving securely the excess amount of adhesive which the escape space has failed to receive. If an excess amount of adhesive too much for the receiver groove to receive is coated, the excess amount of adhesive can be received in a stopper groove.

Abstract: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallisation region is formed on the machined second surface of the semiconductor wafer.

Abstract: Method for manufacturing a rigid power module with a layer that is electrically insulating and conducts well thermally and has been deposited as a coating, the structure having sprayed-on particles that are fused to each other, of at least one material that is electrically insulating and conducts well thermally, having the following steps: manufacturing a one-piece lead frame; populating the lead frame with semiconductor devices, possible passive components, and bonding corresponding connections, inserting the thus populated lead frame into a compression mold so that accessibility of part areas of the lead frame is ensured, pressing a thermosetting compression molding compound into the mold while enclosing the populated lead frame, coating the underside of the thus populated lead frame by thermal spraying in at least the electrically conducting areas and overlapping also the predominant areas of the spaces, filled with mold compound.

Abstract: A method of fabricating a semiconductor stacked package is provided. A singulation process is performed on a wafer and a substrate, on which the wafer is stacked. A portion of the wafer on a cutting region is removed, to form a stress concentrated region on an edge of a chip of the wafer. The wafer and the substrate are then cut, and a stress is forced to be concentrated on the edge of the chip of the wafer. As a result, the edge of the chip is warpaged. Therefore, the stress is prevented from extending to the inside of the chip. A semiconductor stacked package is also provided.

Abstract: A method of manufacturing a MEMS device comprises forming a MEMS device element (14). A sacrificial layer (20) is provided over the device element and a package cover layer (22) is provided over the sacrificial layer. The sacrificial layer is removed using at least one opening (22) in the cover layer and the at least one opening (24) is sealed by an anneal process.

Abstract: A package includes: a metal wall disposed on a conductive base plate; a through-hole disposed in input/output portions of the metal wall; a lower layer feed through disposed on the conductive base plate; a wiring pattern disposed on the lower layer feed through; an upper layer feed through disposed on a part of the lower layer feed through and a part of the wiring pattern; and a terminal disposed on the wiring pattern, wherein a width of a part of the lower layer feed through and a width of the upper layer feed through are wider than a width of the through-hole, the lower layer feed through is adhered to a side surface of the metal wall, the upper layer feed through is adhered to the side surface of metal wall, and an air layer is formed between the wiring pattern and an internal wall of the through-hole.

Abstract: An electret accelerometer is provided in which a diaphragm, an electret, a back plate and an electronic circuit are placed in a casing and the casing is sealed to isolate the diaphragm from external acoustic signals.

Abstract: An integrated circuit package system that includes: providing an electrical interconnect system including a support structure and a lead-finger system; processing a top edge of the support structure along an outermost periphery thereof, to include a recess for preventing mold bleed, the recess surrounded by the lead finger system; and encapsulating the recess and the electrical interconnect system with an encapsulation material to interlock the encapsulation material.

Abstract: A ring structure for chip packaging comprises a frame portion adaptable to bond to a substrate and at least one corner portion. The frame portion surrounds a semiconductor chip and defines an inside opening, and the inside opening exposes a portion of a surface of the substrate. The at least one corner portion extends from a corner of the frame portion toward the chip, and the corner portion is free of a sharp corner.

Abstract: A method of manufacturing an electronic device package. Coating a first side of a metallic layer with a first insulating layer and coating a second opposite side of the metallic layer with a second insulating layer. Patterning the first insulating layer to expose bonding locations on the first side of the metallic layer, and patterning the second insulating layer such that remaining portions of the second insulating layer on the second opposite side are located directly opposite to the bonding locations on the first side. Selectively removing portions of the metallic layer that are not covered by the remaining portions of the second insulating layer on the second opposite side to form separated coplanar metallic layers. The separated coplanar metallic layers include the bonding locations. Selectively removing remaining portions of the second insulating layer thereby exposing second bonding locations on the second opposite sides of the separated coplanar metallic layers.

Abstract: An electronic component has a substrate, a die bonding pad provided on an upper surface of the substrate, a semiconductor element bonded onto the die bonding pad by a die bonding resin, a conductive pattern disposed adjacent to the die bonding pad, and a coating member covering the conductive pattern. At least an outer peripheral portion of a surface of the die bonding pad is made of an inorganic material. The inorganic material of the outer peripheral portion is exposed. The die bonding pad and the conductive pattern are separated by an air gap such that the coating member does not come into contact with the die bonding pad.

Abstract: A thermal interface material includes a thermally conductive metal matrix and coarse polymeric particles dispersed therein. The composite can be used for both TIM1 and TIM2 applications in electronic devices.

Abstract: Methods are provided for production of pre-collapsed capacitive micro-machined ultrasonic transducers (cMUTs). Methods disclosed generally include the steps of obtaining a nearly completed traditional cMUT structure prior to etching and sealing the membrane, defining holes through the membrane of the cMUT structure for each electrode ring fixed relative to the top face of the membrane, applying a bias voltage across the membrane and substrate of the cMUT structure so as to collapse the areas of the membrane proximate to the holes to or toward the substrate, fixing and sealing the collapsed areas of the membrane to the substrate by applying an encasing layer, and discontinuing or reducing the bias voltage. CMUT assemblies are provided, including packaged assemblies, integrated assemblies with an integrated circuit/chip (e.g., a beam-steering chip) and a cMUT/lens assembly. Advantageous cMUT-based applications utilizing the disclosed pre-collapsed cMUTs are also provided, e.g.

Abstract: A sample liquid supply container is disclosed. The sample liquid supply container includes a first region which is depressurized therein and is hermetically sealed, a second region which is able to receive a liquid therein, a first penetration portion, in which an interior of the first region is punctured by a hollow needle from outside, and a second penetration portion, in which an interior of the second region is punctured by the hollow needle inserted into the first penetration portion and reaches inside the first region.

Abstract: The symbolization of a semiconductor device (100) is incorporated in a thin sheet (130) attached to the top of the device, facing outwardly with its bare surface. The material of the sheet (about 1 to 10 ?m thick) includes regions of a first optical reflectivity and a first color, and regions (133) of a second optical reflectivity and a second color, which differ from, and contrast with, the first reflectivity and color. Preferred choices for the sheet material include the compound o-cresol novolac epoxy and the compound bisphenol-A, more preferably with the chemical imidazole added to the film material. A preferred embodiment of the invention is a packaged device with a semiconductor chip a (101) connected to a substrate (102); the connection is achieved by bonding wires (111) forming an arch with a top 111a. The chip, the wire arches, and the substrate are embedded in an encapsulation material (120), which borders on the attached top sheet so that the arch tops touch the border (131).

Abstract: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect assembly includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a plurality of the through openings. The composite contacts include a conductive member having a central portion and at least first and second interface portions. One or more polymeric layers extend along at least the central portion conductive member. One or more coupling features on the composite contacts engage with the housing. At least one engagement feature formed in the polymeric layers proximate the first interface portion mechanically couples with the terminals on the first circuit member.

Abstract: A printed wiring board is configured to be connected to an organic substrate in a state where a semiconductor chip is mounted thereon. A plurality of first layers are formed of a material having the same coefficient of thermal expansion as the semiconductor chip. A plurality of second layers are formed of a material having the same coefficient of thermal expansion as the organic substrate. The first layers have different thicknesses from each other and the second layers have different thicknesses from each other. The first layers and the second layers form a lamination by being laminated alternately one on another. The thicknesses of the first layers decrease from a side where the semiconductor chip is mounted toward a side where the organic substrate is connected. The thicknesses of the second layers decrease from the side where the organic substrate is connected toward the side where the semiconductor chip is mounted.

Abstract: A method for manufacture of a nanophotonic device can include the step of operatively coupling a planar light source and a photodetector with an optical waveguide. The planar light source, photodetector and optical waveguide can then be monolithically integrated in direct contact with a sapphire substrate, along with an electronic component that is also in direct contact with the sapphire substrate.

Abstract: Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

Abstract: Apparatus and methods are provided for packaging IC (integrated circuit) chips to enable both optical access to the back side of an IC chip and electrical access to the front side of the IC chip.

Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die disposed within the die receiving through hole; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.

Abstract: The invention provides a semiconductor element mounting substrate that, by virtue of an improvement in thermal conduction efficiency between the substrate and another member, can reliably prevent, for example, a light emitting element such as a semiconductor laser from causing a defective operation by heat generation of itself, by taking full advantage of high thermal conductivity of a diamond composite material.

Abstract: An electronic device according to the invention includes: a substrate; an MEMS structure formed above the substrate; and a covering structure defining a cavity in which the MEMS structure is arranged, wherein the covering structure has a first covering layer covering from above the cavity and having a through-hole in communication with the cavity and a second covering layer formed above the first covering layer and closing the through-hole, the first covering layer has a first region located above at least the MEMS structure and a second region located around the first region, the first covering layer is thinner in the first region than in the second region, and a distance between the substrate and the first covering layer in the first region is longer than a distance between the substrate and the first covering layer in the second region.

Abstract: Disclosed are a semiconductor device wherein warping of a semiconductor chip due to a sudden temperature change can be prevented without increasing the thickness, and a semiconductor device assembly. The semiconductor device comprises a semiconductor chip, a front side resin layer formed on the front surface of the semiconductor chip by using a first resin material, and a back side resin layer formed on the back surface of the semiconductor chip by using a second resin material having a higher thermal expansion coefficient than the first resin material. The back side resin layer is formed thinner than the front side resin layer.

Abstract: A conductive shield covering a semiconductor integrated circuit prevents electrostatic breakdown of the semiconductor integrated circuit (e.g., malfunction of a circuit and damage to a semiconductor element) due to electrostatic discharge. Further, with use of a pair of insulators between which the semiconductor integrated circuit is sandwiched, a highly reliable semiconductor having resistance can be provided while achieving reduction in the thickness and size. Moreover, also in the manufacturing process, external stress, or defective shapes or deterioration in characteristics resulted from electrostatic discharge are prevented, and thus the semiconductor device can be manufactured with high yield.

Abstract: Devices and methods for their formation, including electronic assemblies having a shape memory material structure, are described. In one embodiment, a device includes a package substrate and an electronic component coupled to the package substrate. The device also includes a shape memory material structure coupled to the package substrate. In one aspect of certain embodiments, the shape memory material structure is formed from a material selected to have a martensite to austenite transition temperature in the range of 50-300 degrees Celsius. In another aspect of certain embodiments, the shape memory material structure is positioned to extend around a periphery of the electronic component. Other embodiments are described and claimed.

Abstract: The waveform signals of ultrasonic waves reflected by a plurality of interfaces in a measurement object are received, the waveform signal of a reflected wave on a reference interface inside the measurement object is detected based on the amplitudes of the received waveform signals, and evaluation is made on the bonded condition of an interface to be measured based on the waveform signal of the reflected wave on the reference interface.

Abstract: A shielded integrated circuit structure including an integrated circuit having a plurality of functional elements thereon, and a tiled array comprising a plurality of shielding elements, each functional element having one of the plurality of shielding elements proximate thereto. The shielding elements comprise a magnetic material having a saturation less than or equal to 20,000 gauss.

Abstract: An integrated circuit package employs a stiffener layer that houses a passive electronic component to maintain mechanical properties when a thinner substrate is used. The use of either a retention wall or a stiffener allows for the manufacture of these integrated circuit package using strip, matrix, or array technology where a larger board with a plurality of integrated circuit packages is produced industrially and then cut to individual units.

Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.

Abstract: An adhesive layer, an insulating layer and a copper foil are laminated together on both surfaces of a metallic base material by way of for example thermal press molding. In this case, openings (window holes) are formed in opposed positions on a portion of the adhesive layer. A circuit pattern is formed by etching on the copper foil in this state, followed by an external shape machining step of executing separation treatment reaching the metallic base material in predetermined positions including the openings. After that, a part of the insulating layer is cut off along the edge of the opening to obtain a circuit board with the end of the metallic base material exposed.

Abstract: A potted electrical circuit is enclosed within a housing and has a first and second fiberglass layer that is laid upon a top surface of the potted electrical circuit. A lid of the housing seals the electrical circuit there within and an opening formed in a side wall allows circuitry wiring to extend there from out. The first fiberglass layer is a woven layer while the second fiberglass layer is a padding-like layer. Circuitry wiring pushes through the woven first fiberglass layer before extending out through the opening in the housing. The first fiberglass layer is tucked in and around the electrical circuit and adheres to the inside of the housing by attaching to the potting material while it hardens. In a preferred embodiment, the electrical circuit in combination with the insulation material is used within a transient voltage surge suppression device.

Abstract: A potted electrical circuit is enclosed within a housing and has a first and second fiberglass layer that is laid upon a top surface of the potted electrical circuit. A lid of the housing seals the electrical circuit there within and an opening formed in a side wall allows circuitry wiring to extend there from out. The first fiberglass layer is a woven layer while the second fiberglass layer is a padding-like layer. Circuitry wiring pushes through the woven first fiberglass layer before extending out through the opening in the housing. The first fiberglass layer is tucked in and around the electrical circuit and adheres to the inside of the housing by attaching to the potting material while it hardens. In a preferred embodiment, the electrical circuit in combination with the insulation material is used within a transient voltage surge suppression device.

Abstract: A sample liquid supply container is disclosed. The sample liquid supply container includes a first region which is depressurized therein and is hermetically sealed, a second region which is able to receive a liquid therein, a first penetration portion, in which an interior of the first region is punctured by a hollow needle from outside, and a second penetration portion, in which an interior of the second region is punctured by the hollow needle inserted into the first penetration portion and reaches inside the first region.

Abstract: The light emitting structure disclosed includes a light emitting device, a metal frame, and a repressing fastener. The light emitting device has a plurality of first coupling terminals, and the metal frame has a plurality of second coupling portions. The light emitting device is disposed in the metal frame, and the first coupling terminals touch the second coupling portions to electrically connect the light emitting device and the metal frame. The repressing fastener is disposed on the light emitting device and fastened to the metal frame to secure the light emitting device in the metal frame. An LED securing device is also disclosed.

Abstract: A nanophotonic device. The device includes a substrate, at least one light emitting structure and at least one electronic component. The at least one light emitting structure is capable of transmitting light and is monolithically integrated on the substrate. The at least one electronic component is monolithically integrated on the substrate. A method for fabricating nanophotonic devices is also described.

Abstract: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a plurality of the through openings. The composite contacts include a conductive member having a central portion and at least first and second interface portions. One or more polymeric layers extend along at least the central portion conductive member. One or more coupling features on the composite contacts engage with the housing. At least one engagement feature formed in the polymeric layers proximate the first interface portion mechanically couples with the terminals on the first circuit member.

Abstract: A copper-compatible fuse target is fabricated by forming a copper target structure at the same time that the copper traces are formed. After the copper target structure and the copper traces have been formed, a conductive target, such as an aluminum target, is formed on the copper target structure at the same time that conductive connection portions, such as aluminum pads, are formed on the copper traces. A trench is then etched around the copper target structure and conductive target to form a fuse target.

Abstract: A silicon condenser microphone package and method for manufacture are disclosed. The silicon condenser microphone package includes a silicon condenser microphone die, a substrate comprising a conductive layer, and a cover having a conductive layer, where the conductive layers of the substrate and cover are electrically connected to form an electromagnetic interference shield for the silicon condenser microphone die. The method for manufacturing the silicon condenser microphone package involves placement of a plurality of silicon condenser microphone dies on a panel of printed circuit board material, placement of covers over each of the silicon condenser microphone dies, and then separating the panel into individual packages.

Abstract: A stacked electronic component comprises a first electronic component adhered on a substrate via a first adhesive layer, and a second electronic component adhered by using a second adhesive layer thereon. The second adhesive layer has a two-layer structure formed by a same material and having different modulus of elasticity. The second adhesive layer of the two-layer structure has a first layer disposed at the first electronic component side and a second layer disposed at the second electronic component side. The first layer softens or melts at an adhesive temperature. The second layer maintains a layered shape at the adhesive temperature. According to the stacked electronic component, occurrences of an insulation failure and a short circuiting are prevented, and in addition, a peeling failure between the electronic components, an increase of a manufacturing cost, and so on, can be suppressed.

Abstract: An adhesive layer, an insulating layer and a copper foil are laminated together on both surfaces of a metallic base material by way of for example thermal press molding. In this case, openings (window holes) are formed in opposed positions on a portion of the adhesive layer. A circuit pattern is formed by etching on the copper foil in this state, followed by an external shape machining step of executing separation treatment reaching the metallic base material in predetermined positions including the openings. After that, a part of the insulating layer is cut off along the edge of the opening to obtain a circuit board with the end of the metallic base material exposed.

Abstract: A method of manufacturing a MEMS device comprises forming a MEMS device element (14). A sacrificial layer (20) is provided over the device element and a package cover layer (22) is provided over the sacrificial layer. The sacrificial layer is removed using at least one opening (22) in the cover layer and the at least one opening (24) is sealed by an anneal process.