Abstract: A solid-state imaging device comprises a housing in which a base and ribs forming a rectangular frame are formed in one piece by a resin; a plurality of metal lead pieces embedded in the housing, each of which has an internal terminal portion facing an internal space of the housing and an external terminal portion exposed at an outer portion of the housing; an imaging element arranged on the base in the internal space of the housing; connecting members connecting electrodes of the imaging element to the internal terminal portions of the metal lead pieces; and a transparent plate fastened to an upper face of the ribs. The upper face of the ribs is provided with a lower step portion that is lowered along an external periphery, and the transparent plate is fastened to the upper face of the ribs by an adhesive filled at least into the lower step portion.

Abstract: A device package includes at least one semiconductor device having at least one electrode of an elongated length. The device package also includes at least one conductive pad that extends parallel to the elongated length of the electrode. A terminal lead may be integral with the conductive pad. A plurality of wirebonds of about the same length may electrically connect the conductive pad and the elongated electrode of the semiconductor device. As another alternative, a second semiconductor device may be mounted to the conductive pad and a plurality of wirebonds may electrically connect this second device and the elongated electrode of the first semiconductor device.

Abstract: A semiconductor package includes a semiconductor chip, a circuit board at which a wire pattern is formed, and a metal structure including a portion inserted through an opening of the circuit board and upon which the semiconductor chip rests. With the semiconductor chip in direct contact with the metal structure, thermal characteristics improve. With the circuit board supported by the metal structure, mechanical stability improves.

Abstract: An image sensor module includes a flexible printed circuit board having an upper surface, which is formed with electric circuits and a lower surface. A passive component is arranged on the upper surface of the circuit board. A substrate has a first surface, a second surface and a penetrated hole. The second surface of the substrate is mounted on the upper surface of the circuit board so that the passive component is located within the penetrated hole. A chip is mounted on the first surface of the substrate, and is located onto the penetrated hole. Wires are electrically connected to the chip and the substrate. A lens holder is mounted on the first surface of the substrate and formed with an internal thread. A lens barrel is formed with an external thread screwed on the internal thread and is formed with an opening, an aspheric lens and an infrared filter.

Abstract: A digital camera module (100) includes a holder, an image sensor chip package (30), a number of conductive elements (24) and a circuit board (40). The holder defines a receiving portion. The holder is mounted on the image sensor chip package. The image sensor chip package has a number of outer pads. The outer pads are positioned in the receiving portion of the holder. The conductive elements are received in the receiving portion. One end of each of the conductive elements is connected to the inner pads, the other end of each of the conductive elements is connected to the circuit board.

Abstract: A circuit structure may be formed in a substrate having a face and an open trench, where one or more chips are to be mounted. At least one bridge may extend across an intermediate portion of the trench, and optionally, may divide the trench into sections. A conductive adhesive layer may be applied to the substrate face and, if included, the bridge. One or more circuit chips may be mounted on the adhesive layer, with at least one edge of one circuit chip adjacent to the trench. Alternatively or additionally, an adhesive layer may be applied to a base of a chip and then mounted to the substrate face, in like fashion. The trench may accommodate excess adhesive flowing out from under the one or more chips, while the bridge retains the adhesive across the width of the trench. If the adhesive is conductive, this provides continuity of the conductive layer on the face of the substrate across the trench.

Abstract: A multi chip package includes a first semiconductor chip, a second semiconductor chip and a spacer. The spacer is formed between the first semiconductor chip and the second semiconductor chip. The second semiconductor chip is fixed on the first semiconductor chip by an adhesive material that is formed on the first semiconductor chip. Since the spacer is formed between the first semiconductor chip and the second semiconductor chip, the space between the first semiconductor chip and the second semiconductor chip is even.

Abstract: A notebook/laptop computer or other personal electronic device locking assembly includes a locking base secured to a working surface. The locking base locks the notebook computer or other personal electronic device securely in place to a work surface such as a desk top or table top. The lock is adapted to engage the notebook computer or other personal electronic device screen in the open position, leaving a front surface of the screen viewable. The lock includes a locking member which prevents removal of the notebook computer or other personal electronic device from the work surface.

Abstract: A superfine-circuit semiconductor package structure includes a carrier board, a support board having at least one through hole and mounted on the carrier board, at least one semiconductor chip received in the through hole of the support board and mounted on the carrier board, at least one circuit built-up structure electrically connected to the semiconductor chip and formed on the support board and the semiconductor chip, wherein the circuit built-up structure includes at least two insulating layers, a plurality of conductive vias formed in the lower insulating layer, circuit layer electrically connected to the conductive vias and flush with the upper insulating layer, and a plurality of conductive elements mounted on the circuit built-up structure, such that the semiconductor chip can be electrically connected to an external device through the circuit built-up structure and the conductive elements.

Abstract: A substrate structure for a semiconductor a package and a package method thereof are disclosed. A plurality of independent module substrates are arranged on a metal or heat-resistant frame that has a hollow portion and those module substrates are suspended and connected with the frame by a plurality of connecting bars. A molding component is utilized to respectively cover those module substrates. Then punch, and grind the plurality of rugged bumps of those connecting bars to form a plurality of independent module packages, wherein the cover area of the molding component is larger than the size of each the module substrate. The metal or heat-resistant frame is utilized to replace the conventional side rail design so as to increase the usable area of the substrate to substantially come to the cost reduction of the substrate.

Abstract: The specification discloses an apparatus comprising an alignment plate having a plurality of depressions therein, each depression being sized to receive a packaging cap therein and to prevent its movement, and a force applicator to apply a force to press the packaging caps and a substrate firmly together. Also disclosed is a process comprising inserting a plurality of packaging caps in a plurality of depressions on an alignment plate, each depression being sized to receive a packaging cap and prevent its movement, aligning the plurality of packaging caps with individual devices on a substrate, placing the substrate in contact with the packaging caps, and applying a force to press the caps against the substrate. Other embodiments are disclosed and claimed.

Abstract: A semiconductor device carrier comprising; a carrier housing having a housing portion for accommodating a semiconductor device; an electrode sheet disposed in the carrier housing, having a front surface wiring conductively arranged on a front surface of an insulation substrate, a rear surface wiring conductively arranged on a rear surface of the insulation substrate, a rear surface bump contact placement wiring, and a bump contact disposed in a contact placement portion and an elastic sheet disposed in the carrier housing to be in contact with the bottom of the electrode sheet; wherein a width of the rear surface bump contact placement wiring in correspondence to a bump contact to be in contact with an extreme electrode section of the semiconductor device is smaller than a width of the front surface bump contact placement wiring on which a bump contact to be in contact with the extreme electrode section is arranged.

Abstract: A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device of one embodiment can include a semiconductor chip (1) mounted to a bottom portion (11) of a metal base (10A). A metal base (10A) can have side portions (12) with connection electrodes (15A) having a surface level higher than that of electrodes (7 and 8) on a surface of the semiconductor chip (1) by a difference (d). The connection electrode (15A) can be formed on a projecting piece (16) that is bent outward away from remaining portions of the side portion (12). The semiconductor device can be mounted face down without abutting the semiconductor chip (1) against a mounting substrate, thereby preventing mechanical damage to a semiconductor chip (1). At the same time, a solder layer can be formed in the gap between electrodes (7 and 8) and the mounting substrate, thereby raising the reliability of the soldering connection.

Abstract: A vertically mountable semiconductor device assembly including a semiconductor device and a mechanism for attaching the semiconductor device to a carrier substrate. The semiconductor device has each of its bond pads disposed proximate a single edge thereof. At least a portion of the semiconductor device may be exposed. An alignment device is attached to a carrier substrate. A mounting element on the vertically mountable semiconductor device package engages the alignment device to interconnect the semiconductor device and the alignment device. The alignment device may secure the vertically mountable semiconductor device package perpendicular relative to the carrier substrate. The distance between the bond pads and corresponding terminals on the carrier substrate is very small in order to reduce impedance. The vertically mountable semiconductor device package may also be readily user-upgradable.

Abstract: A singulation method used in leadless packaging process is disclosed. An array of molded products on an upper surface of a lead frame is utilized in the singulation method. The lead frame has a plurality of dambars between the molded products. The lower surface of the lead frame is attached with a tape. Each of the molded products includes a semiconductor chip encapsulated in a package body and electrically coupled to the upper surface of the lead frame. The singulation method is accomplished by etching the upper surface of the lead frame with the package bodies as mask until each dambar is etched away.

Abstract: Surface-mountable semiconductor component having a semiconductor chip (1), at least two external electrical connections (31/314/41, 32/324/42), which are electrically conductively connected to at least two electrical contacts of the semiconductor chip (1), and an encapsulation material (50). The two external electrical connections are arranged at a film (2) having a thickness of less than or equal to 100 ?m. The semiconductor chip (1) is fixed at a first main surface (22) of the film (2) and the encapsulation material (50) is applied on the first surface (22).

Abstract: The present invention relates to a lid for an integrated circuit. According to one embodiment, an integrated circuit having a lid comprises a substrate having a flat surface and extending a first length and a lid having a recess and a foot portion. The lid generally has a second length shorter than the first length, and is positioned on the flat surface of the substrate. Finally, a bonding agent is positioned on the flat surface adjacent the foot portion of the lid. According to an alternate embodiment, a second component is positioned on the substrate outside the foot portion, and an adhesive seal is positioned on the substrate adjacent the foot and covering the component. A method of securing a lid to an integrated circuit is also disclosed.

Abstract: The specification teaches a device for use in the manufacturing of microelectronic, microoptoelectronic or micromechanical devices (microdevices) in which a contaminant absorption layer improves the life and operation of the microdevice. In a preferred embodiment the invention includes a mechanical supporting base, and a layer of a gas absorbing or purifier material is deposited on the base by a variety of techniques and a layer for temporary protection of the purification material is placed on top of the purification material. The temporary protection material is compatible for use in the microdevice and can be removed during the manufacture of the microdevice.

Abstract: A semiconductor device includes a base, a semiconductor element having a plurality of electrodes, a plurality of conductive lines connected to the electrodes of the semiconductor element, plating stubs attached to the conductive lines, and a plurality of wiring layers formed in a plurality of layers on the base. The plating stub attached to a first conductive line, and the plating stubs attached to one or a plurality of second conductive lines adjacent to the first conductive line, exist in different conductive wiring layers.

Abstract: The present invention provides a semiconductor device which includes a U-shaped metal package base, and a semiconductor chip having at least surface electrodes and being mounted on the inner bottom portion of the U-shaped metal package base, wherein the metal package base has, in a portion thereof ranging from the opened side end portion of the inner side wall to the semiconductor chip, a creep-up preventive zone preventing solder entering from the opened side end portion from creeping up.

Abstract: An electronic system having a sandwich design and including two carriers, each carrier having a printed circuit layer, the upper printed circuit layer being positioned on different planes.

Abstract: A VCSEL settling fixture provides for a plurality of VCSEL chip packages to be selectively tested within a burn-in or environmental chamber having a remote pendant controller. The settling fixture includes a mounting frame including a plurality of recesses and throughbores for positioning and aligning the VCSEL's on the mounting frame. The mounting frame further includes a plurality of terminal blocks in proximity to the recesses for interconnecting the mounting frame with the controller. An activation system including a plurality of electrical contacts electrically connects the individual VCSEL chip packages with the terminal blocks so that the controller can selectively trigger a laser output from the VCSEL chip package.

Abstract: Provided are a flexible film package module and a method of manufacturing the same that can be adapted for manufacture at lower cost and/or to adapt the characteristics of the flexible film package module for specific applications. The lower-cost flexible film package module includes a tape film that combines both a first insulating substrate, typically formed from a higher-cost polyimide material, and a second insulating substrate, typically formed from an insulating material or materials that are less expensive and/or provide modified performance when compared with the first insulating material. Both the first and second substrates will include complementary circuit patterns that will be electrically and physically connected to allow the composite substrate to function as a unitary substrate. The first and second substrates will also include connection regions that may be adapted for connection to printed circuit boards and/or electronic devices such as liquid crystal displays.

Abstract: A semiconductor device comprising a substrate, a semiconductor element mounted on the substrate, an inner annular stiffener provided on the substrate in an outer side of the semiconductor element, and an outer annular stiffener provided on the substrate in an outer side of the inner annular stiffener. The inner annular stiffener and the outer annular stiffener are made of different materials. Particularly, the thermal expansion coefficient of the inner annular stiffener is selected to be smaller than that of the substrate, and the thermal expansion coefficient of the outer annular stiffener is selected to be larger than that of the substrate. The amount of deformation of the substrate is thus decreased.

Abstract: Semiconductor packages provide a leadframe for packages that are singulated with respective predetermined package body sizes. Individual mold caps are formed on the leadframe with mold cap dimensions that are larger than the respective predetermined package body sizes. The mold caps and leadframe are singulated to the respective predetermined package body sizes.

Abstract: A semiconductor device package comprises a perimeter wall snap fitted to a base having a semiconductor die mounted on the base. A lead is mounted on the opposite side of the die, and the die and a portion of the lead are protected by an encapsulant disposed within the perimeter wall.

Abstract: A package substrate has a power supply path different from a signal supply path to a semiconductor element. A semiconductor element is mounted on a first surface of the package substrate. A second surface opposite to the first surface is provided with external connection terminals. A power supply layer is formed inside the package substrate. The package substrate has electrode terminals provided in a part other than the second surface. The electrode terminals are connected to the power supply layer.

Abstract: A laser device includes a can package of a laser diode having a lead terminal secured to a through hole in a stem by a sealant, and a flexible substrate having a transmission line on a front surface of a polyimide film. The lead terminal of the can package and one end of a transmission line of the flexible substrate are connected by soldering. A resistor for matching the impedance of the transmission line and the impedance of the lead terminal is located in the vicinity of a connection of the transmission line and the lead terminal.

Abstract: The present invention relates to a circuit assembly with at least two semiconductor components, each having terminals, whereby at least one terminal of the first semiconductor component is connected to a terminal of the other semiconductor component in an electrically conductive manner. The circuit assembly damps high-frequency oscillations that occur during switching operations. An eddy-current damping structure is provided above said assembly at a distance from the semiconductor components or said semiconductor components are directly connected to each other by means of a high-resistance wire connection in addition to the existent electroconductive connection.

Abstract: A semiconductor package is mounted to a support plate through a base. The base is inserted between a rear face of the semiconductor package and a front face of the support plate. An electrical connection mechanism is provided to connect the semiconductor package to the support plate pass. This mechanism passes through the base. The mounting of the semiconductor package is accomplished by a variety of structures to fasten the package onto the said support plate. These structures cooperate with and are placed below the rear face of the semiconductor package.

Abstract: A rectification chip terminal structure for soldering a rectification chip encased in a glass passivated pallet (GPP) on a terminal filled with a packaging material to form a secured mounting for the rectification chip is to be inserted in a coupling bore of a circuit board. The structure includes a conductive element which has a buffer portion and a base seat to prevent the GPP from fracturing when the packaging material is heated and expanded or prevent the conductive element from bending and deforming under external forces, and has a stress buffer zone to prevent the chip from being damaged and moisture from entering. It can prevent the GPP from fracturing when the packaging material is heated and expanded and be installed easily in the coupling bore of the circuit board and hold the packaging material securely without breaking away.

Abstract: A semiconductor device comprising a substrate. An interconnect pattern is formed over the substrate, and the substrate has a first portion and a second portion to be superposed on the first portion. The first portion has edges as positioning references. The second portion has a shape to be superposed over the first portion except the edges.

Abstract: A semiconductor device X1 comprises: a first conductor 110 including a first terminal surface 113a; a second conductor 120 placed by the first conductor 110 and including a second terminal surface 123a facing a same direction as does the first terminal surface 113a; a third conductor 130 connected with the first conductor 110; a semiconductor chip 140 including a first surface 141 and a second surface 142 away from the first surface, and bonded to the first conductor 110 and to the second conductor 120 via the second surface 142; and a resin package 150. The first surface 141 of the semiconductor chip 140 is provided with a first electrode electrically connected with the first conductor 110 via the third conductor 130. The second surface 142 is provided with a second electrode electrically connected directly with the second conductor 120.

Abstract: A panel assembly of packaged integrated circuit devices including a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described.

Abstract: The present invention relates to an integrated circuit system with at least one integrated circuit, a cooling body to dissipate the heat generated by the integrated circuit and a latent heat storage module having a latent heat storage medium. The latent heat storage module is thermally connected to the cooling body in order to temporarily store the heat generated by the integrated circuit and to convey it to the cooling body. The integrated circuit has at least one semiconductor component which is assembled on a substrate and the substrate is in direct thermal contact with the latent heat storage module.

Abstract: A tape assembly for use in wafer dicing includes a layer of adhesive dicing tape having a size at least as large as a footprint of a die, and a screening portion which is adhered to the tape. The screening portion is interposed between the layer of tape and the die when the die is adhered to the layer of tape. The screening portion covers an interior portion of the layer of tape. The screening portion is sized and shaped to leave a sufficient portion of the layer of tape underlying a perimeter of the die exposed to adhere the die to the layer of tape.

Abstract: A semiconductor device includes a base substrate provided with a base wiring. A first substrate includes a first wiring to be electrically connected to the base wiring and is provided above the base substrate. A first semiconductor element includes a first electrode to be electrically connected to the first wiring and is provided between the base substrate and the first substrate. A second substrate includes a second wiring to be electrically connected to the base wiring and is provided above the first substrate. A second semiconductor element includes a second electrode to be electrically connected to the second wiring and is provided between the first substrate and the second substrate and above the first semiconductor element. The first substrate has a first region where the first semiconductor element is provided below, a second region where a portion of the first wiring that connects to the base wiring is located, and a first bent section between the first region and the second region.

Abstract: A sensor package P is a surface-mounted sensor package which is adapted to be mounted on a printed board 200. The sensor package P includes a case 1 for accommodating a semiconductor acceleration sensor chip 100 having output pads 101. The case has a bottom wall 10, which is divided into a center area 10a for supporting the sensor chip 100 and a peripheral area 10b. Output electrodes 15 to be connected to the output pads 101 are formed on external surfaces of the peripheral area. These output electrodes 15 are soldered to the printed board 200 for electrical connection between the sensor chip and an electric circuit of the printed board as well as for holding the sensor package physically on the printed board. The feature of the present invention resides in that grooves 12 are formed in an interior surface of the bottom wall 10 between the center area 10a and the peripheral area 10b.

Abstract: A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device (10) of one embodiment can include a semiconductor chip (1) mounted to a bottom portion (11) of a metal base (10). A metal base (10) can have side portions (12) with connection electrodes (15) having a surface level higher than that of electrodes (7 and 8) on a surface of the semiconductor chip (1) by a difference (d). The semiconductor device (10) can be mounted face down without abutting the semiconductor chip (1) against a mounting substrate, thereby preventing mechanical damage to a semiconductor chip (1). At the same time, a solder layer can be formed in the gap between electrodes (7 and 8) and the mounting substrate, thereby raising the reliability of the soldering connection.

Abstract: A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device (10) of one embodiment can include a semiconductor chip (1) mounted to a bottom portion (11) of a metal base (10). A metal base (10) can have side portions (12) with connection electrodes (15) having a surface level higher than that of electrodes (7 and 8) on a surface of the semiconductor chip (1) by a difference (d). The semiconductor device (10) can be mounted face down without abutting the semiconductor chip (1) against a mounting substrate, thereby preventing mechanical damage to a semiconductor chip (1). At the same time, a solder layer can be formed in the gap between electrodes (7 and 8) and the mounting substrate, thereby raising the reliability of the soldering connection.

Abstract: A microwave monolithic integrated circuit (MMIC) package includes a MMIC and a base plate that is matched as to its coefficient of thermal expansion (CTE) with the MMIC. A solder preform is contained on the base plate. The MMIC is mounted on the solder preform. A chip cover covers the MMIC and are configured with respective portions that engage each other such that any pads on the MMIC are exposed for wire and ribbon bonding. The base plate and MMIC are secured together by a solder flow process from the solder preform.

Abstract: A semiconductor device including a substrate (10). An interconnect pattern (12) is formed over the substrate (10), and the substrate (10) has a first portion (14) and a second portion (16) to be superposed on the first portion (14). The first portion (14) has edges (22), (24), (26) and (28) as positioning references. The second portion (16) has a shape to be superposed over the first portion (14) except the edges (22), (24), (26) and (28).

Abstract: According to one embodiment, an apparatus is disclosed. The apparatus comprises an integrated circuit (IC) having a plurality of connection pins, a carrier socket configured to carry the IC. The carrier socket protects the pins of the IC from bending. In addition, the carrier socket straightens pins that have been bent prior to placing the IC into the carrier socket.

Abstract: A semiconductor device includes an internal circuit area including a plurality of I/O modules, and a peripheral area receiving therein a pair of loop test lines for testing I/O buffers in the I/O modules. The internal test line extending from each of the loop test lines toward the internal circuit area includes an out-module test line formed as the topmost layer, a first in-module test line formed as the topmost layer and connected to the out-module test line, and a second in-module test line, a portion of which is formed by connecting the in-buffer test lines together.

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; at least one chip mounted on the top surface of the substrate and electrically connected to the substrate; a heat sink attached to the top surface of the substrate by an adhesive material applied therebetween; and a plurality of solder balls implanted on the bottom surface of the substrate. The heat sink has a flat portion and a support portion connected to the flat portion. The support portion has at least one recess portion facing toward the top surface of the substrate and at least one burr formed on an interior surface of the recess portion such that the adhesive material can fill the recess portion and submerge the burr to provide an anchoring effect to firmly secure the heat sink in position on the substrate.

Abstract: The power semiconductor includes a module housing having a conductive cover plate and a conductive baseplate and also an insulating housing wall arranged between the cover plate and the baseplate. A power semiconductor circuit is accommodated in the module housing. Two terminals of the power semiconductor circuit are led out of the module housing, a first of the at least two terminals being provided for the contact connection of the cover plate. The two terminals are arranged on opposite areas of a printed circuit board led out of the module housing, which printed circuit board can be contact-connected by means of a standard connector. The power semiconductor module according to the invention has improved contacts with regard to stability and inductance.

Abstract: An electronic circuit assembly including a plurality of printed circuit boards including electrical circuits and electronic components mounted on at least one of the plurality of printed circuit boards in electrical communication with the electrical circuits, wherein at least some of the plurality of printed circuit boards define an anti-tamper enclosure for at least some of the electronic components.

Abstract: A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device (10) of one embodiment can include a semiconductor chip (1) mounted to a bottom portion (11) of a metal base (10). A metal base (10) can have side portions (12) with connection electrodes (15) having a surface level higher than that of electrodes (7 and 8) on a surface of the semiconductor chip (1) by a difference (d). The semiconductor device (10) can be mounted face down without abutting the semiconductor chip (1) against a mounting substrate, thereby preventing mechanical damage to a semiconductor chip (1). At the same time, a solder layer can be formed in the gap between electrodes (7 and 8) and the mounting substrate, thereby raising the reliability of the soldering connection.

Abstract: An opto-electronic package is provided for mounting on a module base. The package comprises a generally rectangular package. An optical connector extends from a first side of the package body along an optical axis, generally parallel to the module base. A radio frequency connector extends from a second side of the package body along a RF axis, generally parallel to the module base. A plurality of electronic leads and mounting tabs each extend from at least one of the second side and a third side of the package body. A fourth side of the package body is adjacent the first side and free of connectors, leads, and mounting tabs for mounting the package in a corner of the module formed by first and second module walls. The fourth wall of the package body is positioned adjacent the first module wall and the optical connector extends through the second module wall.

Abstract: The present invention relates to a carrier module for micro-BGA (&mgr;-BGA) type device which is capable of testing a produced device without damaging to a solder ball thereunder after being rapidly connected to a test socket. A carrier module for a &mgr;-BGA type device according to the present invention comprises: an upper and lower carrier module body formed with protrusions at the upper and lower portions thereof; a device receiving unit inserted to the upper carrier module body for receiving a &mgr;-BGA type device; and a spring secured elastically to the upper and lower protrusions by being inserted thereto.