Abstract: A semiconductor device in which a capacitor (2) is provided on a surface (10) of a semiconductor body (3) with a semiconductor element (1) in which a lower electrode (11), an oxidic ferroelectric dielectric (12) and an upper electrode (13) are provided in that order, the upper electrode not covering an edge of the dielectric, after which an insulating layer (14) with superimposed metal conductor tracks is provided. According to the invention, the edge of the dielectric (12) not covered by the upper electrode (13) is coated with a coating layer (14, 20, or 30) practically imperviable to hydrogen, after which the device is heated in a hydrogen-containing atmosphere. Heating in a hydrogen atmosphere neutralizes dangling bonds which arise during deposition of the conductor tracks on the insulating layer, while the coating layer protects the dielectric from attacks by hydrogen. The semiconductor device then has a shorter access time.

Abstract: A tamper resistant structure has a pattern which covers portions of an IC but exposes other portions of the IC so that etching away the tamper resistant structure destroys the exposed portions. The IC can not be easily disassembled and reverse engineered because the tamper resistant structure hides active circuitry and removing the tamper resistant structure destroys active circuitry. One embodiment of the tamper resistant structure includes a metal layer and a cap layer. The cap layer typically includes material that is difficult to remove, such as silicon carbide, silicon nitride, or aluminum nitride. The metal layer typically includes a chemically resistant material such as gold or platinum. A bonding layer of nickel-vanadium alloy, titanium-tungsten alloy, chromium, or molybdenum, may be used to provide stronger bonds between layers. Some embodiments provide an anti-corrosion seals for bonding pads in addition to the tamper residant structure.

Abstract: A method and resulting ohmic contact structure between a high work function metal and a wide bandgap semiconductor for which the work function of the metal would ordinarily be insufficient to form an ohmic contact between the metal and the semiconductor. The structure can withstand annealing while retaining ohmic characteristics. The ohmic contact structure comprises a portion of single crystal wide bandgap semiconductor material; a contact formed of a high work function metal on the semiconductor portion; and a layer of doped p-type semiconductor material between the single crystal portion and the metal contact. The doped layer has a sufficient concentration of p-type dopant to provide ohmic behavior between the metal and the semiconductor material.

Abstract: A semiconductor device comprising an oxide film, an electrode and a PZT or PLZT film formed in this order on a substrate, the electrode being a deposit of platinum containing lead.

Abstract: A semiconductor device (1) includes a circuit having at least one transistor Tr1 and first and second electrodes (30) and (32). A protection element (20) having a device region (21) forming a pn junction (23) within the semiconductor body (10) and covered by an electrode layer (21c) is connected via an electrode (27) to one (30) of the first and second electrodes for providing a conductive path between the first and second electrodes (30) and (32) when a voltage above a threshold voltage is applied to the first electrode (30). The electrode layer (21c) forms with at least part (21a) of the device region (21) a potential barrier (B) for causing the conductive path provided by the protection element (20) to pass from the electrode (27) to the pn junction (23) at least partly via the device region (21) of the protection element (20) thereby increasing the resistance of the path to the pn junction (23).

Abstract: A semiconductor device with a monocrystalline silicon body (1) is provided with a dielectric layer (2) with contact holes (3) through which the silicon body (1) is contacted with an aluminum metallization. To avoid undesirable separation of silicon, a discontinuous nucleus layer (5) of a metal nobler than silicon is formed on the silicon body (1) in the contact holes (3) preceding the provision of the metallization (4). Metals such as palladium and copper may be used to form the discontinuous layer.

Abstract: A semiconductor device having a GaAs substrate and an ohmic electrode. An electrode pad is on part of the ohmic electrode and on part of the GaAs substrate outside the ohmic electrode. The electrode pad includes a first platinum film, a titanium film, a second platinum film, and a gold film which are sequentially deposited on one another. The first platinum film is thinner than each of the titanium film, second platinum film and gold film.

Abstract: A hermetic seal is provided for a conductive feedthrough through a thin ceramic component by a platinum or palladium lead by sealing the gap between the lead and the ceramic with a copper-copper oxide eutectic. The lead may have a copper coating on it prior to and subsequent to formation of the copper-copper oxide eutectic.

Abstract: An SB FET comprising source and drain regions formed in the surface of a gallium arsenide (GaAs) substrate, and a channel region formed between the source and drain regions. The gate electrode of the SB FET is formed on the channel region in Schottky contact therewith. The SB FET further comprises source and drain electrodes which are mounted on the source and drain regions in ohmic contact therewith, while being separated from each other at a greater distance than the length of the channel region.

Abstract: A superconducting device comprises a substrate having an electric connecting section and a copper oxide superconducting material thereon, and an electric interconnecting means for the electric connecting section and the superconducting material formed from a first member selected from the group of copper, gold, platinum and materials including copper, gold, and platinum as a main component and tightly attached to the superconducting material, and/or a second member selected from the group of a heat resistant metal material and its compound with the first member and the substrate material and tightly attached to the first member and the substrate.

Abstract: A silicon carbide field-effect transistor is disclosed which includes an MOS structure composed successively of a silicon carbide layer, a gate insulator film, and a gate electrode. The field-effect transistor has source and drain regions formed in the silicon carbide layer, between which the MOS structure is disposed, wherein at least one of the source and drain regions is formed by the use of a Schottky contact on the silicon carbide layer.

Abstract: A superconducting device comprises a substrate having an electric connecting section and a copper oxide superconducting material thereon, and an electric interconnecting means for the electric connecting section and the superconducting material formed from a first member selected from the group of copper, gold, platinum and materials including copper, gold, and platinum as a main component and tightly attached to the superconducting material, and/or a second member selected from the group of a heat resistant metal material and its compound with the first member and the substrate material and tightly attached to the first member and the substrate.

Abstract: In an ohmic contact electrode for the p-type semiconductor diamond, the electrode is formed of metals or metallic compounds containing boron on a p-type semiconductor diamond, so as to obtain a decreased contact resistance.

Abstract: This is a highly purified metal comprising one metal selected from the group consisted of titanium, zirconium and hafnium. The highly purified metal has an Al content of not more than 10 ppm. It also has an oxygen content of not more than 250 ppm, each of Fe, Ni and Cr contents not more than 10 ppm and each of Na and K contents not more than 0.1 ppm. The highly purified metal is obtained by either purifying crude metal by the iodide process or surface treating crude metal to remove a contaminated layer existing on the surface thereof and then melting the surface treated material with electron beam in a high vacuum.

Abstract: An improved ferroelectric structure and the method for making the same is disclosed. The improved structure reduces the fatigue problems encountered in ferroelectric capacitors while providing avoiding problems in depositing the ferroelectric material which have prevented other solutions to the fatigue problem from being effective. The improved ferroelectric structure also provides improved adhesion to the underlying substrate. The ferroelectric structure has a bottom electrode comprising a layer of PtO.sub.2 which is generated by depositing a layer of Platinum on a suitable substrate and then exposing the Platinum layer to an Oxygen plasma. The ferroelectric material is then deposited on the PtO.sub.2 layer.