Abstract: A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more thermal conductors (103a) of preferably uniform height connect one sheet (103b) and the chip surface (101a); the number of conductors is scalable with the chip size. Each conductor consists of an elongated wire loop (preferably copper) with the wire ends attached to a pad (105), preferably both ends to the same pad. The major loop diameter is approximately normal to the first surface and the loop vertex in contact with the sheet (103b). The substrate (104, preferably a second metal sheet) covers at least portions of the second package surface and is thermally conductively connected to the chip.

Abstract: An integrated circuit having a semiconductor sensor device including a sensor housing partly filled with a rubber-elastic composition is disclosed. One embodiment has a sensor chip with sensor region arranged in the interior of the housing. The sensor housing has an opening to the surroundings which is arranged in such a way that the sensor region faces the opening. The sensor chip is embedded into a rubber-elastic composition on all sides in the interior of the housing. The sensor housing has a sandwich-like framework having three regions arranged one above another, including an intermediate region with the rubber-elastic composition.

Abstract: Applications of smart polymer composites to integrated circuit packaging.

Abstract: A semiconductor die has a polyimide layer disposed on its top surface. At the corners of the die top, the polyimide layer is roughened or patterned, but not enough such that the die top is exposed. The patterned corners enhance adhesion of a mold compound later disposed on the die top by allowing for enhanced hydrogen bonding between the polyimide layer and the mold compound.

Abstract: Scratch-resistant coatings for protecting front-side microelectromechanical and semiconductor device features during backside processing are provided, along with methods of using the same. The coatings are non-photosensitive, removable, and tolerate high processing temperatures. These coatings also eliminate the need for a separate etch stop layer in the device design. The coatings are formed from a composition comprising a component dissolved or dispersed in a solvent system. The component is selected from the group consisting of styrene-acrylonitrile copolymers and aromatic sulfone polymers.

Abstract: The present invention provides polyimide polymer materials for passivating semiconductor wafers and methods for fabricating thereof.

Abstract: Various semiconductor chip reinforcement structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip that has a side and forming a polymer layer on the side. The polymer layer has a central portion and a first frame portion spatially separated from the central portion to define a first channel. An underfill material may be provided to invade the channel and establish a mechanical joint between the polymer layer and the underfill material.

Abstract: A semiconductor chip is temporarily fixed on a circuit board by having a thermosetting adhesive film in between. A sealing resin film is provided with a mold release film, and a thermosetting sealing resin layer, which is laminated on the mold release film and has a film thickness 0.5 to 2 times the thickness of the semiconductor chip. The sealing resin film is arranged on the semiconductor chip so that the thermosetting sealing resin layer faces the semiconductor chip. Heat is applied to the side of the circuit board, while applying pressure to the sealing resin film from the side of the mold release film by using a rubber head having a rubber hardness of 5-100 to bond the semiconductor chip on the circuit board. After sealing the semiconductor chip with the resin, the mold release film is peeled.

Abstract: This invention discloses an electronic package for containing a vertical semiconductor chip that includes a laminated board having a via connector and conductive traces distributed on multiple layers of the laminated board connected to the via connector. The semiconductor chip having at least one electrode connected to the conductive traces for electrically connected to the conductive traces at a different layer on the laminated board and the via connector dissipating heat generated from the vertical semiconductor. A ball grid array (BGA) connected to the via connector functioning as contact at a bottom surface of the package for mounting on electrical terminals disposed on a printed circuit board (PCB) wherein the laminated board having a thermal expansion coefficient in substantially a same range the PCB whereby the BGA having a reliable electrical contact with the electrical terminals.

Abstract: A polyimide shield includes a base film layer that is made from polyimide, and a colored film layer that overlies the base film layer and that contains a coloring agent dispersed in a polymer. A method of making the polyimide shield includes forming the base film layer from polyimide and applying a liquid composition onto the base film layer. The liquid composition contains a polymer and the coloring agent that is dispersed in the polymer. An integrated circuit structure includes a circuitry substrate and the polyimide shield that covers the circuitry substrate.

Abstract: A light emitting diode (10) includes an LED chip (14) and an encapsulant (16) enclosing the LED chip. The LED chip has a light emitting surface (141), and the encapsulant has a light output surface (161) over the light emitting surface. The light output surface defines a plurality of annular, concentric grooves (163). Each groove is cooperatively enclosed by a first groove wall (165) and a second groove wall (166). The first groove wall is a portion of a circumferential side surface of a cone, and a conical tip of the cone is located on the light emitting surface of the LED chip.

Abstract: The present invention relates to a primer resin for semiconductor devices which comprises a polyamide resin represented by the following formula (1): (wherein, R1 represents a tetravalent aromatic tetracarboxylic acid residue selected from the group consisting of pyromellitic acid, 3,4,3?,4?-diphenyl ether tetracarboxylic acid, 2,3,6,7-naphthalenetetracarboxylic acid and 3,4,3?,4?-benzophenone tetracarboxylic acid, R2 represents at least one kind of divalent diamine residue selected from the group consisting of diamino-4,4?-hydroxydiphenylsulfone, 4,4?-diamino-3,3?5,5?-tetraethyldiphenylmethane and 1,3-bis-(aminophenoxy)benzene, and n is a repeating number and represents a positive number of 10 to 1000) and has a lead frame comprising copper or 42 alloy, a semiconductor device having said primer resin layer between a lead frame comprising copper or 42 alloy and a cured product of a sealing resin, and a semiconductor sealing epoxy resin composition containing said primer resin; and said semiconductor devic

Abstract: Organometallic colloid(s) is dispersed in a polymer matrix to form an infrared-blocking encapsulant.

Abstract: A lead frame which is disposed in an outer package is composed of three members. The lead frame is provided with contact electrodes, connector terminals, and conductive interconnections which are connected to the respective connector terminals. The arrangement order of the contact electrodes is such that contact electrodes are connected to the connector terminals, respectively; that is, the arrangement direction of the contact electrodes is the same as that of the connector terminals. On the other hand, the arrangement order of the contact electrodes is such that contact electrodes are connected to the connector terminals, respectively, that is, the arrangement direction of the contact electrodes is opposite to that of the connector terminals. Lead terminals of a resin cell package are connected to the contact electrodes.

Abstract: A semiconductor device in which moisture penetration into the package interior is suppressed, comprising a rewiring layer formed by plating, with improved reliability of electrical characteristics. On the main surface of a semiconductor chip comprising circuit elements and formed on a wafer, a passivation film opposing the circuit elements is formed, so as to expose a first region of the main surface along the edges of the main surface. An insulating film, which extends over the main surface and along the side faces of this passivation film and onto the main surface of the semiconductor chip, is formed such that there remains a second region within the first region, along the edges of the main surface. A sealing layer covering the insulating film is then formed on the second region.

Abstract: A semiconductor device includes a substrate; an alignment mark formed on the substrate and composed of a metal film; a cover insulating film formed on the alignment mark and covering an entire surface of the alignment mark; and a polyimide film formed on the cover insulating film, and having an opening, which is opened on the alignment mark and has an end face aligning with an end face of the alignment mark, in plan view.

Abstract: In a semiconductor device of the present invention, in order that the contact of electrodes formed on a film substrate with edge parts of a semiconductor element at the time such as when the semiconductor element is mounted thereon may be reliably prevented, in the semiconductor element mounted on at least one surface of the film substrate having the electrodes, an insulating protection part is formed at a desired position of the surface opposed to the electrodes, and the distance between the semiconductor element and the film substrate is set at not less than 10 ?m.

Abstract: The present invention discloses a light-proof chip packaging structure, which comprises an electronic substrate, at least one semiconductor chip installed on the electronic substrate, and a light-proof film. The light-proof film comprises a main portion, which is substantially conformable to cover all the non-concealed faces of the semiconductor chip. The light-proof film also has an extension portion, which extends from the main portion and covers the areas neighboring the semiconductor chip. The light-proof film comprises a metallic layer capable of blocking light and an insulating layer interposing between the metallic layer and the semiconductor chip. The present invention can effectively reduce the gaps between the semiconductor chip and the light-proof film, whereby no bubble is formed in encapsulating the electronic substrate, thus reducing the possibility of damaging the packing structure.

Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.

Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.

Abstract: The present invention provides a positive photosensitive resin composition, characterized by comprising 1 to 50 parts by mass of a photo-acid generator and 0.01 to 70 parts by mass of a terpene compound in combination with 100 parts by mass of a hydroxypolyamide having repeating units. A terpene compound can be combined with a hydroxypolyamide having a particular structure to provide a positive photosensitive resin composition excellent in positive lithography performance such as sensitivity and resolution.

Abstract: A method for manufacturing an alignment layer is provided, which includes the following steps. First, a substrate is provided. Next, an auxiliary layer is formed on the substrate. Then, an alignment solution is sprayed on the auxiliary layer through an inkjet printing process. The alignment solution includes an alignment material and a first solvent, and the auxiliary layer has the same polarity as the first solvent. Then, by performing a curing process, the alignment solution is cured to form an alignment layer. As mentioned above, the method for manufacturing an alignment layer may be applied to manufacture an alignment layer with preferred smoothness.

Abstract: Dendrimer/hyperbranched materials are combined with polyimide to form a low CTE material for use as a dielectric substrate layer or an underfill. In the alternative, ruthenium carbene complexes are used to catalyze ROMP cross-linking reactions in polyimides to produce a class of cross-linkable, thermal and mechanical stable material for use as a dielectric substrate or underfill. In another alternative, dendrimers/hyperbranched materials are synthesized by different methods to produce low viscosity, high Tg, fast curing, mechanically and chemically stable materials for imprinting applications.

Abstract: A semiconductor device includes: a substrate; a semiconductor element mounted on the substrate; a sealing structure for sealing the semiconductor element, the sealing structure being mounted on the substrate; and an adhesive for bonding the sealing structure and the substrate, wherein the sealing structure has a groove for storing the adhesive.

Abstract: A circuit with embedding components (13) is produced by placing the components (13) on a substrate (14) and applying sheets (15) of prepreg. The prepreg sheets (15) have apertures to accommodate the -components, the number of sheets and arrangement of apertures being chosen to accommodate a variety of component X, Y and Z dimensions. A top layer with Cu foil (16(b)) is applied. The assembly is pressed in an operation analogous to conventional multilayer board lamination pressing. This causes all of the prepreg resin to flow to completely embed the components without raids or damage. Electrical connections are made by drilling and plating vias.

Abstract: An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between ?55° C. to 300° C. The present invention can also tolerate continuous operation at 300° C., due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to simulate the components from the substrate. Prior to the simulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: Ball grid array packages for semiconductor die include a thermally conductive container and a substrate that substantially enclose a semiconductor die. The die is positioned with respect to the container by thermally conductive supports formed in the container or attached to the container. The die contacts the supports so that the die and the container form a cavity that is at least partially filled with a thermally conductive material such as a conductive epoxy to promote thermal conduction between the die and the container. The die electrically connects to the substrate with bond wires that extend through an aperture in the substrate and attach to bond pads provided on the substrate. The aperture is typically filled with a protective layer of resin, epoxy, or other material that also encapsulates the bond wires.

Abstract: An encapsulating epoxy resin molding material, comprising (A) an epoxy resin, (B) a curing agent, and (C) an inorganic filler, wherein the inorganic filler (C) has an average particle size of 12 ?m or less and a specific surface area of 3.0 m2/g or more.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: A semiconductor device has a semiconductor substrate having first and second surface, a first resin film formed on the first surface of the semiconductor substrate and a second resin film formed on the second surface of the semiconductor substrate. A projection electrode or an interconnection is formed on the first surface of the semiconductor substrate, the second resin film is made of low elastic resin which is capable of absorbing an impact applied to the second surface of the semiconductor substrate and the second resin film is thinner than the semiconductor substrate.

Abstract: Disclosed are a semiconductor device, a method for manufacturing the same, and a method for mounting the same.

Abstract: A novel micro optical system as a platform technology for electrical and optical interconnections, thermal and mechanical assembly and integration of electronic, optoelectronic, passive and active components. This platform provides optical coupling and chip-to-chip interconnection by microwave electrical, optical guided and unguided waves, and power or bias electrical contacts or interfaces by a novel chip in flexible circuit, rigid or inflexible embodiments.

Abstract: Disclosed area compositions comprising: a polyimide resin with a water absorption of 2% or less and, optionally, one or more of an electrically insulated filler, a defoamer and a colorant and one or more organic solvents. The compositions are useful as encapsulants and have a consolidation temperature of 190° C. or less.

Abstract: The present invention provides an apparatus and method for use in processing semiconductor workpieces. The new apparatus and method allows for the production of thinner workpieces that at the same time remain strong. Particularly, a chuck is provided that includes a body, a retainer removeably attached to the body and a seal forming member. When a workpiece is placed on the chuck body and the retainer is engaged to the body, a peripheral portion of the back side of the workpiece is covered by the retainer while an interior region of the back side of the workpiece is exposed. The exposed back side of the workpiece is then subjected to a wet chemical etching process to thin the workpiece and form a relatively thick rim comprised of semiconductor material at the periphery of the workpiece. The thick rim or hoop imparts strength to the otherwise fragile, thinned semiconductor workpiece.

Abstract: The present invention provides a mounting structure of a semiconductor chip (3) onto an insulated substrate (2). The insulated substrate (2) is made of a polyimide resin, at least side surfaces (3c) of the semiconductor chip (3) is protected by a protective resin (5) provided by a polyimide resin. The semiconductor chip (3) is held by the protective resin (5) with respect to the insulated substrate (2). Preferably, an adhesive layer (4) is provided between the semiconductor chip (3) and the insulated substrate (2). The adhesive layer (4) is also provided by a polyimide resin.

Abstract: A semiconductor device includes a semiconductor substrate having a plurality of connecting pads on one surface, an insulating film formed on one surface of the semiconductor substrate. The insulating film has holes each corresponding to one of the connecting pads, and a recess having a bottom surface depressed from the upper surface in the direction of thickness. Interconnections are formed on an upper surface of the insulating film or on the bottom surface of the recess, and connected to the connecting pads through the holes in the insulating film.

Abstract: A sensor device includes a circuit chip and a sensor chip. The circuit chip has a bonding portion. The sensor chip is stacked on the bonding portion of the circuit chip. The circuit chip and the sensor chip are bonded by a film-type adhesive containing 91 ±3 weight % of polyimide with no filler.

Abstract: A flexible wiring board for tape carrier package having improved flame resistance is disclosed. The flexible wiring board has an insulating film having a bending slit, a wiring pattern formed thereon and crossing the bending slit, an adhesive layer adhering the wiring pattern to the insulating film, a flex resin layer protecting the wiring pattern at the bending slit, and an overcoat layer protecting the wiring pattern, in which the overcoat layer is obtained from a curable resin composition, when cured into a form of film, the film has an initial modulus of 10 to 1,500 MPa at 25° C., an electrical insulation of sufficient level, a soldering resistance of 10 seconds at 260° C., and an oxygen index exceeding 22.0.

Abstract: The invention relates to a vertical arrangement of at least two semiconductor components which are electrically insulated from one another by at least one passivation layer. The invention likewise relates to a method for fabricating such a semiconductor arrangement. A semiconductor arrangement is specified in which, inter alia, the risk of cracking at the metallization edges, for example, caused by thermomechanical loading, is reduced and the fabrication-dictated high content of radical hydrogen is minimized. Furthermore, a method for fabricating such a semiconductor arrangement is specified.

Abstract: Integrated circuit packages and their manufacture are described, wherein the packages comprise dendrimers or hyperbranched polymers. In some implementations, the dendrimers or hyperbranched polymers include repeat units having one or more ring structures and having surface groups to react with one or more components of a plastic. In some implementations, the dendrimers or hyperbranched polymers have a glass transition temperature of less than an operating temperature of the integrated circuit and form at least a partially separate phase.

Abstract: Solder joints coupling pins to a microelectronic package substrate are enshrouded with an encapsulation material. In this manner, pin movement is limited even if the pin solder subsequently melts.

Abstract: The present invention provides a COF flexible printed wiring board whose insulating layer is not melt-adhered to a heating tool, to thereby enhance reliability and productivity of a semiconductor chip mounting line, and also provides a method of producing the COF flexible printed wiring board. The COF flexible printed wiring board contains an insulating layer, a wiring pattern, on which a semiconductor chip being mounted, formed of a conductor layer provided on at least one side of the insulating layer and a releasing layer, wherein the releasing layer is formed from a releasing agent containing at least one species selected from a silane compound and silica sol and is provided on a surface of the insulating layer, which is opposite to the mounting side of the semiconductor chip.

Abstract: A semiconductor device in which moisture penetration into the package interior is suppressed, comprising a rewiring layer formed by plating, with improved reliability of electrical characteristics. On the main surface of a semiconductor chip comprising circuit elements and formed on a wafer, a passivation film opposing the circuit elements is formed, so as to expose a first region of the main surface along the edges of the main surface. An insulating film, which extends over the main surface and along the side faces of this passivation film and onto the main surface of the semiconductor chip, is formed such that there remains a second region within the first region, along the edges of the main surface. A sealing layer covering the insulating film is then formed on the second region.

Abstract: An adhesive sheet for producing a semiconductor device, which includes a base layer and an adhesive layer and is used in the process for producing the semiconductor device including the step of sealing a semiconductor element connected to an electric conductor with a sealing resin on the adhesive layer, wherein the adhesive layer of the adhesive sheet includes a rubber component and an epoxy resin component and the ratio of the rubber component in organic materials in the adhesive layer is from 5 to 40% by weight. According to this adhesive sheet, pollution is not caused by silicon components, a sufficient elastic modulus can be kept even at high temperature, and a problem that paste remains is not easily caused.

Abstract: An integrated circuit device having a semiconductor device and an encapsulating material on at least a portion of the semiconductor device and a method for encapsulating an integrated circuit device is disclosed. The encapsulating material includes a plurality of nanoparticles.

Abstract: Methods are provided for manufacturing a sensor. The method comprises depositing a sacrificial material at a first predetermined thickness onto a wafer having at least one sense element mounted thereon, the sacrificial material deposited at least partially onto the at least one sense element, forming an encapsulating layer at a second predetermined thickness less than the first predetermined thickness over the wafer and around the deposited sacrificial material, and removing the sacrificial material. Apparatus for a sensor manufactured by the aforementioned method are also provided.

Abstract: A package of a semiconductor device comprising an integrated circuit (10) generally comprises an inner layer (21) and an outer layer (16), which layers (16,21) have a mutual interface (24). An improved stability of the package is realized in that the interface (24) encloses a delamination area (22), which area (22) is isolated from any bond pads (18) of the integrated circuit (10). The delamination area (22) may be created by a pattern-wise activation of a surface of the inner layer (21). A quantity of a curable polymer may be disposed on this surface to achieve this.

Abstract: A method is provided of making a semiconductor package with a heat spreader in which a chip carrier module plate consisting of a plurality of array-arranged chip carriers is mounted with at least one chip on each of the chip carriers. A heat spreader module plate is attached to the chips, with an interface layer formed on a top surface of the heat spreader module plate. The chip carrier module plate, the chips and the heat spreader module plate are encapsulated. Adhesion force between the interface layer and the encapsulant is larger than that between the interface layer and the heat spreader module plate, and adhesion force between the interface layer and the heat spreader module plate is smaller than that between the heat spreader module plate and the encapsulant.