Abstract: A semiconductor device has an active layer formed on a semiconductor substrate with different types of junctions, a source region, a drain region, a T-shaped gate electrode in which the cross-sectional area of the upper surface is larger than that of the lower surface, a first dielectric layer covering at least the exposed surface of the active layer, and the gate electrode, and a second dielectric layer enclosing the first dielectric layer. In the device, when the specific inductive capacities of the first and second dielectric layers are .epsilon.(1) and .epsilon.(2) respectively .epsilon.(1)<.epsilon.(2) and the water absorption ratio of the first dielectric layer is greater than the water absorption ratio of the second dielectric layer.

Abstract: A method of forming an integrated circuit assembly having a stepped interposer (300), an integrated circuit die (200) and an encapsulant (500). The stepped interposer (300) includes a central portion (320) having a plurality of contact regions (360), and a peripheral region (330), completely surrounding the central region (320), having a plurality of bonding regions (350). Some of the contact regions (360) are electrically coupled to some of the bonding regions (350). The integrated circuit die (200) includes a plurality of bonding pads (210) located around its periphery. The stepped interposer (300) is fixably coupled to the integrated circuit die (200) and some of the bonding pads (210) are electrically coupled to some of the bonding regions (350). The stepped interposer (300) of the present invention provides contact regions (360) free from encapsulant (500) and added protection for wirebonds (400) or any other means of electrical coupling.

Abstract: A high-voltage breakover diode is proposed, which takes on the function of an ignition voltage distributor of an internal combustion engine having solid-state highvoltage distribution. The high-voltage breakover diode comprises a cascade of breakover diode chips, a polyimide layer having recesses in the region of the cathode connection being provided between the individual breakover diode chips produced using planar technology, in each case on the top of the breakover diode chips, and the mechanical and electrical connection of the individual breakover diode chips being effected by means of a conductive adhesive (FIG. 3).

Abstract: A packaging material for electronic components is provided which inhibits the cracking of a passivation film on an encapsulated chip and inhibits the breaking of an interconnecting metallization pattern in a chip of an electronic component and meets the miniaturization trend for electronic components. The packaging material includes: a resin, and 80% to 93% by weight, relative to the total amount of the packaging material, of a filler made up of particles having an average particle size of 30 .mu.m or less, at least 90% by weight of which are spherically shaped or have rounded ends and/or edges.

Abstract: A dual footprint for servicing either of two types of microprocessor packaging systems. A first footprint capable of receiving and servicing a first type of microprocessor packaging system, for example, a tape carrier package microprocessor package, is formed within a second footprint capable of receiving and servicing a second type of microprocessor packaging system, for example, a pin grid array microprocessor package. In a preferred form, the two footprints are electrically interconnected and the first footprint is offset by a selected angle from the second footprint to allow increased connectivity between the two footprints.

Abstract: A semiconductor device obtained by encapsulating a semiconductor element with a thermosetting resin composition comprising a thermosetting resin (Component I) and a hardener (Component II) having the following components III and IV incorporated therein. The semiconductor device is thus provided with a high heat resistance at infrared reflow step and a high flame retardance, showing a drastically enhanced reliability.(III) A metal hydroxide represented by the following general formula (1):n(M.sub.a O.sub.b).cH.sub.2 O (1)wherein M represents a metallic element; a, b and c each represents a positive number; and n represents a positive number of 1 or more, with the proviso that when M.sub.a O.sub.b is repeated, the plurality of M's may be the same or different and that a and b may be the same or different; and(IV) a metal oxide represented by the following general formula (2):n'(Q.sub.d O.sub.

Abstract: Disclosed is a resin-sealed semiconductor device which has an insulation substrate 1 having a chip-mounting portion is, leads which are radially disposed around the chip-mounting portion, an IC chip mounted on the chip-mounting portion and connected electrically with inner portions of the leads, a resin which seals over an area which includes the IC chip and the inner leads and does not include a peripheral portion of the insulation substrate and the outer leads, and outer portion of terminals which are electrically connected with the outer leads which are left out of the resin.

Abstract: This invention is for an integrated circuit package which includes two integrated circuit die connected to a common substantially planar lead frame, wherein bond pads on each die face the common lead frame.

Abstract: An interposer between the leads of a leadframe and the ends of wires connected to an integrated circuit die is described herein. The interposer may consist a polyimide tape or other insulating material with conductive traces formed thereon, each trace electrically connecting an inner bonding pad to an outer bonding pad formed on the tape. The outer bonding pads are generally arranged around the periphery of the interposer and are bonded to respective ends of the leadframe. An integrated circuit die is placed in approximately the center of the interposer surrounded by the inner bonding pads. An automatic bonder then bonds wires to the bonding pads on the die and to the inner bonding pads on the interposer. The die is now electrically connected to the leadframe via the traces on the interposer.

Abstract: A dual footprint for servicing either of two types of microprocessor packaging systems. A first footprint capable of receiving and servicing a first type of microprocessor packaging system, for example, a tape carrier package microprocessor package, is formed within a second footprint capable of receiving and servicing a second type of microprocessor packaging system, for example, a pin grid array microprocessor package. In a preferred form, the two footprints are electrically interconnected and the first footprint is offset by a selected angle from the second footprint to allow increased connectivity between the two footprints.

Abstract: A process for producing a plurality of metallized vias in a polyimide dielectric is disclosed. The process includes depositing a polyimide precursor, then a silane and finally a metal, after patterning the polyimide and silane. The sandwich is heated to completely imidize the polyimide, crosslink the silane and anneal the metal simultaneously. The excess metal overlying the polyimide between the vias is removed by chemical mechanical polishing using the crosslinked silane as a polish stop.

Abstract: Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate molding material is added within the mold form, and the substrate molding material is then hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips. A thermal plug may be affixed to the backside of a chip before substrate molding material is added. A connector frame may be placed on the adhesive layer before substrate molding material is added. A dielectric layer may be placed over the backsides of the chips before the substrate molding material is added to enhance repairability.

Abstract: In fixing a sensor element for sensing stress on a substrate by using an adhesive for semiconductors, the present invention aims to solve both the problems of stress applied from the substrate side due to temperature change and defects in wire bonding in the wire bonding process. In a semiconductor device equipped with a sensor element for sensing stress fixed on a substrate, an adhesive for semiconductors is used which is prepared by compounding resin beads made of resin with a base adhesive made of flexible resin.

Abstract: A polyimide surface (18) of a semiconductor device (12) is pretreat the polyimide layer with a hydroxyl amine solution at an elevated temperature to form functional groups that react with an underfill encapsulant (16) to form covalent bonds during a cure cycle between the polyimide layer and the encapsulant material between the semiconductor device and a substrate (10). The hydroxyl amine solution include a reagent such as 2,(2-aminoethoxy) ethanol dissolved in a solvent like N-methyl pyrolidione at 65.degree. C. for sixty seconds. The hydroxyl amine solution may be sprayed onto the polyimide layer, or deposited by vapor deposition. The semiconductor die with the treated polyimide layer is attached to the substrate by DCA methods leaving a gap between the assemblies. The encapsulant is introduced between the semiconductor die and the substrate and cured to form a covalent bond with the polyimide layer and an environmental seal between the assemblies resulting in enhanced adhesion.

Abstract: Disclosed are an insulation film covered bonding wire comprising a conductive metal core wire the circumference of which is coated with an insulation film of an at least one type composed of polymer resin materials selected from a group of aromatic polyesters, polyimides, polyether-ether ketones, polyamides, polysulfones, and liquid crystal polymers, wherein no crack is developed to the insulation film when an impact force of 1 cm.g is applied to the coated wire by a drop weight, a method of manufacturing the bonding wire, and a semiconductor device using the same.

Abstract: In accordance with one aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material.

Abstract: A semiconductor device package comprises a substrate (10), a flip-chip (16), an underfill adhesive (25), and a thermally and electrically conductive plastic material (20). A leadless circuit carrying substrate has a metallization pattern (13) on a first side (15), one portion of the metallization pattern being a circuit ground (17). The second side has an array of surface mount solder pads (24) electrically connected to the metallization pattern by means of at least one conductive via (26) through the substrate. A semiconductor device (16) is flip-chip mounted to the metallization pattern by means of metal bumps (22). An underfill adhesive (25) fills the gap between the semiconductor device and the substrate. A thermally and electrically conductive plastic material (20) containing metal particles is transfer molded to encapsulate the semiconductor device, the underfill adhesive, and a portion of the first side of the leadless circuit carrying substrate, forming a cover.

Abstract: An improved solar cell characterized in that the grid electrode has a coating comprising an epoxy resin of 20 g/m.sup.2 .multidot.day.multidot.0.1 mm/40.degree. C..multidot.90%RH or less in moisture permeability which is disposed so as to cover the entire exposed exterior of said grid electrode. The solar cell module is free of short-circuits between the grid electrode and the lower electrode even upon repeated use under severe environmental conditions of high temperature and high humidity, and continuously exhibits a desirable photoelectric conversion efficiency over a long period of time.

Abstract: Positive working polyamic acid photoresist compositions are disclosed having improved high resolution upon image development and exhibiting stable photosensitivity and superior dielectric performance. The compositions comprise polyamic acid condensation products of an aromatic dianhydride and an aromatic di-primary amine wherein a percentage of the diamine comprises special dissolution inhibiting monomers. The compositions may be further improved by the presence of particular supplemental additives.

Abstract: A chip packaging configuration prevents differential electrical coupling within a plurality of associated bit lines (14 and 16) by associating, under lead frame (26), a first packaging material having a first dielectric constant and a second packaging material having a second dielectric constant and where the first packaging material and second packaging material are configured to expose the plurality of associated bit lines (14 and 16) to allow approximately equal coupling to lead frame (26) for each bit line (14 and 16) through the first and second dielectric constant to thereby prevent differential electrical coupling of the plurality of bit lines (14 and 16) with lead frame (26).

Abstract: A semiconductor package device is disclosed. In one embodiment, attached by its active face to a lead-on-chip leadframe having leadfingers is an integrated circuit. The integrated circuit has a polyimide coating on its backside. An encapsulating material surrounds the integrated circuit and the lead-on-chip leadframe so that the leadfingers are exposed. The polyimide coating on the backside of the integrated circuit helps to reduce package cracking arising from mounting the device to a printed circuit board by relflow solder.

Abstract: The present invention includes a semiconductor package (20) that has a leadframe (10). An insulator (13) is mounted on a surface of a flag (11) of the leadframe (10) to insulate a portion of the leadframe (10) from the external environment. A semiconductor die (16) is also mounted on the flag (11), spaced away from the insulator (13). A portion of the leadframe (10), the semiconductor die (16), and a portion of the insulator (13) are encapsulated by a body (21) of the package (20). The body (21) also has an alignment hole (23) that extends from a surface of the body to the insulator (13), and exposes a portion of a surface of the insulator (13). In addition, the body (21) overlaps the insulator (13) and forms a seal to the insulator (13) protecting the leadframe (10) from the external environment.

Abstract: A semiconductor device is provided with a polyimide film 21 between the encapsulating synthetic resin 16 and the passivating film 20. If a material having a high hardness (E-modulus.gtoreq.1.0.multidot.10.sup.10 Pa) is selected as the polyimide, the number of defects caused by variations in temperature is reduced.

Abstract: A semiconductor device assembly comprises a semiconductor device (10) attached to a substrate (20). The substrate has a metallization pattern (22) on the surface and a polymeric film (24) covering most of the surface and the metallization pattern. A window-frame shaped opening (26) is created in the film, exposing portions of the substrate surface. The semiconductor device is attached to the substrate in such a manner that it lies in the interior perimeter (28) of the window-frame shaped opening in the film. An adhesive material (18) is applied to fill the space between the semiconductor device and the substrate. The window frame opening in the polymeric film serves to confine the adhesive to the area in the opening and underneath the device and prevents unwanted spread of the underfill material by forming an ideal fillet geometry. In another embodiment of the invention, the semiconductor device is in a package and the package is attached directly to the substrate.

Abstract: The present invention introduces a method of reducing conductive and convective heat loss from the battery unit in battery-powered devices, such as RFID tag devices. Battery heat loss prevention is accomplished by suspending the battery in a vacuum or within a low thermally conductivity gas, such as air, nitrogen, helium or argon. Further improvement is accomplished by using a minimum number of suspension points made of solid material which possesses a low thermally conductivity. The battery can be suspended by various means, the first of which totally encapsulates the battery using the minimum number of solid material suspension points mentioned above, and the second of which only a portion of the battery (such as the lower portion) is suspended in a low thermally conductive material and the upper portion is encapsulated by the low thermally conductive material fabricated in an arching structure that does not contact the upper portion of the battery.