With Heterojunction Patents (Class 257/85)
  • Patent number: 12068581
    Abstract: A surface-emitting semiconductor laser includes a substrate, a first electrode in contact with the substrate, a first light reflection layer over the substrate, a second light reflection layer over the substrate, with the first light reflection layer between the second light reflection layer and the substrate, an active layer between the second light reflection layer and the first light reflection layer, a current confining layer between the active layer and the second light reflection layer and includes a current injection region, a second electrode over the substrate, with the second light reflection layer between the second electrode and the substrate, at least a portion of the second electrode is at a position overlapping the current injection region, and a contact layer between the second electrode and the second light reflection layer and includes a contact region in contact with the second electrode.
    Type: Grant
    Filed: March 29, 2023
    Date of Patent: August 20, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiaki Watanabe, Takayuki Kawasumi
  • Patent number: 12065601
    Abstract: The invention relates to a light-emitting component comprising a light-emitting section consisting of a Hex-Si1?xGex compound material, said Hex-Si1?xGex compound material having a direct band gap for emitting light. The invention also pertains to a light-absorbing component comprising a light-absorbing section consisting of a Hex-S1?xGex compound material, said Hex-Si1?xGex compound material having a direct band gap for absorbing light.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: August 20, 2024
    Assignee: TECHNISCHE UNIVERSITEIT EINDHOVEN
    Inventors: Silvana Botti, Friedhelm Bechstedt, Jozef Everardus Maria Haverkort, Erik Petrus Antonius Maria Bakkers, Elham Fadaly, Alain Dijkstra
  • Patent number: 12027818
    Abstract: A semiconductor laser includes a distributed feedback active region and two distribution Bragg reflecting mirror regions which are arranged to be continuous with the distributed feedback active region. The distributed feedback active region has an active layer which is composed of a compound semiconductor and a first diffraction grating. The first diffraction grating is composed of a recessed portion which is formed to extend through a diffraction grating layer formed on the active layer and a projection portion which is adjacent to the recessed portion.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: July 2, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Erina Kanno, Koji Takeda, Takaaki Kakitsuka, Shinji Matsuo
  • Patent number: 11980441
    Abstract: An image sensor assembly includes at least one upconverter configured to detect light in a NIR waveband that is received from an object to be imaged and generate, based on the detected light, upconverted light that is outside of the NIR waveband; and at least one image sensor configured to detect the upconverted light.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: May 14, 2024
    Assignee: Stryker Corporation
    Inventors: John Josef Paul Fengler, Robert Anthony Stead
  • Patent number: 11978382
    Abstract: An input sensing device includes sensor pixels initialized in response to a reset signal provided through a reset line, and output a sensing signal to a read-out line in response to a scan signal provided through a scan line. A controller generates at least one start signal and clock signals. A selector selectively provides the at least one start signal and the clock signals to first control lines or second control lines. A reset driver connected to the first control lines, and supplying reset signals to at least some of the reset lines based on the at least one start signal and the clock signals provided through the first control lines. A scan driver is connected to the second control lines, and supplies scan signals to at least some of the scan lines based on the at least one start signal and the clock signals.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: May 7, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Tea Park, Jong Hyun Lee, Kang Bin Jo, Go Eun Cha
  • Patent number: 11956994
    Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Chih Wu, Hoang Yan Lin, Guo-Dong Su, Zih-Rou Cyue, Li-Yu Yu, Wei-Kai Lee, Guan-Yu Chen, Chung-Chia Chen, Wan-Yu Lin, Gang Yu, Byung-Sung Kwak, Robert Jan Visser, Chi-Jui Chang
  • Patent number: 11909172
    Abstract: An object of the present invention is to provide a method for manufacturing an optical device having a laser diode, which method is suitable for mass production, and an optical device having a laser diode which allows accurate property evaluations thereof with small measurement errors. Specifically, the method includes: an etching process of etching a semiconductor lamination unit to form a mesa structure having a resonator end face, thereby forming a laser diode; and a reflecting layer forming process of forming a light reflecting layer such that the light reflecting layer covers entire side surfaces of the mesa structure, wherein the semiconductor lamination unit has a substate, a n-type clad layer including a nitride semiconductor layer having n-type conductivity, a light-emitting layer including at least one quantum well, and a p-type clad layer including a nitride semiconductor layer having p-type conductivity, laminated in this order.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: February 20, 2024
    Assignees: ASAHI KASEI KABUSHIKI KAISHA, National University Corporation Tokai National Higher Education and Research System
    Inventors: Ziyi Zhang, Maki Kushimoto, Hiroshi Amano
  • Patent number: 11836609
    Abstract: Utilizing the principles of wavelength-dependent evanescent wave coupling in closely-spaced optical waveguides, along with optical resonators, a method for creating a neural network out of entirely electro-optical components is discussed. Optical resonators, which can store energy as standing waves or whispering gallery modes, act as neurons. Waveguides integrated onto a chip act as dendrites or connectomes, with coupling between them simulating the analog exchange of signals in brains. Additional electro-optic controls can be utilized, such as conductive plates utilizing the electro-optic effect to change the refractive indices of the optics and coupling coefficients based on electrical signals from outside stimuli.
    Type: Grant
    Filed: December 5, 2020
    Date of Patent: December 5, 2023
    Inventor: Cody William Lamb
  • Patent number: 11804525
    Abstract: An epitaxial structure includes a semiconductor substrate, a dislocation blocking layer; and one or more active layers.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: October 31, 2023
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John Bowers, Justin Norman, Kunal Mukherjee, Jennifer Selvidge, Eamonn Hughes
  • Patent number: 11777056
    Abstract: Provided is a nanorod light-emitting device including a first semiconductor layer doped with a first conductive type impurity, an emission layer disposed above the first semiconductor layer, a second semiconductor layer disposed above the emission layer and doped with a second conductive type impurity that is electrically opposite to the first conductive type impurity, a conductive layer disposed between at least one of a center portion of a lower surface of the emission layer and the first semiconductor layer and a center portion of an upper surface of the emission layer and the second semiconductor layer, and a current blocking layer surrounding a sidewall of the conductive layer.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junhee Choi, Nakhyun Kim, Jinjoo Park, Joohun Han
  • Patent number: 11770636
    Abstract: An optical sensor including: a substrate; a circuit element layer disposed on the substrate and including a circuit element; and a photoelectric element layer including a photoelectric element, a self-assembled monolayer, and a bias electrode connected to the photoelectric element, wherein the photoelectric element is connected to the circuit element, and wherein the self-assembled monolayer is disposed on the photoelectric element.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: September 26, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jung Ha Son, Gee Bum Kim, Sang Woo Kim, Ki June Lee, Jae Ik Lim
  • Patent number: 11688825
    Abstract: A composite substrate including a substrate, a buffer layer, and a strain release layer. The buffer layer is disposed on the substrate is provided. The strain release layer is disposed on the buffer layer, wherein the buffer layer is between the substrate and the strain release layer. A material of the strain release layer includes Al1-xGaxN, where 0?x<0.15. The strain release layer is doped with silicon to release a compressive strain due to the buffer layer. A concentration of silicon doped in the strain release layer is greater than 1019 cm?3. A defect density of the strain release layer is less than or equal to 5×109/cm2. A light-emitting diode is also provided.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: June 27, 2023
    Assignees: Industrial Technology Research Institute, OPTO TECH CORP.
    Inventors: Chia-Yen Huang, Chang Da Tsai
  • Patent number: 11683946
    Abstract: A transparent display device includes a substrate in which a sub-pixel having an organic light emitting diode and an auxiliary sub-pixel adjacent to the sub-pixel and having an auxiliary organic light emitting diode are placed, wherein the organic light emitting diode includes a 1-1 electrode in which a transparent conductive layer and a reflective layer are laminated, and the auxiliary organic light emitting diode includes a 1-2 electrode in which the transparent conductive layer is extended and provided.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: June 20, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Seongku Lee
  • Patent number: 11594572
    Abstract: A light emitting diode (LED) array may include a first pixel and a second pixel on a substrate. The first pixel and the second pixel may include one or more tunnel junctions on one or more LEDs. The LED array may include a first trench between the first pixel and the second pixel. The trench may extend to the substrate.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: February 28, 2023
    Assignee: Lumileds LLC
    Inventors: Isaac Harshman Wildeson, Parijat Pramil Deb, Robert Armitage
  • Patent number: 11398614
    Abstract: An active matrix light emitting display comprising an anode layer comprising a plurality of individual selectively energizable anodes, a cathode layer comprising a plurality of individual selectively energizable cathodes, an emitter layer for emitting light when energized disposed between the anode layer and the cathode layer, and a photoluminescent layer comprising a plurality of various color photoluminescent pixels, wherein a selected anode and a selected cathode are energizable to photoexcite a selected color pixel. A light emitting device comprising, a light emitting photonic crystal having organic electroluminescent emitter material disposed within the photonic crystal, and a photoluminescent material disposed upon a surface of the light emitting photonic crystal, such that light emitted by the light emitting photonic crystal causes photoexcitation within the photoluminescent material.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: July 26, 2022
    Assignee: Red Bank Technologies LLC
    Inventors: Gene C. Koch, John N. Magno
  • Patent number: 11081622
    Abstract: A light emitting diode (LED) array may include a first pixel and a second pixel on a substrate. The first pixel and the second pixel may include one or more tunnel junctions on one or more LEDs. The LED array may include a first trench between the first pixel and the second pixel. The trench may extend to the substrate.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: August 3, 2021
    Assignee: Lumileds LLC
    Inventors: Isaac Harshman Wildeson, Parijat Pramil Deb, Robert Armitage
  • Patent number: 11069832
    Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: July 20, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana
  • Patent number: 11031399
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. In a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a date on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 8, 2021
    Assignee: SONY CORPORATION
    Inventor: Masahiro Mitsunaga
  • Patent number: 10985216
    Abstract: A display apparatus comprises a pixel including a plurality of sub pixels. Each of the sub pixels includes a current driven light emitting device, a transistor for supplying an electric current to the light emitting device and a capacitive element for maintaining a gate voltage of the transistor. The capacitive element of one sub pixel and the capacitive element of the other sub pixel at least partially overlap each other.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: April 20, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Takehiko Soda
  • Patent number: 10644116
    Abstract: A method includes forming a recess in a semiconductor substrate, the recess being adjacent to a gate stack, performing an epitaxial growth process within the recess to form a straining region, and forming a defect within the straining region in-situ with the epitaxial growth process.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: May 5, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiu-Ting Chen, Yi-Ming Huang, Shih-Chieh Chang, Hsing-Chi Chen, Pei-Ren Jeng
  • Patent number: 10636932
    Abstract: A sensing apparatus includes a sensing device having a hetero-junction structure, a light coupler connected to the sensing device and a readout device connected to the light coupler.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: April 28, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Mao Liu, Hung-Chi Wang, Zong-Xi Chen
  • Patent number: 10475271
    Abstract: An authentication device (20) comprises one or more flakes of a substantially two-dimensional material (14). The one or more flakes of the substantially two-dimensional material (14) have an operative area configured to emit, by non-resonant photoluminescence, electromagnetic radiation with a property that varies with position in the operative area.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: November 12, 2019
    Assignee: Quantum Base Limited
    Inventors: Vladimir Falko, Robert Young
  • Patent number: 10439099
    Abstract: A method of fabricating an ultraviolet (UV) light emitting device includes receiving a UV transmissive substrate, forming a first UV transmissive layer comprising aluminum nitride upon the UV transmissive substrate using a first deposition technique at a temperature less than about 800 degrees Celsius or greater than about 1200 degrees Celsius, forming a second UV transmissive layer comprising aluminum nitride upon the first UV transmissive layer comprising aluminum nitride using a second deposition technique that is different from the first deposition technique, at a temperature within a range of about 800 degrees Celsius to about 1200 degrees Celsius, forming an n-type layer comprising aluminum gallium nitride layer upon the second UV transmissive layer, forming one or more quantum well structures comprising aluminum gallium nitride upon the n-type layer, and forming a p-type nitride layer upon the one or more quantum well structures.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: October 8, 2019
    Assignee: Rayvio Corporation
    Inventors: Yitao Liao, Robert Walker, Doug Collins
  • Patent number: 10348059
    Abstract: A light emitting element array includes plural semiconductor stacking structures and a light screening portion. The plural semiconductor stacking structures each include a light emitting portion and a light receiving portion that receives light propagated in a lateral direction via a semiconductor layer from the light emitting portion. The light screening portion is provided between the plural semiconductor stacking structures to screen light directed from the light emitting portion of one of the semiconductor stacking structures to the light receiving portion of another semiconductor stacking structure.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: July 9, 2019
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Junichiro Hayakawa, Akemi Murakami, Takashi Kondo, Naoki Jogan, Jun Sakurai
  • Patent number: 10090363
    Abstract: To provide a novel light-emitting device, a light-emitting device that emits light of a plurality of colors includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first lower electrode, a first light-emitting layer over the first lower electrode, a second light-emitting layer over the first light-emitting layer, and an upper electrode over the second light-emitting layer. The second light-emitting element includes a second lower electrode, the first light-emitting layer over the second lower electrode, the second light-emitting layer over the first light-emitting layer, and the upper electrode over the second light-emitting layer. An emission spectrum of the first light-emitting layer peaks at a longer wavelength than an emission spectrum of the second light-emitting layer.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: October 2, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Toshiki Sasaki
  • Patent number: 9911896
    Abstract: In accordance with embodiments of the invention, at least partial strain relief in a light emitting layer of a III-nitride light emitting device is provided by configuring the surface on which at least one layer of the device grows such that the layer expands laterally and thus at least partially relaxes. This layer is referred to as the strain-relieved layer. In some embodiments, the light emitting layer itself is the strain-relieved layer, meaning that the light emitting layer is grown on a surface that allows the light emitting layer to expand laterally to relieve strain. In some embodiments, a layer grown before the light emitting layer is the strain-relieved layer. In a first group of embodiments, the strain-relieved layer is grown on a textured surface.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: March 6, 2018
    Assignees: Koninklijke Phillips N.V., Lumileds LLC
    Inventors: Sungsoo Yi, Nathan F. Gardner, Michael R. Krames, Linda T. Romano
  • Patent number: 9627564
    Abstract: An optoelectronic device comprising: a first conductive layer, a second conductive layer, an active layer between the first conductive layer and the second conductive layer, wherein the active layer comprises a submicrometer size structure of hexagonal type crystals of an element or alloy of elements selected from the carbon group.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: April 18, 2017
    Assignees: Electricite de France, Centre National de la Recherche Scientifique (CNRS), University of Houston
    Inventors: Jean-Francois Guillemoles, Par Olsson, Julien Vidal, Alexandre Freundlich
  • Patent number: 9570599
    Abstract: A portion of an AlN spacer layer of a high electron mobility transistor (GaN HEMI) having a nitride semiconductor used therein is removed only in a region directly below a gate electrode and in a vicinity of the region, and a length of a portion where the AlN spacer layer is not present is sufficiently smaller than a distance between a source electrode and a drain electrode.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: February 14, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yutaro Yamaguchi, Toshiyuki Oishi, Hiroshi Otsuka, Koji Yamanaka
  • Patent number: 9548355
    Abstract: A semiconductor device includes a wafer having a bulk layer and a III-V buffer layer on an upper surface of the bulk layer. The semiconductor device further includes at least one semiconductor fin on the III-V buffer layer. The semiconductor fin includes a III-V channel portion. Either the wafer or the semiconductor fin includes an oxidized III-V portion interposed between the III-V channel portion and the III-V buffer layer to prevent current leakage to the bulk layer.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 17, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Szu-Lin Cheng, Isaac Lauer, Kuen-Ting Shiu, Jeng-Bang Yau
  • Patent number: 9379280
    Abstract: A method for fabricating LED devices. The method includes providing a gallium and nitrogen containing substrate member (e.g., GaN) comprising a backside surface and a front side surface. The method includes subjecting the backside surface to a polishing process, causing a backside surface to be characterized by a surface roughness, subjecting the backside surface to an anisotropic etching process exposing various crystal planes to form a plurality of pyramid-like structures distributed spatially in a non-periodic manner on the backside surface, treating the backside surface comprising the plurality of pyramid-like structures, to a plasma species, and subjecting the backside surface to a surface treatment. The method further includes forming a contact material comprising an aluminum bearing species or a titanium bearing species overlying the surface-treated backside to form a plurality of LED devices with the contact material.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: June 28, 2016
    Assignee: SORAA, Inc.
    Inventors: Michael J. Cich, Kenneth John Thomson
  • Patent number: 9257605
    Abstract: A method of manufacturing a light emitting device having a plurality of nano-light emitting structures is provided. The method comprises depositing a first conductivity-type semiconductor material on a substrate to form a base layer. A mask having a plurality of openings is formed on the base layer. The first conductivity-type nitride semiconductor material is deposited in the openings of the mask to form a plurality of nanocores having a main portion bounded by the mask and an exposed tip portion. A current blocking layer is deposited on the tip portion of the nanocores. A portion of the mask is removed to expose the main portion of the nanocore. An active material layer is deposited on the plurality of nanocores. A second conductivity-type nitride semiconductor layer is deposited on the active material layer.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: February 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeon Woo Seo, Jung-Sub Kim, Young Jin Choi, Denis Sannikov, Han Kyu Seong, Dae Myung Chun, Jae Hyeok Heo
  • Patent number: 9252325
    Abstract: The present invention provides a method for producing a Group III nitride semiconductor light-emitting device wherein in the formation of a light-emitting layer by forming a well layer, a capping layer and a barrier layer, the well layer having superior flatness and crystallinity is formed while suppressing the occurrence of damage to the well layer. In formation of the light-emitting layer, pits are provided in the light-emitting layer so that a pit diameter D falls within a range of 120 nm to 250 nm. The light-emitting layer formation step comprises the steps of forming the barrier layer, forming the well layer, and forming the capping layer. The growth temperature of the barrier layer is higher by any temperature in a range of 65° C. to 135° C. than that of the well layer.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: February 2, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Misato Mukono, Ryo Nakamura
  • Patent number: 9207851
    Abstract: A matrix of light emitting diodes is positioned behind a liquid crystal layer of a display device. The light emitting diodes operate in both light emitting and light detecting modes. Consequently, the display device is able to sense objects or fingers approaching or in contact with a front display surface of the display device based on changes in incident light on the matrix that are observed by one or more of the light emitting diodes operating in the light detecting mode.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: December 8, 2015
    Assignee: PERCEPTIVE PIXEL, INC.
    Inventor: Jefferson Y. Han
  • Patent number: 9091812
    Abstract: An energy-efficient transparent solar film is presented. The solar film has a first film layer with metal nanostructures. The metal nanostructures have plasmon resonances in wavelength bands greater than, or both less than and greater than visible wavelengths, depending on size and shape. The metal nanostructures have no plasmon resonance at visible wavelengths. In another aspect, metal oxide nanocrystals are formed with the first film layer. The metal oxide nanocrystals have absorption in a band of wavelengths less than visible wavelengths, and absorption in a band of wavelengths greater than visible wavelengths. Also provided is a solar film window and fabricating method.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: July 28, 2015
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Akinori Hashimura, Douglas Tweet, Gary Hinch, Alexey Koposov
  • Patent number: 9076744
    Abstract: The invention relates to an organic-based electronic component, especially a component with reduced pixel crosstalk. According to the invention, the crosstalk is reduced by a grid electrode.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: July 7, 2015
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Jens Fürst, Debora Henseler, Hagen Klausmann
  • Patent number: 9018646
    Abstract: A photoconductor comprising a layer stack with a semiconductor layer photoconductive for a predetermined wavelength range between two semiconductor boundary layers with a larger band gap than the photoconductive semiconductor layer on a substrate, wherein the semiconductor boundary layers comprise deep impurities for trapping and recombining free charge carriers from the photoconductive semiconductor layer, and two electrodes connected to the photoconductive semiconductor layer, for lateral current flow between the electrodes through the photoconductive semiconductor layer.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: April 28, 2015
    Assignee: Fraunhofer-Gesellschaft zur Foederung der angewandten Forschung e.V.
    Inventors: Bernd Sartorius, Harald Kuenzel, Helmut Roehle, Klaus Biermann
  • Patent number: 9012886
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer; a second semiconductor layer; and a light emitting layer provided between the first and the second semiconductor layers. The first semiconductor layer includes a nitride semiconductor, and is of an n-type. The second semiconductor layer includes a nitride semiconductor, and is of a p-type. The light emitting layer includes: a first well layer; a second well layer provided between the first well layer and the second semiconductor layer; a first barrier layer provided between the first and the second well layers; and a first Al containing layer contacting the second well layer between the first barrier layer and the second well layer and containing layer containing Alx1Ga1-x1N (0.1?x1?0.35).
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Rei Hashimoto, Shinya Nunoue
  • Patent number: 9006709
    Abstract: According to one embodiment, a semiconductor light emitting element includes a first semiconductor layer of an n-type, a second semiconductor layer of a p-type, and a light emitting unit. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer includes a nitride semiconductor. The light emitting unit is provided between the first semiconductor layer and the second semiconductor layer. The light emitting unit includes a plurality of well layers stacked alternately with a plurality of barrier layers. The well layers include a first p-side well layer most proximal to the second semiconductor layer, and a second p-side well layer second most proximal to the second semiconductor layer. A localization energy of excitons of the first p-side well layer is smaller than a localization energy of excitons of the second p-side well layer.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Patent number: 8981339
    Abstract: A white-light emitting lighting device comprising one or more light emitting light sources (preferably solid state semiconductor light emitting diodes) that emit off-white light during operation, wherein the off-white light includes a spectral output including at least one spectral component in a first spectral region from about 360 nm to about 475 nm, at least one spectral component in a second spectral region from about 475 nm to about 575 nm, and at least one deficiency in at least one other spectral region, and an optical component comprising an optical material for converting at least a portion of the off-white light to one or more predetermined wavelengths, such that light emitted by the lighting device comprises white light, wherein the optical material comprises quantum confined semiconductor nanoparticles. Also disclosed is an optical component, lighting fixture, a cover plate for a lighting fixture, and methods.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 17, 2015
    Assignee: QD Vision, Inc.
    Inventors: John R. Linton, Emily M. Squires, Rohit Modi
  • Patent number: 8980657
    Abstract: The present invention is a method for producing a light-emitting device whose p contact layer has a p-type conduction and a reduced contact resistance with an electrode. On a p cladding layer, by MOCVD, a first p contact layer of GaN doped with Mg is formed. Subsequently, after lowering the temperature to a growth temperature of a second p contact layer being formed in the subsequent process, which is 700° C., the supply of ammonia is stopped and the carrier gas is switched from hydrogen to nitrogen. Thereby, Mg is activated in the first p contact layer, and the first p contact layer has a p-type conduction. Next, the second p contact layer of InGaN doped with Mg is formed on the first p contact layer by MOCVD using nitrogen as a carrier gas while maintaining the temperature at 700° C. which is the temperature of the previous process.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shinya Boyama, Yasuhisa Ushida
  • Patent number: 8963167
    Abstract: An improved diode energy converter for chemical kinetic electron energy transfer is formed using nanostructures and includes identifiable regions associated with chemical reactions isolated chemically from other regions in the converter, a region associated with an area that forms energy barriers of the desired height, a region associated with tailoring the boundary between semiconductor material and metal materials so that the junction does not tear apart, and a region associated with removing heat from the semiconductor.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: February 24, 2015
    Assignee: Neokismet, LLC
    Inventors: Jawahar M. Gidwani, Anthony C. Zuppero
  • Patent number: 8957402
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first nitride semiconductor layer, a nitride semiconductor light emitting layer, a second nitride semiconductor layer, a p-side electrode, and an n-side electrode. The nitride semiconductor light emitting layer is provided on the p-side region of the second face of the first nitride semiconductor layer. The second nitride semiconductor layer is provided on the nitride semiconductor light emitting layer. The p-side electrode is provided on the second nitride semiconductor layer. The n-side electrode is provided on the n-side region of the second face of the first nitride semiconductor layer. The nitride semiconductor light emitting layer has a first concave-convex face in a side of the first nitride semiconductor layer, and a second concave-convex face in a side of the second nitride semiconductor layer.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kojima, Hideto Furuyama, Miyoko Shimada, Yosuke Akimoto
  • Publication number: 20140374778
    Abstract: An optical assembly configured to emit electromagnetic radiation comprises first and second electroluminescent semiconductor components positioned adjacent to each other. The first electroluminescent semiconductor component is transparent to electromagnetic radiation generated by the second electroluminescent semiconductor component, and the second electroluminescent semiconductor component is transparent to electromagnetic radiation generated by the first electroluminescent semiconductor component. The first electroluminescent semiconductor component and the second electroluminescent semiconductor component are configured to actuate independently of each other.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 25, 2014
    Inventors: Richard Fix, Patrick Sonstroem
  • Patent number: 8916857
    Abstract: A light-emitting element disclosed in the present invention includes a light-emitting layer and a first layer between a first electrode and a second electrode, in which the first layer is provided between the light-emitting layer and the first electrode. The present invention is characterized by the device structure in which the first layer comprising a hole-transporting material is doped with a hole-blocking material or an organic compound having a large dipole moment. This structure allows the formation of a high performance light-emitting element with high luminous efficiency and long lifetime. The device structure of the present invention facilitates the control of the rate of the carrier transport, and thus, leads to the formation of a light-emitting element with a well-controlled carrier balance, which contributes to the excellent characteristics of the light-emitting element of the present invention.
    Type: Grant
    Filed: November 24, 2012
    Date of Patent: December 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoko Shitagaki, Satoshi Seo, Ryoji Nomura
  • Patent number: 8901612
    Abstract: Embodiments of a thin-film heterostructure thermoelectric material and methods of fabrication thereof are disclosed. In general, the thermoelectric material is formed in a Group IIa and IV-VI materials system. The thermoelectric material includes an epitaxial heterostructure and exhibits high heat pumping and figure-of-merit performance in terms of Seebeck coefficient, electrical conductivity, and thermal conductivity over broad temperature ranges through appropriate engineering and judicious optimization of the epitaxial heterostructure.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: December 2, 2014
    Assignees: Phononic Devices, Inc., The Board of Regents of the University of Oklahoma
    Inventors: Allen L. Gray, Robert Joseph Therrien, Patrick John McCann
  • Patent number: 8877652
    Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: November 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
  • Patent number: 8853713
    Abstract: Resistive memory having confined filament formation is described herein. One or more method embodiments include forming an opening in a stack having a silicon material and an oxide material on the silicon material, and forming an oxide material in the opening adjacent the silicon material, wherein the oxide material formed in the opening confines filament formation in the resistive memory cell to an area enclosed by the oxide material formed in the opening.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: October 7, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Eugene P. Marsh, Jun Liu
  • Patent number: 8853735
    Abstract: Provided is an epitaxial substrate for a semiconductor device, which has excellent schottky contact characteristics that are stable over time. The epitaxial substrate for a semiconductor device includes a base substrate, a channel layer formed of a first group III nitride containing at least Ga and having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1), and a barrier layer formed of a second group III nitride containing at least In and Al and having a composition of Inx2Aly2Gaz2N (x2+y2+z2=1), wherein the barrier layer has tensile strains in an in-plane direction, and pits are formed on a surface of the barrier layer at a surface density of 5×107/cm2 or more and 1×109/cm2 or less.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: October 7, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Mikiya Ichimura, Tomohiko Sugiyama, Mitsuhiro Tanaka
  • Patent number: 8847244
    Abstract: A photpcoupler includes: a light emitting element; a first photodiode array; a second photodiode array; a third photo diode array; an enhancement-mode MOSFET; a first depletion-mode MOSFET; and a second depletion mode MOSFET. The light emitting element converts the input electrical signal into the optical signal. A drain current of the enhancement-mode MOSFET is supplied to the external load when the optical signal is ON. A drain current of the first depletion-mode MOSFET is supplied to the external load when the optical signal is OFF and a voltage passing through the second depletion-mode MOSFET switched to the ON state is supplied to the gate of the first depletion-mode MOSFET. And the drain current of the first depletion-mode MOSFET is larger than a drain current of the first depletion-mode MOSFET when a gate voltage of the first depletion-mode MOSFET is zero.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: September 30, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoichiro Ito
  • Patent number: RE47188
    Abstract: The present invention provides a semiconductor device realizing reduced occurrence of a defect such as a crack at the time of adhering elements to each other. The semiconductor device includes a first element and a second element adhered to each other. At least one of the first and second elements has a pressure relaxation layer on the side facing the other of the first and second elements, and the pressure relaxation layer includes a semiconductor part having a projection/recess part including a projection projected toward the other element, and a resin part filled in a recess in the projection/recess part.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: January 1, 2019
    Assignee: Sony Corporation
    Inventors: Rintaro Koda, Takahiro Arakida, Yuji Masui, Tomoyuki Oki