With Heterojunction Patents (Class 257/85)
-
Patent number: 8748904Abstract: Low loss optical apertures are provided. A silicon intermediate layer sandwiched between a metal aperture layer and a dielectric layer has been found to offer a good combination of low optical loss combined with superior mechanical properties.Type: GrantFiled: February 4, 2013Date of Patent: June 10, 2014Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Sonny Vo, James S. Harris, Jr.
-
Patent number: 8723336Abstract: According to an embodiment, a semiconductor light emitting device includes a light emitting body including a semiconductor light emitting layer, a support substrate supporting the light emitting body, and a bonding layer provided between the light emitting body and the support substrate, the bonding layer bonding the light emitting body and the support substrate together. The device also includes a first barrier metal layer provided between the light emitting body and the bonding layer, and an electrode provided between the light emitting body and the first barrier metal layer. The first barrier layer includes a first layer made of nickel and a second layer made of a metal having a smaller linear expansion coefficient than nickel, and the first layer and the second layer are alternately disposed in a multiple-layer structure. The electrode is electrically connected to the light emitting body.Type: GrantFiled: May 15, 2012Date of Patent: May 13, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Yasuharu Sugawara
-
Patent number: 8698189Abstract: An OLED device includes a thin film transistor including an active layer, a gate bottom electrode, a gate top electrode, an insulating layer covering the gate electrode, and a source electrode and a drain electrode on the insulating layer contacting the active layer; an organic light-emitting device electrically connected to the thin film transistor and including a sequentially stacked pixel electrode, on the same layer as the gate bottom electrode, emissive layer, and, opposite electrode, a pad bottom electrode on the same layer as the gate bottom electrode and a pad top electrode pattern on the same layer as the gate top electrode, the pad top electrode pattern including openings exposing the pad bottom electrode, and an insulation pattern covering the upper surface of the pad top electrode pattern on the same layer as the insulating layer, on an upper surface of the pad bottom electrode.Type: GrantFiled: November 18, 2011Date of Patent: April 15, 2014Assignee: Samsung Display Co., Ltd.Inventors: Sun Park, Jong-Hyun Park, Yul-Kyu Lee, Kyung-Hoon Park, Sang-Ho Moon
-
Patent number: 8692276Abstract: A silicon-on-insulator wafer is provided. The silicon-on-insulator wafer includes a silicon substrate having optical vias formed therein. In addition, an optically transparent oxide layer is disposed on the silicon substrate and the optically transparent oxide layer is in contact with the optical vias. Then, a complementary metal-oxide-semiconductor layer is formed over the optically transparent oxide layer.Type: GrantFiled: July 22, 2013Date of Patent: April 8, 2014Assignee: International Business Machines CorporationInventors: Fuad E. Doany, Christopher V. Jahnes, Clint L. Schow, Mehmet Soyuer, Alexander V. Rylyakov
-
Patent number: 8686571Abstract: A structure comprises a first semiconductor substrate, a first bonding layer deposited on a bonding side the first semiconductor substrate, a second semiconductor substrate stacked on top of the first semiconductor substrate and a second bonding layer deposited on a bonding side of the second semiconductor substrate, wherein the first bonding layer is of a horizontal length greater than a horizontal length of the second semiconductor substrate, and wherein there is a gap between an edge of the second bonding layer and a corresponding edge of the second semiconductor substrate.Type: GrantFiled: August 9, 2012Date of Patent: April 1, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Yi-Chuan Teng, Chin-Yi Cho
-
Patent number: 8674381Abstract: A nitride semiconductor light emitting device is provided with a substrate, an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, an n-side pad electrode, a translucent electrode and a p-side pad electrode, wherein the translucent electrode is formed from an electrically conductive oxide, the n-side pad electrode adjoins the periphery of the translucent electrode and the p-side pad electrode is disposed so as to satisfy the following relationships: 0.3L?X?0.5L and 0.2L?Y?0.5L where X is the distance between ends of the p-side pad electrode and the n-side pad electrode, Y is the distance between the end of the p-side pad electrode and the periphery of the translucent electrode, L is the length of the translucent electrode on the line connecting the centroids of the p-side pad electrode and the n-side pad electrode minus the outer diameter d of the p-side pad electrode.Type: GrantFiled: January 3, 2011Date of Patent: March 18, 2014Assignee: Nichia CorporationInventors: Takahiko Sakamoto, Yasutaka Hamaguchi
-
Patent number: 8643059Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.Type: GrantFiled: January 3, 2011Date of Patent: February 4, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
-
Patent number: 8629468Abstract: A method for manufacturing a light emitting device, includes: preparing a first substrate by slicing a single crystal ingot pulled in a pulling direction tilted with respect to a first plane orientation, the slicing being in a direction substantially perpendicular to the pulling direction; preparing a second substrate including a major surface having a plane orientation substantially parallel to a plane orientation of a major surface of the first substrate; growing a stacked unit as a crystal on the major surface of the second substrate, the stacked unit including a light emitting layer; and removing the second substrate after bonding the stacked unit and the major surface of the first substrate by heating them in a joined state.Type: GrantFiled: January 20, 2010Date of Patent: January 14, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Isomoto, Chisato Furukawa
-
Patent number: 8629461Abstract: A light emitting device includes: a light emitting unit and a light receiving unit which are provided on a same substrate, wherein the light emitting unit includes an active layer sandwiched between a first clad layer and a second clad layer, a first electrode electrically connected to the first clad layer, and a second electrode electrically connected to the second clad layer.Type: GrantFiled: December 4, 2012Date of Patent: January 14, 2014Assignee: Seiko Epson CorporationInventor: Yasutaka Imai
-
Patent number: 8598547Abstract: Glitches during ion implantation of a workpiece, such as a solar cell, can be compensated for. In one instance, a workpiece is implanted during a first pass at a first speed. This first pass results in a region of uneven dose in the workpiece. The workpiece is then implanted during a second pass at a second speed. This second speed is different from the first speed. The second speed may correspond to the entire workpiece or just the region of uneven dose in the workpiece.Type: GrantFiled: June 28, 2011Date of Patent: December 3, 2013Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Russell J. Low, Atul Gupta, William T. Weaver
-
Patent number: 8581296Abstract: A compound semiconductor device having reduced contact resistance to an electrode is provided. The compound semiconductor device includes an n-substrate 3 comprising a hexagonal compound semiconductor GaN and having surfaces S1 and S2; an n-electrode 13 formed on the surface S1 of the n-substrate 3; a layered product having an n-cladding layer 5, an active layer 7, a p-cladding layer 9, and a contact layer 11 formed on the surface S2 of the n-substrate 3; and a p-electrode 15 formed on the p-cladding layer 9. The number of N atoms contained on the surface S1 of the n-substrate 3 is more than the number of Ga atoms contained on the surface S1. The electrode formed on the surface S1 is an n-electrode 13. The surface S1 has an oxygen concentration of not more than 5 atomic percent. The number of Ga atoms contained on the surface S3 of the contact layer 11 is more than the number of N atoms contained on the surface S3. The electrode formed on the surface S3 is a p-electrode 15.Type: GrantFiled: July 13, 2010Date of Patent: November 12, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masahiro Adachi, Shinji Tokuyama, Koji Katayama
-
Patent number: 8563991Abstract: An optical semiconductor device has a semiconductor substrate, an optical semiconductor region and a heater. The optical semiconductor region is provided on the semiconductor substrate and has a width smaller than that of the semiconductor substrate. The heater is provided on the optical semiconductor region. The optical semiconductor region has a cladding region, an optical waveguide layer and a low thermal conductivity layer. The optical waveguide layer is provided in the cladding region and has a refractive index higher than that of the cladding region. The low thermal conductivity layer is provided between the optical waveguide layer and the semiconductor substrate and has a thermal conductivity lower than that of the cladding region.Type: GrantFiled: December 28, 2011Date of Patent: October 22, 2013Assignee: Eudyna Devices Inc.Inventor: Tsutomu Ishikawa
-
Patent number: 8552447Abstract: A semiconductor light-emitting element includes a semiconductor laminated structure including a light-emitting layer sandwiched between first and second conductivity type layers for extracting an emitted light from the light-emitting layer on a side of the second conductivity type layer, a transparent electrode in ohmic contact with the second conductivity type layer, an insulation layer formed on the transparent electrode, an upper electrode for wire bonding formed on the insulation layer, a lower electrode that penetrates the insulation layer, is in ohmic contact with the transparent electrode and the electrode for wire bonding, and has an area smaller than that of the upper electrode in top view, and a reflective portion for reflecting at least a portion of light transmitted through a region of the transparent electrode not in contact with the lower electrode.Type: GrantFiled: February 16, 2011Date of Patent: October 8, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Kosuke Yahata, Takashi Mizobuchi, Takahiro Mori, Masashi Deguchi, Shingo Totani
-
Patent number: 8536610Abstract: A silicon-on-insulator wafer is provided. The silicon-on-insulator wafer includes a silicon substrate having optical vias formed therein. In addition, an optically transparent oxide layer is disposed on the silicon substrate and the optically transparent oxide layer is in contact with the optical vias. Then, a complementary metal-oxide-semiconductor layer is formed over the optically transparent oxide layer.Type: GrantFiled: February 1, 2013Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventors: Fuad E. Doany, Christopher V. Jahnes, Clint L. Schow, Mehmet Soyuer, Alexander V. Rylyakov
-
Patent number: 8530923Abstract: A light-emitting diode chip (1) with a semiconductor layer sequence (2) is described, which is contacted electrically by contacts (5) via a current spreading layer (3). The contacts (5) cover around 1%-8% of the surface of the semiconductor layer sequence (2). The contacts (5) consist for example of separate contact points (51), which are arranged at the nodes of a regular grid (52) with a grid constant of 12 ?m. The current spreading layer (3) contains for example indium-tin oxide, indium-zinc oxide or zinc oxide and has a thickness in the range from 15 nm to 60 nm.Type: GrantFiled: April 28, 2009Date of Patent: September 10, 2013Assignee: OSRAM Opto Semiconductor GmbHInventors: Matthias Sabathil, Lutz Hoeppel, Andreas Weimar, Karl Engl, Johannes Baur
-
Patent number: 8525191Abstract: An optoelectronic device assembly can include: a coated element and an optoelectronic device on the coated element. The coated element can include a thermoplastic substrate and a protective weathering layer. The thermoplastic substrate can include a bisphenol-A polycarbonate homopolymer and a polycarbonate copolymer, and wherein the polycarbonate copolymer is selected from a copolymer of tetrabromobisphenol A carbonate and BPA carbonate; a copolymer of 2-phenyl-3,3-bis(4-hydroxyphenyl)phthalimidine carbonate and BPA carbonate; a copolymer of 4,4?-(1-phenylethylidene) biphenol carbonate and BPA carbonate; a copolymer of 4,4?-(1-methylethylidene) bis[2,6-dimethyl-phenol]carbonate and BPA carbonate; and combinations comprising at least one of the foregoing. The protective weathering layer can include resorcinol polyarylate and polycarbonate.Type: GrantFiled: March 30, 2012Date of Patent: September 3, 2013Assignee: Sabic Innovative Plastics IP B.V.Inventors: Jian Zhou, James Edward Pickett, Shreyas Chakravarti
-
Patent number: 8524517Abstract: Implementations and techniques for semiconductor light-emitting devices including one or more copper blend I-VII compound semiconductor material barrier layers are generally disclosed.Type: GrantFiled: October 24, 2011Date of Patent: September 3, 2013Assignee: University of Seoul Industry Cooperation FoundationInventor: Doyeol Ahn
-
Patent number: 8513683Abstract: An optical integrated semiconductor light emitting device with improved light emitting efficiency is provided by preventing leak current from flowing through a high defect region of the substrate. The optical integrated semiconductor light emitting device includes: a substrate, in which in a low defect region made of crystal having a first average dislocation density, one or more high defect regions having a second average dislocation density higher than the first average dislocation density are included; and a Group III-V nitride semiconductor layer which is formed on the substrate, has a plurality of light emitting device structures, and has a groove in the region including the region corresponding to the high defect region (high defect region).Type: GrantFiled: January 31, 2006Date of Patent: August 20, 2013Assignee: Sony CorporationInventors: Osamu Maeda, Tsuyoshi Fujimoto, Motonobu Takeya, Toshihiro Hashidu, Masaki Shiozaki, Yoshio Oofuji
-
Patent number: 8476648Abstract: The present invention relates to a light emitting device and a method of manufacturing the light emitting device. According to the present invention, the light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane.Type: GrantFiled: June 22, 2006Date of Patent: July 2, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Jong Lam Lee, Jae Ho Lee, Yeo Jin Yoon, Eu Jin Hwang, Dae Won Kim
-
Patent number: 8461617Abstract: Provided is a semiconductor light emitting element wherein generation of an open failure of the light emitting device can be eliminated by ensuring a current pathway when disconnection is generated in a transparent electrode layer. A semiconductor light emitting element (10) is provided with: a first semiconductor layer (12) on a substrate (11); a light emitting layer (13) on the first semiconductor layer (12); a second semiconductor layer (14) on the light emitting layer (13); an insulator layer (15) provided with a hole portion (19) in a partial region on the second semiconductor layer (14); a transparent electrode layer (16) covering the upper surface of the insulator layer (15) and the second semiconductor layer (14) without covering the hole portion (19); and a second pad electrode (18) brought into contact with the second semiconductor layer (14) through the hole portion (19) and faces the insulator layer (15) with the transparent electrode layer (16) therebetween.Type: GrantFiled: August 28, 2009Date of Patent: June 11, 2013Assignee: Nichia CorporationInventors: Katsuyoshi Kadan, Yoshiki Inoue
-
Patent number: 8445341Abstract: A semiconductor device includes a substrate; a nitride based compound semiconductor layer placed on the substrate; an active area which is placed on the nitride based compound semiconductor layer, and is composed of an aluminum gallium nitride layer (AlxGa1-xN) (where 0.1<=x<=1); an isolation region which performs isolation of the active area mutually; a gate electrode, a source electrode, and a drain electrode which have been placed on the active area surrounded by the isolation region; and a trench region formed by etching for a part of the active area under the gate electrode. The semiconductor device is highly reliable, high performance and high power and a fabrication method for the same is also provided.Type: GrantFiled: January 23, 2012Date of Patent: May 21, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Keiichi Matsushita
-
Patent number: 8441019Abstract: Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a substrate; a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, which are formed on the substrate such that a part of the first conductive semiconductor layer is exposed upward; schottky contact regions on the second conductive semiconductor layer; a second electrode on the second conductive semiconductor layer; and a first electrode on the exposed first conductive semiconductor layer, wherein a distance between the schottky contact regions narrowed as the schottky contact regions are located closely to a mesa edge region.Type: GrantFiled: February 16, 2011Date of Patent: May 14, 2013Assignee: LG Innotek Co., Ltd.Inventor: Sung Min Hwang
-
Patent number: 8426893Abstract: An epitaxial substrate for electronic devices is provided, which can improve vertical breakdown voltage and provides a method of producing the same. The epitaxial substrate includes a conductive SiC single crystal substrate, a buffer as an insulating layer on the SiC single crystal substrate, and a main laminate formed by epitaxially growing a plurality of Group III nitride layers on the buffer. Further, the buffer includes at least an initial growth layer in contact with the SiC single crystal substrate and a superlattice laminate having a superlattice multi-layer structure on the initial growth layer. The initial growth layer is made of a Ba1Alb1Gac1Ind1N material. Furthermore, the superlattice laminate is configured by alternately stacking a first layer made of a Ba2Alb2Gac2Ind2N material and a second layer made of a Ba3Alb3Gac3Ind3N material having a different band gap from the first layer.Type: GrantFiled: May 10, 2010Date of Patent: April 23, 2013Assignee: Dowa Electronics Materials Co., Ltd.Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata, Ryo Sakamoto, Tsuneo Ito
-
Patent number: 8415680Abstract: A semiconductor composite apparatus, includes a first substrate, a semiconductor thin film layer, active devices, first driving circuits, and second driving circuits. The semiconductor thin film layer is formed on the first substrate and is formed of a first semiconductor material. The active devices are formed in the semiconductor thin film layer. The first driving circuits is formed of a second semiconductor material and performing a first function in which the active devices are driven. The second driving circuits are formed of a third semiconductor material and performing a second function in which the active devices are driven, the second function being different from the first function.Type: GrantFiled: March 22, 2006Date of Patent: April 9, 2013Assignee: Oki Data CorporationInventors: Mitsuhiko Ogihara, Hiroyuki Fujiwara, Masataka Muto, Takahito Suzuki, Tomoki Igari
-
Solid state light emitting apparatus with thermal management structures and methods of manufacturing
Patent number: 8410512Abstract: Provided are apparatus and methods corresponding to a solid state light emitting element. Such methods include mounting, to a thermally conductive component, a solid state light emitting element that includes first and second electrical connection points that are configured to be conductively engaged on a first side of a circuit structure. The solid state light emitting element is electrically insulated from the thermally conductive component to provide that electrical connections are arranged on the first side of the circuit structure and heat is conducted to a second side of the circuit structure that is opposite the first side of the circuit structure.Type: GrantFiled: November 25, 2009Date of Patent: April 2, 2013Assignee: Cree, Inc.Inventor: Peter S. Andrews -
Publication number: 20130050810Abstract: Wavelength converters for solid state lighting devices, and associated systems and methods. A system in accordance with a particular embodiment includes a solid state radiative semiconductor structure having a first region and a second region. The first region is positioned to receive radiation at a first wavelength and has a first composition and an associated first bandgap energy. The second region is positioned adjacent to the first region to receive energy from the first region and emit radiation at a second wavelength different than the first wavelength. The second region has a second composition different than the first composition, and an associated second bandgap energy that is less than the first bandgap energy.Type: ApplicationFiled: August 23, 2011Publication date: February 28, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Martin F. Schubert, Vladimir Odnoblyudov
-
Patent number: 8368087Abstract: A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of increasing light extraction efficiency, are disclosed. The method includes forming a light extraction layer on a substrate, forming a plurality of semiconductor layers on the light extraction layer, forming a first electrode on the semiconductor layers, forming a support layer on the first electrode, removing the substrate, and forming a second electrode on a surface from which the substrate is removed.Type: GrantFiled: March 16, 2010Date of Patent: February 5, 2013Assignees: LG Electronics Inc., LG Innotek Co., Ltd.Inventors: Jun Ho Jang, Yong Tae Moon
-
Patent number: 8350250Abstract: A nitride-based light emitting device capable of achieving an enhancement in light emission efficiency and an enhancement in reliability is disclosed. The nitride-based light emitting device includes a first-conductivity semiconductor layer, a second-conductivity semiconductor layer, an active layer arranged between the first-conductivity semiconductor layer and the second-conductivity semiconductor layer, the active layer including at least one pair of a quantum well layer and a quantum barrier layer, a plurality of first layers arranged on at least one of an interface between the first-conductivity semiconductor layer and the active layer and an interface between the second-conductivity semiconductor layer and the active layer, the first layers having different energy band gaps or different thicknesses, and second layers each interposed between adjacent ones of the first layers, the second layers exhibiting an energy band gap higher than the energy band gaps of the first layers.Type: GrantFiled: July 25, 2007Date of Patent: January 8, 2013Assignee: LG Electronics Inc.Inventors: Jong Wook Kim, Bong Koo Kim
-
Patent number: 8344393Abstract: A light receiving and emitting device includes: a light emitting unit and a light receiving unit which are provided on a same substrate, wherein the light emitting unit includes an active layer sandwiched between a first clad layer and a second clad layer, a first electrode electrically connected to the first clad layer, and a second electrode electrically connected to the second clad layer, the light receiving unit includes a light-absorbing layer, at least part of the active layer forms a gain region on a current path between the first electrode and the second electrode, the gain region is provided from a first side face of the active layer to a second side face parallel to the first side face so as to be inclined with respect to a perpendicular of the first side face as seen in a planar view, a light generated in the gain region is divided, at least one of an edge face on the first side face and an edge face on the second side face, the edge faces of the gain region, into a light emitted to an outside andType: GrantFiled: April 26, 2010Date of Patent: January 1, 2013Assignee: Seiko Epson CorporationInventor: Yasutaka Imai
-
Publication number: 20120327422Abstract: Provided is a semiconductor optical integrated device, formed by arranging a light emitting element and a light detecting element in a plane of the same substrate, each formed by laminating layers which at least include a first clad layer of a first conductive type, an active layer and a second clad layer of a second conductive type on a substrate, wherein the active layer has a structure where a second active area of a conductive type and an undoped first active area are laminated, and the second active area has the same conductive type as that of the first or second clad layer laminated in the closest position to the second active area. This device suppresses heat generation due to increased operating current and unnecessary light generation at an operation of the light emitting element, and enhancing light absorption efficiency at the an operation of the light emitting element.Type: ApplicationFiled: June 14, 2012Publication date: December 27, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Yasuhisa Inao, Mamoru Uchida, Takeshi Uchida
-
Patent number: 8314446Abstract: A sensor including an array of light sensitive pixels, each pixel including: at least one hetero-junction phototransistor having a floating base without contact, wherein each phototransistor is a mesa device having active layers exposed at side-walls of the mesa device; and at least one atomic layer deposited high-k dielectric material adjacent to and passivating at least the side-wall exposed active layers.Type: GrantFiled: October 3, 2008Date of Patent: November 20, 2012Assignee: Wavefront Holdings, LLCInventor: Jie Yao
-
Patent number: 8304790Abstract: A nitride semiconductor device has a nitride semiconductor layer structure. The structure includes an active layer of a quantum well structure containing an indium-containing nitride semiconductor. A first nitride semiconductor layer having a band gap energy larger than that of the active layer is provided in contact with the active layer. A second nitride semiconductor layer having a band gap energy smaller than that of the first layer is provided over the first layer. Further, a third nitride semiconductor layer having a band gap energy larger than that of the second layer is provided over the second layer.Type: GrantFiled: December 8, 2006Date of Patent: November 6, 2012Assignee: Nichia CorporationInventors: Shuji Nakamura, Shinichi Nagahama, Naruhito Iwasa
-
Patent number: 8278681Abstract: A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.Type: GrantFiled: May 20, 2009Date of Patent: October 2, 2012Assignee: Lextar Electronics Corp.Inventors: Chia-En Lee, Cheng-Ta Kuo, Der-Ling Hsia
-
Publication number: 20120235040Abstract: Provided is a photoconductive element which solves a problem inherent in an element for generating/detecting a terahertz wave by photoexcitation that terahertz wave generation efficiency is limited by distortions and defects of a low temperature grown semiconductor. The photoconductive element includes: a semiconductor substrate; a semiconductor low temperature growth layer; and a semiconductor layer, which is positioned between the semiconductor low temperature growth layer and the semiconductor substrate and is thinner than the semiconductor low temperature growth layer, in which the semiconductor low temperature growth layer includes a semiconductor which lattice-matches with the semiconductor layer and does not lattice-match with the semiconductor substrate.Type: ApplicationFiled: March 9, 2012Publication date: September 20, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Toshihiko Ouchi, Kousuke Kajiki
-
Patent number: 8243770Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.Type: GrantFiled: October 21, 2011Date of Patent: August 14, 2012Assignee: Ostendo Technologies, Inc.Inventors: Hussein S. El-Ghoroury, Robert G. W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
-
Patent number: 8227884Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.Type: GrantFiled: November 4, 2009Date of Patent: July 24, 2012Assignee: OmniVision Technologies, Inc.Inventor: Hidetoshi Nozaki
-
Patent number: 8188457Abstract: A light emitting device includes a substrate, a first cladding layer, an active layer, and a second cladding layer formed in that order, and a reflective part formed above the substrate and separated from the active layer. At least a portion of the active layer constitutes a plurality of gain regions, which forms at least one gain region pair, a first gain region of which is provided in one direction and a second gain region is provided in another direction different from the one direction. At least a portion of an end surface of the first gain region and the second gain region overlap with each other. Light emitted from the end surface of the first gain region is reflected by the reflective part, and propagates in the same direction or in the focusing direction with light emitted from the end surface of the second gain region.Type: GrantFiled: January 4, 2010Date of Patent: May 29, 2012Assignee: Seiko Epson CorporationInventor: Masamitsu Mochizuki
-
Patent number: 8174031Abstract: The light-emitting element chip includes: a substrate; a light-emitting portion including plural light-emitting elements each having a first semiconductor layer that has a first conductivity type and that is stacked on the substrate, a second semiconductor layer that has a second conductivity type and that is stacked on the first semiconductor layer, the second conductivity type being a conductivity type different from the first conductivity type, a third semiconductor layer that has the first conductivity type and that is stacked on the second semiconductor layer, and a fourth semiconductor layer that has the second conductivity type and that is stacked on the third semiconductor layer; and a controller including a logical operation element that performs logical operation for causing the plural light-emitting elements to perform a light-emitting operation, the logical operation element being formed by combining some sequential layers of the first, second, third and fourth semiconductor layers.Type: GrantFiled: February 3, 2009Date of Patent: May 8, 2012Assignee: Fuji Xerox Co., Ltd.Inventor: Yoshinao Kondoh
-
Publication number: 20120097984Abstract: An optical semiconductor device has a semiconductor substrate, an optical semiconductor region and a heater. The optical semiconductor region is provided on the semiconductor substrate and has a width smaller than that of the semiconductor substrate. The heater is provided on the optical semiconductor region. The optical semiconductor region has a cladding region, an optical waveguide layer and a low thermal conductivity layer. The optical waveguide layer is provided in the cladding region and has a refractive index higher than that of the cladding region. The low thermal conductivity layer is provided between the optical waveguide layer and the semiconductor substrate and has a thermal conductivity lower than that of the cladding region.Type: ApplicationFiled: December 28, 2011Publication date: April 26, 2012Applicant: EUDYNA DEVICES INC.Inventor: Tsutomu Ishikawa
-
Patent number: 8133776Abstract: A semiconductor device includes a substrate; a nitride based compound semiconductor layer placed on the substrate; an active area which is placed on the nitride based compound semiconductor layer, and is composed of an aluminum gallium nitride layer (AlxGa1-xN) (where 0.1<=x<=1); an isolation region which performs isolation of the active area mutually; a gate electrode, a source electrode, and a drain electrode which have been placed on the active area surrounded by the isolation region; and a trench region formed by etching for a part of the active area under the gate electrode. The semiconductor device is highly reliable, high performance and high power and a fabrication method for the same is also provided.Type: GrantFiled: April 2, 2009Date of Patent: March 13, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Keiichi Matsushita
-
Patent number: 8124985Abstract: There are provided a nitride semiconductor light emitting device having a structure enabling enhanced external quantum efficiency by effectively taking out light which is apt to repeat total reflection within a semiconductor lamination portion and a substrate and attenuate, and a method for manufacturing the same. A semiconductor lamination portion (6) including a first conductivity type layer and a second conductivity type layer, made of nitride semiconductor, is provided on a surface of the substrate (1) made of, for example, sapphire or the like. A first electrode (for example, p-side electrode (8)) is provided electrically connected to the first conductivity type layer (for example, p-type layer (5)) on a surface side of the semiconductor lamination portion (6), and a second electrode (for example, n-side electrode (9)) is provided electrically connected to the second conductivity type layer (for example, n-type layer (3)).Type: GrantFiled: February 7, 2006Date of Patent: February 28, 2012Assignee: Rohm Co., Ltd.Inventors: Mitsuhiko Sakai, Atsushi Yamaguchi, Ken Nakahara, Masayuki Sonobe, Tsuyoshi Tsutsui
-
Patent number: 8124987Abstract: The light-emitting element chip includes: a substrate; a light-emitting portion including plural light-emitting elements each having a first semiconductor layer that has a first conductivity type and that is stacked on the substrate, a second semiconductor layer that has a second conductivity type and that is stacked on the first semiconductor layer, the second conductivity type being a conductivity type different from the first conductivity type, a third semiconductor layer that has the first conductivity type and that is stacked on the second semiconductor layer, and a fourth semiconductor layer that has the second conductivity type and that is stacked on the third semiconductor layer; and a controller including a logical operation element that performs logical operation for causing the plural light-emitting elements to perform a light-emitting operation, the logical operation element being formed by combining some sequential layers of the first, second, third and fourth semiconductor layers.Type: GrantFiled: February 3, 2009Date of Patent: February 28, 2012Assignee: Fuji Xerox Co., Ltd.Inventor: Yoshinao Kondoh
-
Publication number: 20120025212Abstract: Photodiode devices with GeSn active layers can be integrated directly on p+ Si platforms under CMOS-compatible conditions. It has been found that even minor amounts of Sn incorporation (2%) dramatically expand the range of IR detection up to at least 1750 nm and substantially increases the absorption. The corresponding photoresponse can cover of all telecommunication bands using entirely group IV materials.Type: ApplicationFiled: September 16, 2009Publication date: February 2, 2012Applicant: Arizona Board of Regents, a body corporate acting for and on behalf of Arizona State UniversityInventors: John Kouvetakis, Jose Menendez, Radek Roucka, Jay Mathews
-
Patent number: 8101957Abstract: An optical semiconductor device has a semiconductor substrate, an optical semiconductor region and a heater. The optical semiconductor region is provided on the semiconductor substrate and has a width smaller than that of the semiconductor substrate. The heater is provided on the optical semiconductor region. The optical semiconductor region has a cladding region, an optical waveguide layer and a low thermal conductivity layer. The optical waveguide layer is provided in the cladding region and has a refractive index higher than that of the cladding region. The low thermal conductivity layer is provided between the optical waveguide layer and the semiconductor substrate and has a thermal conductivity lower than that of the cladding region.Type: GrantFiled: March 27, 2007Date of Patent: January 24, 2012Assignee: Eudyna Devices Inc.Inventor: Tsutomu Ishikawa
-
Patent number: 8058658Abstract: Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.Type: GrantFiled: April 9, 2009Date of Patent: November 15, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Sang-Heung Lee, Hae Cheon Kim, Dong Min Kang, Dong-Young Kim, Jae Kyoung Mun, Hokyun Ahn, Jong-Won Lim, Woo Jin Chang, Hong Gu Ji, Eun Soo Nam
-
Patent number: 8053790Abstract: The optical device includes a waveguide and a light sensor on a base. The light sensor includes a light-absorbing medium configured to receive a light signal from the waveguide. The light sensor also includes field sources for generating an electrical field in the light-absorbing medium. The field sources are configured so the electrical field is substantially parallel to the base.Type: GrantFiled: February 19, 2009Date of Patent: November 8, 2011Assignee: Kotusa, Inc.Inventors: Dazeng Feng, Po Dong, Mehdi Asghari, Ning-Ning Feng
-
Patent number: 8053794Abstract: A nitride semiconductor light-emitting device according to the present invention comprises a first nitride semiconductor layer; an active layer formed on the first nitride semiconductor layer; a second nitride semiconductor layer formed on the active layer; and a third nitride semiconductor layer having AlIn, which is formed on the second nitride semiconductor layer. And a nitride semiconductor light-emitting device comprises a first nitride semiconductor layer; an n-AlInN cladding layer formed on the first nitride semiconductor layer; an n-InGaN layer formed on the n-AlInN cladding layer; an active layer formed on the n-InGaN layer; a p-InGaN layer formed on the active layer; a p-AlInN cladding layer formed on the p-InGaN layer; and a second nitride semiconductor layer formed on the p-AlInN cladding layer.Type: GrantFiled: August 19, 2005Date of Patent: November 8, 2011Assignee: LG Innotek Co., LtdInventor: Suk Hun Lee
-
Patent number: 8049231Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.Type: GrantFiled: March 19, 2010Date of Patent: November 1, 2011Assignee: Ostendo Technologies, Inc.Inventors: Hussein S. El-Ghoroury, Robert G. W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
-
Patent number: 8021904Abstract: Contacting materials and methods for forming ohmic contact to the N-face polarity surfaces of Group-III nitride based semiconductor materials, and devices fabricated using the methods. One embodiment of a light emitting diode (LED) a Group-III nitride active epitaxial region between two Group-III nitride oppositely doped epitaxial layers. The oppositely doped layers have alternating face polarities from the Group III and nitrogen (N) materials, and at least one of the oppositely doped layers has an exposed surface with an N-face polarity. A first contact layer is included on and forms an ohmic contact with the exposed N-face polarity surface. In one embodiment, the first contact layer comprises indium nitride.Type: GrantFiled: January 31, 2008Date of Patent: September 20, 2011Assignee: Cree, Inc.Inventor: Ashay Chitnis
-
Patent number: 8008651Abstract: It is an object of the present invention to provide a light-emitting element having, between a pair of electrodes, a layer containing a light-emitting material and a transparent conductive film, wherein the electric erosion of the transparent conductive film and reflective metal can be prevented and to provide a light-emitting device using the light-emitting element. According to the present invention, a first layer 102 containing a light-emitting material, a second layer 103 containing an N-type semiconductor, a third layer 104 including a transparent conductive film, and a fourth layer 105 containing a hole-transporting medium are provided between an anode 101 and a cathode 106, wherein the first layer 102, the second layer 103, the third layer 104, the fourth layer 105, and the cathode 106 are provided in order, and wherein the cathode has a layer containing reflective metal.Type: GrantFiled: August 1, 2005Date of Patent: August 30, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Daisuke Kumaki, Satoshi Seo