With Heterojunction Patents (Class 257/85)
  • Publication number: 20110108858
    Abstract: Light emitting systems are disclosed. The light emitting system emits an output light that has a first color. The light emitting system includes a first electroluminescent device that emits light at a first wavelength in response to a first signal. The first wavelength is substantially independent of the first signal. The intensity of the emitted first wavelength light is substantially proportional to the first signal. The light emitting system further includes a first luminescent element that includes a second electroluminescent device and a first light converting layer. The second electroluminescent device emits light at a second wavelength in response to a second signal. The first light converting layer includes a semiconductor potential well and converts at least a portion of light at the second wavelength to light at a third wavelength that is longer than the second wavelength.
    Type: Application
    Filed: July 14, 2009
    Publication date: May 12, 2011
    Inventors: Michael A. Haase, James A. Thielen, Catherine A. Leatherdale, Billy L. Weaver, Terry L. Smith
  • Patent number: 7915606
    Abstract: A semiconductor light emitting device including a substrate including a plurality of discrete and separated protruding reflective patterns protruding from the substrate and including a valley; a first semiconductor layer on the substrate and covering the reflective patterns; a gap formed in the valley of a corresponding reflective pattern between the substrate and the first semiconductor layer; an active layer on the first semiconductor layer; and a second semiconductor layer on the active layer.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: March 29, 2011
    Assignee: LG Electronics Inc.
    Inventors: Bum Chul Cho, Seung Hyun Yang
  • Patent number: 7910935
    Abstract: Disclosed is a group-III nitride-based light emitting diode. The group-III nitride-based light emitting diode includes a substrate, an n-type nitride-based cladding layer formed on the substrate, a nitride-based active layer formed on the n-type nitride-based cladding layer, a p-type nitride-based cladding layer formed on the nitride-based active layer, and a p-type multi-layered ohmic contact layer formed on the p-type nitride-based cladding layer and including thermally decomposed nitride. The thermally decomposed nitride is obtained by combining nitrogen (N) with at least one metal component selected from the group consisting of nickel (Ni), copper (Cu), zinc (Zn), indium (In) and tin (Sn). An ohmic contact characteristic is enhanced at the interfacial surface of the p-type nitride-based cladding layer of the group-III nitride-based light emitting device, thereby improving the current-voltage characteristics.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae-Yeon Seong
  • Patent number: 7906787
    Abstract: The present invention relates to a nitride micro light emitting diode (LED) with high brightness and a method of manufacturing the same. The present invention provides a nitride micro LED with high brightness and a method of manufacturing the same, wherein a plurality of micro-sized luminous pillars 10 are formed in a substrates, a gap filling material such as SiO2, Si3N4, DBR(ZrO2/SiO2HfO2/SiO2), polyamide or the like is filled in gaps between the micro-sized luminous pillars, a top surface 11 of the luminous pillar array and the gap filling material is planarized through a CMP processing, and then a transparent electrode 6 having a large area is formed thereon, so that all the luminous pillars can be driven at the same time. In addition, the present invention provides a nitride micro LED with high brightness in which uniformity in formation of electrodes on the micro-sized luminous pillars array is enhanced by employing a flip-chip structure.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: March 15, 2011
    Inventor: Sang-Kyu Kang
  • Publication number: 20110057206
    Abstract: A photoconductor having a layer stack (72) with a semiconductor layer (64) photoconductive for a predetermined wavelength range between two semiconductor boundary layers (62) with a larger band gap than the photoconductive semiconductor layer (64) on a substrate (60), wherein the semiconductor boundary layers (62) have deep impurities for trapping and recombining free charge carriers from the photoconductive semiconductor layer (64), and two electrodes connected to the photoconductive semiconductor layer (64), for lateral current flow between the electrodes through the photoconductive semiconductor layer (64).
    Type: Application
    Filed: March 10, 2008
    Publication date: March 10, 2011
    Inventors: Bernd Sartorius, Harald Kuenzel, Helmut Roehle, Klaus Biermann
  • Patent number: 7884379
    Abstract: A nitride semiconductor light emitting device is provided with a substrate, an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, an n-side pad electrode, a translucent electrode and a p-side pad electrode, wherein the translucent electrode is formed from an electrically conductive oxide, the n-side pad electrode adjoins the periphery of the translucent electrode and the p-side pad electrode is disposed so as to satisfy the following relationships: 0.3L?X?0.5L and 0.2L?Y?0.5L where X is the distance between ends of the p-side pad electrode and the n-side pad electrode, Y is the distance between the end of the p-side pad electrode and the periphery of the translucent electrode, L is the length of the translucent electrode on the line connecting the centroids of the p-side pad electrode and the n-side pad electrode minus the outer diameter d of the p-side pad electrode.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: February 8, 2011
    Assignee: Nichia Corporation
    Inventors: Takahiko Sakamoto, Yasutaka Hamaguchi
  • Patent number: 7872269
    Abstract: Provided is a gallium nitride semiconductor light emitting element capable of stabilizing a drive voltage by reducing carrier depletion attributable to spontaneous polarization and piezo polarization generated at the interface between an AlGaN semiconductor layer and a GaN semiconductor layer. A gallium nitride semiconductor crystal 2 including a light emitting region is formed on the R plane of a sapphire substrate 1. In addition, in another constitution, a gallium nitride semiconductor crystal 2 is formed on the A plane of a GaN substrate 3 or on the M plane of a GaN substrate 4. The growth surface of these gallium nitride semiconductor crystals 2 are not an N (nitrogen) polar face or a Ga polar face but are non-polar faces. This can decrease the strength of an electric field caused by spontaneous polarization and piezo polarization generated at the interface of GaN/AlGaN at the p side. Thus, carrier depletion can be avoided.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: January 18, 2011
    Assignee: ROHM Co., Ltd.
    Inventor: Ken Nakahara
  • Patent number: 7846344
    Abstract: Light in the visible spectrum is modulated using an array of modulation elements, and control circuitry connected to the array for controlling each of the modulation elements independently, each of the modulation elements having a surface which is caused to exhibit a predetermined impedance characteristic to particular frequencies of light. The amplitude of light delivered by each of the modulation elements is controlled independently by pulse code modulation. Each modulation element has a deformable portion held under tensile stress, and the control circuitry controls the deformation of the deformable portion. Each deformable element has a deformation mechanism and an optical portion, the deformation mechanism and the optical portion independently imparting to the element respectively a controlled deformation characteristic and a controlled modulation characteristic. The deformable modulation element may be a non-metal.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: December 7, 2010
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Mark W. Miles
  • Patent number: 7838890
    Abstract: A method for manufacturing an optical device comprises steps of: (a) laminating a first, a second, a third, a fourth, a fifth, and a sixth semiconductor layers; (b) patterning at least the third, fourth, fifth and sixth semiconductor layers, thereby forming a light emitting device section and a rectification section; (c) forming first and second electrodes for driving the light emitting device section; and (d) connecting the fourth and sixth semiconductor sections between the first and second electrodes in parallel with the light emitting device section so as to have a rectification action in a reverse direction with respect to the light emitting device section, wherein the step (b) includes conducting etching until a portion of a top surface of the third semiconductor layer is exposed.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: November 23, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuo Nishida, Hijime Onishi
  • Patent number: 7825414
    Abstract: A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: November 2, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Shubneesh Batra, Pierre C. Fazan
  • Patent number: 7812354
    Abstract: A light emitting diode is disclosed that is formed in the Group III nitride material system. The diode includes respective n-type and p-type layers for current injection and light emission. At least one n-type Group III nitride layer in the diode has dopants selected from the group consisting of elements with a larger atomic radius than silicon and elements with a larger covalent radius than silicon, with germanium and tellurium being exemplary.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: October 12, 2010
    Assignee: Cree, Inc.
    Inventor: David T. Emerson
  • Patent number: 7800093
    Abstract: An integrated circuit including a memory cell includes a vertical bipolar select device including a base and an emitter. The memory cell includes a resistive memory element coupled to the emitter and a buried metallized word line contacting the base.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: September 21, 2010
    Assignee: Qimonda North America Corp.
    Inventors: Thomas Happ, Jan Boris Philipp
  • Patent number: 7791082
    Abstract: It is an object of the present invention to provide a technology of controlling a threshold voltage of a thin film transistor in which an amorphous oxide film is applied to a channel layer. There is provided a semiconductor apparatus including a plurality of kinds of transistors, each of the plurality of kinds of transistors including a channel layer made of an amorphous oxide containing a plurality of kinds of metal elements; and threshold voltages of the plurality of kinds of transistors are different from one another by changing an element ratio of the amorphous oxide.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: September 7, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tatsuya Iwasaki
  • Patent number: 7772599
    Abstract: A gallium-nitride-based semiconductor stacked structure includes a low-temperature-deposited buffer layer and an active layer. The low-temperature-deposited buffer layer is composed of a Group III nitride material that has been grown at low temperature and includes a single-crystal layer in an as-grown state, the single-crystal layer being present in the vicinity of a junction area that is in contact with a (0001) (c) plane of a sapphire substrate. The active layer is composed of a gallium-nitride (GaN)-based semiconductor layer that is provided on the low-temperature-deposited buffer layer. The single-crystal layer is composed of a hexagonal AlXGaYN (0.5<X?1, X+Y=1) crystal that contains aluminum in a predominant amount with respect to gallium such that a [2.?1.?1.0.] direction of the AlXGaYN crystal orients along with a [2.?1.?1.0.] direction of the (0001) bottom plane of the sapphire substrate.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: August 10, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20100176278
    Abstract: An input layer outputs light having a relatively narrow emission angle distribution to a middle layer as an output signal if the signal level of input signal is relatively high and outputs light having a relatively broad emission angle distribution to the middle layer as the output signal if the signal level of input signal is relatively low. The middle layer outputs light having a relatively narrow emission angle distribution as an output signal to an output layer if the signal level of the output signal from input layer is relatively high and outputs light having a relatively broad emission angle distribution to the output layer as an output signal if the signal level of the output signal from the input layer is relatively low.
    Type: Application
    Filed: May 2, 2008
    Publication date: July 15, 2010
    Inventor: Shin Yokoyama
  • Patent number: 7741157
    Abstract: A method of forming a MEMS (Micro-Electro-Mechanical System), includes forming an ambient port through a MEMS cap which defines a cavity containing a plurality of MEMS actuators therein; and bonding a lid arrangement to the MEMS cap to hermetically seal the ambient port.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: June 22, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Charles C Haluzak, Arthur Piehl, Chien-Hua Chen, Jennifer Shih
  • Patent number: 7732802
    Abstract: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device comprises a substrate comprising a reflective pattern with a valley, a first nitride semiconductor layer on the substrate, an air gap formed between the reflective pattern and the first nitride semiconductor layer, an active layer on the first nitride semiconductor layer, and a second nitride semiconductor layer on the active layer.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: June 8, 2010
    Assignee: LG Innotek Co., Ltd.
    Inventors: Bum Chul Cho, Seung Hyun Yang
  • Patent number: 7719020
    Abstract: An (Al, Ga, In)N and ZnO direct wafer bonded light emitting diode (LED), wherein light passes through electrically conductive ZnO. Flat and clean surfaces are prepared for both the (Al, Ga, In)N and ZnO wafers. A wafer bonding process is then performed between the (Al, Ga, In)N and ZnO wafers, wherein the (Al, Ga, In)N and ZnO wafers are joined together and then wafer bonded in a nitrogen ambient under uniaxial pressure at a set temperature for a set duration. After the wafer bonding process, ZnO is shaped for increasing light extraction from inside of LED.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: May 18, 2010
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: Akihiko Murai, Christina Ye Chen, Daniel B. Thompson, Lee S. McCarthy, Steven P. DenBaars, Shuji Nakamura, Umesh K. Mishra
  • Patent number: 7719013
    Abstract: A semiconductor light emitting device and a method of manufacturing the semiconductor light emitting device are provided. The semiconductor light emitting device includes a substrate, at least two light emitting cells located on the substrate and formed by stacking semiconductor material layers, a reflection layer and a transparent insulating layer sequentially stacked between the light emitting cells, and a transparent electrode covering the upper surface of the light emitting cells.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: May 18, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Jeong-wook Lee
  • Patent number: 7700941
    Abstract: A surface-emitting semiconductor laser includes an active zone, the active zone having a p-n-junction and surrounded by a first n-doped semiconductor layer and at least one p-doped semiconductor layer; a tunnel contact layer on the p-side of the active zone; an n-doped current-carrying layer that covers the tunnel contact layer, the n-doped current-carrying layer comprising a raised portion; and a structured layer having an optical thickness at least equal to the optical thickness of the current-carrying layer in the region of the raised portion, wherein the structured layer is disposed on the current-carrying layer within a maximum distance of 2 ?m from the raised portion.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: April 20, 2010
    Assignee: Vertilas GmbH
    Inventor: Markus Ortsiefer
  • Publication number: 20100072456
    Abstract: A read head for a scale reading apparatus, the head including a light source and an array of photodetector elements, wherein said light source and array of photodetector elements are fabricated in a lattice matched semiconductor compound.
    Type: Application
    Filed: October 29, 2007
    Publication date: March 25, 2010
    Applicant: RENISHAW PLC
    Inventors: Nicholas John Weston, Alexander David McKendrick, John Peter Carr, Marc Philippe Yves Desmulliez, Geoffrey McFarland
  • Patent number: 7683385
    Abstract: A facet extraction LED improved in light extraction efficiency and a manufacturing method thereof. A substrate is provided. A light emitting part includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer sequentially stacked on the substrate. A p-electrode and an n-electrode are connected to the p-type semiconductor layer and the n-type semiconductor layer, respectively. The p- and n-electrodes are formed on the same side of the LED. The light emitting part is structured as a ring.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: March 23, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Won Lee, Hee Seok Park, Masayoshi Koike
  • Patent number: 7683383
    Abstract: A light emitting device having a circuit protection unit is provided. The circuit protection unit has a low-resistance layer and a potential barrier layer, wherein a barrier potential exists at the interface between the low-resistance layer and the potential barrier layer. The circuit protection unit is electrically connected with the light emitting device. When an electrostatic discharge or excessive forward current is occurred in the light emitting device, the circuit protection unit provides a rectifying function for preventing damages caused by static electricity or excessive forward current to the light emitting device.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: March 23, 2010
    Assignee: Epistar Corporation
    Inventors: Steve Meng-Yuan Hong, Jen-Shui Wang, Tzu-Feng Tseng, Ching-San Tao, Wen-Huang Liu, Min-Hsun Hsieh
  • Patent number: 7675069
    Abstract: For the purpose of emitting light in an ultraviolet short-wavelength region having a wavelength of 360 nm or shorter, it is arranged in InAlGaN in such that a ratio of composition of In is 2% to 20%, a ratio of composition of Al is 10% to 90%, and a total of ratios of composition in In, Al, and Ga is 100%.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: March 9, 2010
    Assignee: Riken
    Inventors: Hideki Hirayama, Yoshinobu Aoyagi
  • Patent number: 7671448
    Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: March 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinobu Furukawa, Ryota Imahayashi
  • Patent number: 7659546
    Abstract: A light emitting device firstly includes a light emitting diode (LED) structure, having a top surface with a light emitting region. The device also has a heterojunction within the device structure, the heterojunction having a p-type and an n-type semiconductor layer, and a plurality of electrodes positioned on the top surface, each being electrically connected to one of the p-type and n-type semiconductor layers. At least a first and a second electrodes are connected to a same type semiconductor layer and are physically separated from each other. The device further includes a first and a second heterojunction regions within the heterojunction, each being respectively defined between one of the first and second electrodes and one of the other electrodes connected to the other type semiconductor layer. The first and second heterojunction regions are alternatively driven for emitting lights in the time domain.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: February 9, 2010
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Ming Lu, Geoffrey Wen Tai Shuy
  • Patent number: 7633093
    Abstract: An optical light engine is fabricated by providing a thermally conductive base having one or more mounting pedestals for elevating one or more LED die above the base's surface. The LED die are mounted on the pedestals, electrically connected, and a mold having a molding surface for molding a dome centered around the LED die is disposed on the base over the pedestal-mounted LED die. The encapsulating material is then injected through an input port disposed in the base to mold the dome around the LED die. The encapsulant material is cured and the mold is removed. In an advantageous embodiment, the light engine comprises a ceramic-coated metal base made by the low temperature co-fired ceramic-on-metal process (LTCC-M).
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: December 15, 2009
    Assignee: Lighting Science Group Corporation
    Inventors: Greg Blonder, Shane Harrah
  • Patent number: 7619240
    Abstract: This semiconductor photodetector consists of a diode with at least two heterojunctions comprising two external layers, a first layer with a given kind or type of doping and a second layer with a kind or type of doping opposite to that of the first layer, the bandgap width of these two layers being determined as a function of the energy and hence the wavelength or wavelength band that they are each intended to detect, these two layers being separated from each other by an intermediate layer having the same kind or type of doping as one of said first and second layers, said diode being subjected to a bias voltage of adjustable value between the two external layers. The bandgap width of the intermediate layer is greater than that of the layer that has the same type of doping as layer.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: November 17, 2009
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Johan Rothman
  • Patent number: 7598527
    Abstract: A laser and detector integrated on corresponding epitaxial layers of a single chip cooperate with on-chip and/or external optics to couple light of a first wavelength emitted by the laser to a single external device such as an optical fiber and to simultaneously couple light of a different wavelength received from the external device to the detector to provide bidirectional photonic operation. Multiple lasers and detectors may be integrated on the chip to provide multiple bidirectional channels. A monitoring photodetector is fabricated in the detector epitaxy adjacent one end of the laser.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: October 6, 2009
    Assignee: Binoptics Corporation
    Inventors: Alex A. Behfar, Cristian B. Stagarescu, Malcolm R. Green, Alfred T. Schremer, Jr.
  • Patent number: 7579630
    Abstract: A semiconductor optical device includes a GaAs substrate of a first conductivity type; a III-V compound semiconductor layer provided on the GaAs substrate; an active layer provided on the III-V compound semiconductor layer; and a cladding layer of a second conductivity type provided on the active layer, wherein the band gap energy of the III-V compound semiconductor layer is larger than the band gap energy of the GaAs substrate, wherein the band gap energy of the active layer is smaller than the band gap energy of the GaAs substrate, and wherein the thickness of the III-V compound semiconductor layer is not more than 0.2 ?m.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: August 25, 2009
    Assignee: Sumitomo Electric Industries Ltd.
    Inventor: Jun-ichi Hashimoto
  • Patent number: 7560739
    Abstract: A heteostructure having a first and a second layer, in micrometer or smaller (e.g. nanometer) scale, arranged in a configuration defining at least one undercut at one side of the second layer, underneath the first layer, is described herein. In various embodiments, the undercut is filled with passivation materials to protect the layers underneath the first layer. Further, in various embodiments, a large metal contact layer including coverage of the first layer sidewall may be employed to provide significant increase in contact area, and to reduce the device contact resist value.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: July 14, 2009
    Assignee: Intel Corporation
    Inventor: Jun-Fei Zheng
  • Patent number: 7554124
    Abstract: A nitride-based compound semiconductor light emitting device includes a first conductive substrate, a first ohmic electrode formed on the first conductive substrate, a bonding metal layer formed on the first ohmic electrode, a second ohmic electrode formed on the bonding metal layer, and a nitride-based compound semiconductor layer formed on the second ohmic electrode. The nitride-based compound semiconductor layer includes at least a P-type layer, a light emitting layer and an N-type layer, and has a concave groove portion or a concave-shaped portion.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: June 30, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshio Hata
  • Patent number: 7538364
    Abstract: On a substrate of a GaN FET, an undoped AlN layer, a GaN delta doped layer, an undoped GaN layer, and an undoped Al0.2Ga0.8N layer are formed in sequence. Arranged on the undoped Al0.2Ga0.8N layer are a Ti/Al/Pt/Au source ohmic electrode, a Pt/Au gate Schottky electrode, and a Ti/Al/Pt/Au drain ohmic electrode. Parallel conduction and gate leak are reduced or eliminated by the GaN delta doped layer.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: May 26, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: John Twynam
  • Patent number: 7538340
    Abstract: A light source having a die, a substrate, and a housing is disclosed. The die has a semiconducting light emitting device thereon, the die having a top surface and a bottom surface, light being emitted through the top surface. The die is characterized by a maximum dimension. The substrate has a top surface bonded to the bottom surface of the die. The substrate includes a plurality of electrical traces connected to the die that are used to power the light emitting device. The housing includes a reflector having a reflective inner wall facing the die and an aperture through which light reflected from the inner wall exits the housing. The aperture lies in a plane normal to the top surface of the die and has a height that is less than the maximum dimension of the die. The die is encapsulated in a transparent layer of material.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: May 26, 2009
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Siew It Pang, Tong Fatt Chew
  • Patent number: 7538355
    Abstract: The present invention aims to provide a display screen where pixels are addressed by a scanning LASER. The screen performs as a photo-amplifier circuit, producing light output at the region being illuminated by the LASER. This illumination produces electron-hole pairs forming two small currents, one of which subsequently results in a much larger electron or hole current from a specific region of the photo-amplifier. This larger current reaches an emitting region where recombination with other electrons or holes produces light. The duration of the light output is increased up to a frame period or more by increasing the duration of the larger current using various materials having properties that prolong recombination of electrons and holes in a specific device region. In another instance, a feedback effect is utilized by using the incident output light, which may be filtered, replacing the scanning LASER that has left the pixel.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: May 26, 2009
    Inventors: Raja Singh Tuli, Ricardo Izquierdo
  • Patent number: 7525131
    Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: April 28, 2009
    Assignees: National University Corporation Shizuoka University, Hamamatsu Photonics K.K.
    Inventors: Masatomo Sumiya, Shunro Fuke, Tokuaki Nihashi, Minoru Hagino
  • Publication number: 20090101919
    Abstract: A sensor including an array of light sensitive pixels, each pixel including: at least one hetero-junction phototransistor having a floating base without contact, wherein each phototransistor is a mesa device having active layers exposed at side-walls of the mesa device; and at least one atomic layer deposited high-k dielectric material adjacent to and passivating at least the side-wall exposed active layers.
    Type: Application
    Filed: October 3, 2008
    Publication date: April 23, 2009
    Inventor: Jie Yao
  • Patent number: 7504664
    Abstract: A semiconductor optical device includes an active layer, a current blocking layer on both sides of the active layer, and a cladding layer on both the active layer and the current blocking layer. The current blocking layer includes a buried layer, at least one intermediate layer of Al(Ga)InAs and a cover blocking layer. The cover blocking layer is located between the cladding layer and the Al(Ga)InAs layers and has a higher oxidation resistance than the Al(Ga)InAs layer. The current blocking layer is grown such that each Al(Ga)InAs layer is not exposed at the surface of the current blocking layer.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: March 17, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tohru Takiguchi
  • Patent number: 7482189
    Abstract: A light emitting diode (LED) and a method are provided for fabricating the a LED with an improved structure for better light emitting efficiency and better light output performance.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: January 27, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jeong-wook Lee, Vassili Leniachine, Mi-jeong Song, Suk-ho Yoon, Hyun-soo Kim
  • Patent number: 7470938
    Abstract: In a nitride semiconductor light emitting device having patterns formed on the upper and lower surfaces of a substrate from which light is emitted in a flip chip bonding structure, the patterns are capable of changing light inclination at the upper and lower surfaces of the substrate to decrease total reflection at the interfaces, thereby improving light emitting efficiency.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: December 30, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hoon Lee, Jeong Wook Lee, Hyun Kyung Kim, Yong Chun Kim
  • Patent number: 7470934
    Abstract: In a radiation-emitting optoelectronic semiconductor chip comprising an active layer (3) at least one p-doped layer (9) and a layer sequence (8) comprising a plurality of undoped layers (4, 5, 6, 7), which is arranged between the active layer (3) and the p-doped layer (9) and contains at least a first undoped layer (5) and a second undoped layer (6), the second undoped layer adjoining the first undoped layer (5) and succeeding the first undoped layer (5) as seen from the active layer (3), the first undoped layer (5) and the second undoped layer (6) in each case contain aluminum, the aluminum proportion being greater in the first undoped layer (5) than in the second undoped layer (6). The layer sequence (8) advantageously acts as a diffusion barrier for the dopant of the p-doped layer.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: December 30, 2008
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Norbert Linder
  • Patent number: 7459728
    Abstract: Disclosed are a semiconductor light emitting device capable of enhancing a light emergence efficiency at a lower light emergence plane of the device by forming an electrode on a halfway area of a tilt crystal plane and a fabrication method thereof. According to this light emitting device, since light emitted by a light emitting region can be efficiently, totally reflected and a current can be injected only in a good crystalline region for the reason that the halfway area, on which the electrode is formed, of the tilt crystal plane is better in crystallinity than other regions of the tilt crystal plane, it is possible to enhance both a light emergence efficiency and a luminous efficiency, and hence to enhance the light emergence efficiency by an input current.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: December 2, 2008
    Assignee: Sony Corporation
    Inventor: Toyoharu Oohata
  • Patent number: 7442569
    Abstract: Provided are a vertical GaN-based LED and a method of manufacturing the same. The vertical GaN-based LED includes an n-electrode. An AlGaN layer is formed under the n-electrode. An undoped GaN layer is formed under the AlGaN layer to provide a two-dimensional electron gas layer to a junction interface of the AlGaN layer. A GaN-based LED structure includes an n-type GaN layer, an active layer, and a p-type GaN layer that are sequentially formed under the undoped GaN layer. A p-electrode is formed under the GaN-based LED structure. A conductive substrate is formed under the p-electrode.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: October 28, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hoon Lee, Hee Seok Choi, Jeong Tak Oh, Su Yeol Lee
  • Patent number: 7432534
    Abstract: The present invention relates to a III-nitride semiconductor light emitting device comprising a plurality of III-nitride semiconductor layers including an active layer emitting light by recombination of electrons and holes, the plurality of III-nitride semiconductor layers having a p-type III-nitride semiconductor layer at the top thereof, a SiaCbNc (a?0,b>0,c?0) layer grown on the p-type III-nitride semiconductor layer, the SiaCbNc layer having an n-type conductivity and a thickness of 5 ? to 500 ? for the holes to be injected into the p-type III-nitride semiconductor layer by tunneling, and a p-side electrode formed on the SiaCbNc layer. According to the present invention, a SiaCbNc (a?0,b>0,c>0) layer which can be doped with a high concentration is intervened between a p-type nitride semiconductor layer and a p-side electrode. Therefore, the present invention can solve the conventional problem.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: October 7, 2008
    Assignee: Epivalley Co., Ltd.
    Inventors: Tae-Kyung Yoo, Chang Tae Kim, Eun Hyun Park, Soo Kun Jeon
  • Patent number: 7429756
    Abstract: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes: an n-type nitride semiconductor layer; an Incontaining super lattice structure layer formed above the n-type nitride semiconductor layer; a first electrode contact layer formed above the super lattice structure layer; a first cluster layer formed above the first electrode contact layer; a first In-containing nitride gallium layer formed above the first cluster layer; a second cluster layer formed above the first In-containing nitride gallium layer; an active layer formed above the second cluster layer, for emitting light; a p-type nitride semiconductor layer formed above the active layer; and a second electrode contact layer formed above the p-type nitride semiconductor layer.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: September 30, 2008
    Assignee: LG Innotek Co., Ltd.
    Inventor: Suk-Hun Lee
  • Patent number: 7429755
    Abstract: A high power LED comprises a substrate. An N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially deposited on the substrate. A semi-insulator layer or a non-N-type semiconductor layer can be interposed between the N-type semiconductor layer and substrate. At least one N-type electrode is connected to the N-type semiconductor layer and is exposed to an opening of the active layer and P-type semiconductor layer. The N-type electrode with a centralized pattern is formed on the middle of the LED. Furthermore, at least one P-type electrode is coupled to the P-type semiconductor layer. The P-type electrode is arranged like a closed ring or an open ring surrounding the N-type electrode. Therefore, the distribution of current paths is dispersed, and illumination areas are simultaneously uniform.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: September 30, 2008
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventor: Chih-Peng Hsu
  • Patent number: 7420998
    Abstract: A semiconductor laser device has a front surface electrode formed by Au plating, a rear surface electrode formed by Au plating, an anti-adhesive film only on the front surface electrode and made of a material that does not react with Au, and a coating film that covers an end face on a light emitting side and an end face opposite the light emitting side. The anti-adhesive films are located on the four corners of the front surface electrode.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: September 2, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Junichi Horie
  • Patent number: 7397066
    Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: July 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Steven D. Oliver
  • Patent number: 7385227
    Abstract: A light emitting device package and method for making the package utilizes a first leadframe having a first surface and a second leadframe having a second surface that are relatively positioned such that the second surface is at a higher level than the first surface. The light emitting device package includes a light source, e.g., a light emitting diode die, which is mounted on the first surface of the first leadframe and electrically connected to the second surface of the second leadframe.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: June 10, 2008
    Assignee: Avago Technologies ECBU IP Pte Ltd
    Inventors: Thye Linn Mok, Ju Chin Poh, Siew It Pang
  • Patent number: 7375380
    Abstract: A semiconductor light emitting device includes a semiconductor light emitting portion having a first contact layer of a first conductivity, a second contact layer of a second conductivity and an active layer sandwiched between the first and second contact layers. The device further includes a transparent electrode which substantially entirely covers a surface of the second contact layer in ohmic contact with the surface of the second contact layer and is transparent to a wavelength of light emitted from the semiconductor light emitting portion, and a metal reflection film which is opposed to substantially the entire surface of the transparent electrode and electrically connected to the transparent electrode, and reflects the light emitted from the semiconductor light emitting portion and passing through the transparent electrode toward the semiconductor light emitting portion.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: May 20, 2008
    Assignee: Rohm Co., Ltd.
    Inventors: Hirokazu Asahara, Mitsuhiko Sakai, Masayuki Sonobe, Toshio Nishida