With Heterojunction Patents (Class 257/85)
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Patent number: 6599133Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.Type: GrantFiled: May 18, 2001Date of Patent: July 29, 2003Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Publication number: 20030136969Abstract: In a process for producing a semiconductor light emitting device, first, a lamination including an active zone, cladding layers, and a current confinement layer is formed. Then, a near-edge portion of the lamination having a stripe width is removed so as to produce a first space, and a second near-edge portion located under the first space and a stripe portion of the lamination being located inside the first space and having the stripe width are concurrently removed so that a second space is produced, and cross sections of the active layer and the current confinement layer are exposed in the second space. Finally, the first and second spaces are filled with a regrowth layer so that a dopant to the regrowth layer is diffused into a near-edge region of the remaining portion of the active layer.Type: ApplicationFiled: January 14, 2003Publication date: July 24, 2003Applicant: FUJI PHOTO FILM CO., LTD.Inventor: Toshiaki Kuniyasu
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Publication number: 20030138976Abstract: A nitride compound semiconductor light-emitting device having a stack of layers including an active layer for a light emitting device and a method of manufacturing the device is disclosed. The method includes the steps of growing a first layer on a substrate at a first temperature to obtain an incomplete crystalline structure including both indium and aluminum and having the composition expressed as InXAlYGa1-X-YN(0≦X≦1, 0≦Y≦1). The method grows a cap layer on the first layer to cover the first layer, with growth of the cap layer proceeding at a second temperature substantially equal to or below the first temperature. The first layer is heat treated at a third temperature above the first temperature to cause the incomplete crystalline structure to crystallize and to create areas of differing compositions, thus changing the first layer to an active layer. The material of the cap layer is selected to be heat stable during the heat-treating step.Type: ApplicationFiled: January 30, 2003Publication date: July 24, 2003Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hideto Sugawara
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Patent number: 6597018Abstract: A flat panel display lighting system 20 includes: semiconductor light-emitting device 10; board 21; and light guide plate 22. The device 10 includes an inverted T-shaped substrate 1 having a base portion 1a, on which a pair of electrodes 2 and 3 are formed, and a mounting portion 1b, on which a light emitter 4 is mounted. The device 10 is mounted through the board 21 with the mounting portion 1b set through an opening 21a formed in the board 21. A light guide plate 22 is mounted on the board 21 so that a face of the plate 22 faces the light emitter 4. Each of the pair of electrodes 2 and 3 is formed on the substrate 1 of the device 10 so as to be electrically connected to the light emitter 4 and to a circuit pattern formed on the board 21.Type: GrantFiled: November 13, 2001Date of Patent: July 22, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Masami Nei
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Publication number: 20030102482Abstract: A nitride based heterojunction transistor includes a substrate and a first Group III nitride layer, such as an AlGaN based layer, on the substrate. The first Group III-nitride based layer has an associated first strain. A second Group III-nitride based layer, such as a GaN based layer, is on the first Group III-nitride based layer. The second Group III-nitride based layer has a bandgap that is less than a bandgap of the first Group III-nitride based layer and has an associated second strain. The second strain has a magnitude that is greater than a magnitude of the first strain. A third Group III-nitride based layer, such as an AlGaN or AlN layer, is on the GaN layer. The third Group III-nitride based layer has a bandgap that is greater than the bandgap of the second Group III-nitride based layer and has an associated third strain. The third strain is of opposite strain type to the second strain. A source contact, a drain contact and a gate contact may be provided on the third Group III-nitride based layer.Type: ApplicationFiled: July 19, 2002Publication date: June 5, 2003Inventor: Adam William Saxler
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Publication number: 20030094618Abstract: A method for manufacturing a GaN compound semiconductor which can improve light emitting efficiency even when dislocations are present. An n type AlGaN layer, a undoped AlGaN layer, and a p type AlGaN layer are laminated on a substrate to obtain a double hetero structure. When the undoped AlGaN layer is formed, droplets of Ga or Al are formed on the n type AlGaN layer. The compositional ratio of Ga and Al in the undoped AlGaN layer varies due to the presence of the droplets, creating a spatial fluctuation in the band gap. Because of the spatial fluctuation in the band gap, the percentage of luminous recombinations of electrons and holes is increased.Type: ApplicationFiled: March 6, 2002Publication date: May 22, 2003Inventor: Shiro Sakai
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Patent number: 6566688Abstract: A compound semiconductor device is provided that includes a substrate and an active region disposed above the substrate. The active region includes at least two different pseudomorphic layers, the first layer having the form InxGa1−xPyAszSb1−y−z, and the second layer having the form InqGa1−qPrAssSb1−r−s. The first layer includes at least In, Ga, and As, and the second layer includes at least Ga, As, and Sb. It is preferable for the substrate to be GaAs or AlpGa1−pAs (0<p<1), or to have a lattice constant close to or equal to that of GaA For the first layer, it is preferable if x is between 0.05 and 0.7, y is between 0 and 0,35, z is between 0.45 and 1, and 1−y−z is between 0 and 0.25. For the second layer, it is preferable if q is between 0 and 0.25 and 1−r−s is between 0.25 and 1.Type: GrantFiled: May 24, 2001Date of Patent: May 20, 2003Assignee: Arizona Board of RegentsInventors: Yong-Hang Zhang, Philip Dowd, Wolfgang Braun
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Patent number: 6563139Abstract: The present invention discloses a light source of full color LED (light emitted diode) by using die bond and packaging technology. A first mono-color LED chip with reflective metal on the bottom and transparent metal-oxide on the top of the chip is bonded on the PC board by thermal or ultrasonic die bond. A second mono-color LED chip with reflective metal on both sides is bonded in cascade on the first LED chip by thermal or ultrasonic die bond. The first LED chip emits light through the transparent metal-oxide to mix with the second LED light such that a different color light will obtain. The reflective metal reflects all the light to enforce the light intensity. In near field application, a red, a blue and a green LED are die bond in cascade to get a white light or full color light. In far field application, a yellow and a blue LED are die bond in cascade on the PC board, in its side is another cascaded die bond of a red and a green LED to get a white light or full color light.Type: GrantFiled: November 15, 2001Date of Patent: May 13, 2003Inventor: Chang Hsiu Hen
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Patent number: 6555403Abstract: There are provided a semiconductor laser, a semiconductor light emitting device, and methods of manufacturing the same wherein a threshold current density in a short wavelength semiconductor laser using a nitride compound semiconductor can be reduced. An active layer is composed of a single gain layer having a thickness of more than 3 nm, and optical guiding layers are provided between the active layer and cladding layers respectively.Type: GrantFiled: July 30, 1998Date of Patent: April 29, 2003Assignee: Fujitsu LimitedInventors: Kay Domen, Shinichi Kubota, Akito Kuramata, Reiko Soejima
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Patent number: 6552373Abstract: A hetero-junction FET has an intermediate layer including n-type-impurity doped layer between an electron supply layer and an n-type cap layer. The intermediate layer cancels the polarized negative charge generated between the electron supply layer and the n-type cap layer by ionized positive charge, thereby reducing the barrier against the electrons and source/drain resistance.Type: GrantFiled: March 28, 2001Date of Patent: April 22, 2003Assignee: NEC CorporationInventors: Yuji Ando, Hironobu Miyamoto, Naotaka Iwata, Koji Matsunaga, Masaaki Kuzuhara, Kensuke Kasahara, Kazuaki Kunihiro, Yuji Takahashi, Tatsuo Nakayama, Nobuyuki Hayama, Yasuo Ohno
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Publication number: 20030062517Abstract: The present invention relates to a semiconductor device (1) with one or more current confinement regions (20) and to a method of manufacturing such a device, particularly buried heterostructure light emitting devices such as semiconductor lasers and light emitting diodes. The device comprising a doped semiconductor substrate (2) of a first conduction type, a buried heterojunction active layer (10) above the substrate (2), a current conduction region (4) above the active layer (10), one or more current confinement regions (20) formed over the substrate (2) adjacent the active layer (10), the current conduction region (4) and current confinement region (20) being arranged in use to channel electric current to the active layer (10).Type: ApplicationFiled: September 18, 2002Publication date: April 3, 2003Applicant: Agilent Technologies, Inc.Inventors: Paul David Ryder, Graham Michael Berry, John Stephen Massa
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Patent number: 6528825Abstract: Disclosed is a semiconductor emission apparatus capable of emitting only a unimodal beam by a simple configuration without designing materials. The size of a light-leading window provided in a shielding cover is set so as to shield Cherenkov, light generated in a semiconductor laser using a GaN substrate and hold it inside the apparatus. The optical path of Cherenkov light is represented by the conical face with the apex angle having the emitting direction of the beam from the semiconductor laser as an axis. The apex angle at this time is about from 20° to 23°. The light-leading window is to have the cross sectional form in the shielding cover of a conical face with the apex angle defined in the same manner, and the apex angle is to be 20° or less. As a result, the beam pattern emitted from the light-leading window becomes unimodal.Type: GrantFiled: September 6, 2001Date of Patent: March 4, 2003Assignee: Sony CorporationInventor: Hiroshi Yoshida
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Patent number: 6525345Abstract: A semiconductor photonic device includes a Z-cut quartz substrate and a compound semiconductor layer presented by InxGayAlzN (where x+y+z=1, 0≦x ≦1, 0≦y≦1, and 0≦z≦1) formed on the Z-cut quartz substrate.Type: GrantFiled: August 5, 1999Date of Patent: February 25, 2003Assignee: Murata Manufacturing Co., Ltd.Inventor: Michio Kadota
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Publication number: 20030020079Abstract: A nitride-based semiconductor light-emitting device capable of stabilizing transverse light confinement is obtained. This nitride-based semiconductor light-emitting device comprises an emission layer, a cladding layer, formed on the emission layer, including a first nitride-based semiconductor layer and having a current path portion and a current blocking layer, formed to cover the side surfaces of the current path portion, including a second nitride-based semiconductor layer, while the current blocking layer is formed in the vicinity of the current path portion and a region having no current blocking layer is included in a region not in the vicinity of the current path portion. Thus, the width of the current blocking layer is reduced, whereby strain applied to the current blocking layer is relaxed. Consequently, the thickness of the current blocking layer can be increased, thereby stabilizing transverse light confinement.Type: ApplicationFiled: July 24, 2002Publication date: January 30, 2003Applicant: Sanyo Electric Co., Ltd.Inventors: Masayuki Hata, Yasuhiko Nomura, Daijiro Inoue
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Publication number: 20030020080Abstract: In a semiconductor light-emitting device, on an n-GaAs substrate are stacked an n-GaAs buffer layer, an n-cladding layer, an undoped active layer, a p-cladding layer, a p-intermediate band gap layer and a p-current diffusion layer. Further, a first electrode is formed under the n-GaAs substrate, and a second electrode is formed on the grown-layer side. In this process, a region of the p-intermediate band gap layer just under the second electrode is removed, the p-current diffusion layer is stacked in the removal region on the p-cladding layer, and a junction plane of the p-current diffusion layer and the p-cladding layer becomes high in resistance due to an energy band structure of type II. This semiconductor light-emitting device is capable of reducing ineffective currents with a simple construction and taking out light effectively to outside, thus enhancing the emission intensity.Type: ApplicationFiled: September 25, 2002Publication date: January 30, 2003Inventors: Kazuaki Sasaki, Junichi Nakamura, Shouichi Ohyama
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Patent number: 6507041Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.Type: GrantFiled: January 2, 2001Date of Patent: January 14, 2003Assignee: Nichia Chemical Industries, Ltd.Inventors: Shuji Nakamura, Takao Yamada, Masayuki Senoh, Motokazu Yamada, Kanji Bando
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Publication number: 20020175334Abstract: Composite integrated circuits and methods for processing RF input signals are provided. A Bragg cell structure having a waveguide sample and a piezoelectric that may be used for surface acoustic waves is shown. The Bragg cell structure may be combined with other circuitry that may be produced from a monocrystalline-based material or from a compound semiconductor material in a composite integrated circuit. Such other circuitry may include an amplifier, a photoemitter, a photodetector array, an analog to digital converter, and a digital signal processor.Type: ApplicationFiled: May 22, 2001Publication date: November 28, 2002Applicant: MOTOROLA, INC.Inventor: Barry Wayne Herold
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Patent number: 6445009Abstract: A device includes a silicon substrate provided with a coating including at least one stacking constituted by a plane of GaN or GaInN quantum dots emitting visible light at room temperature in a respective layer of AIN or GaN. The method of making the device is also disclosed. The device can be incorporated in electroluminescent devices and exchange devices, emitting white light in particular.Type: GrantFiled: August 8, 2000Date of Patent: September 3, 2002Assignee: Centre National de la Recherche ScientifiqueInventors: Nicolas Pierre Grandjean, Jean Massies, Benjamin Gérard Pierre Damilano, Fabrice Semond, Mathieu Leroux
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Patent number: 6420732Abstract: Structures for light emitting diodes are disclosed, which include improved current blocking and light extraction structures. The diodes typically include a substrate formed on a first electrode, a first confining layer of a first conductivity type formed on the substrate, an active region formed on the first confining layer, a second confining layer of a second conductivity type formed on the active region, and a window layer of the second conductivity type formed on the second confining layer. A contact layer of the second conductivity type is formed on the window layer for making ohmic contact, a conductive oxide layer is formed on the contact layer, and a second electrode is formed on the conductive oxide layer. The conductive oxide layer typically includes a central portion located below the second top electrode, which extends into the LED structure, typically beyond the contact layer and into the window layer, or even beyond the window layer, such as into the second confining layer.Type: GrantFiled: June 26, 2000Date of Patent: July 16, 2002Assignee: Luxnet COrporationInventors: Hsing Kung, Mark Devito, Chin-Wang Tu
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Patent number: 6407405Abstract: A method of growing p-type group II-VI compound semiconductor crystals, includes a step of forming ZnO layers and ZnTe layers alternately on a ZnO substrate, the ZnO layer being not doped with impurities and having a predetermined impurity concentration, and the ZnTe layer being doped with p-type impurities N to a predetermined impurity concentration or higher.Type: GrantFiled: May 18, 2000Date of Patent: June 18, 2002Assignees: Stanley Electric Co., Ltd.Inventors: Michihiro Sano, Takafumi Yao
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Patent number: 6388275Abstract: A compound semiconductor device based on gallium nitride which can have a thick gallium nitride semiconductor layer serving to prevent cracks or defects attributable to a strain caused by a difference in lattice constant or coefficient of thermal expansion. Between a contact layer 4 consisting of a film of n-type GaN and a clad layer 5 consisting of a film of a n-type AlyGa1−yN is interposed a crack-preventive buffer layer 5 having both of the compositions of the two films.Type: GrantFiled: May 2, 2000Date of Patent: May 14, 2002Assignee: Sanyo Electric Co., Ltd.Inventor: Takashi Kano
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Patent number: 6380111Abstract: A novel amorphous optical device contributes to economic construction of optical computers. Since economic parallel processing of signals such as image information is made possible, the novel amorphous optical device contributes also to development of optical computers capable of performing ultra-high speed and parallel processing, object recognizing apparatuses in which image optical signals are processed by using image optical signals, motion picture extracting apparatuses used for eyes of robots and object movement monitors and optical surge absorbers. An amorphous optical device which is doped with an element having a negative optical input-output characteristic to incident light, wherein the number of ions and/or atoms of the element is 1×1026 to 2.Type: GrantFiled: September 11, 2000Date of Patent: April 30, 2002Assignees: Nihon Yamamura Glass Co., Ltd.Inventors: Yoshinobu Maeda, Akio Konishi, Hidekazu Hashima, Hajimu Wakabayashi
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Publication number: 20020038870Abstract: A method of preparing a nitride semiconductor capable of forming a nitride-based semiconductor layer having a small number of dislocations as well as a small number of crystal defects resulting from desorption with excellent crystallinity on the upper surface of a substrate through a small number of growth steps is proposed. The method of preparing a nitride-based semiconductor comprises steps of forming a mask layer on the upper surface of a substrate to partially expose the upper surface of the substrate, forming a buffer layer on the exposed part of the upper surface of the substrate and the upper surface of the mask layer and thereafter growing a nitride-based semiconductor layer. Thus, the outermost growth surface of the nitride-based semiconductor layer laterally grown on the mask layer does not come into contact with the mask layer.Type: ApplicationFiled: October 3, 2001Publication date: April 4, 2002Applicant: SANYO ELECTRIC CO., LTD.Inventors: Tatsuya Kunisato, Hiroki Ohbo, Nobuhiko Hayashi, Takashi Kano
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Patent number: 6365427Abstract: The present invention relates to a semiconductor laser device and a method for fabrication thereof, wherein the semiconductor laser device exhibits an improved mode selectivity.Type: GrantFiled: February 9, 2000Date of Patent: April 2, 2002Assignee: Avalon Photonics Ltd.Inventors: Hans Peter Gauggel, Karl Heinz Gulden
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Patent number: 6348698Abstract: A light emitting device is provided, which comprises a III-V semiconductor alloy layered structure as an active layer thereof, including N and at least one other group-V element, and at least one group-III element. The light emitting device is in use for red wavelength laser diodes having excellent temperature characteristics, visible wavelength laser diodes which may achieve emissions shorter wavelengths than 600 nm, visible region light emitting diodes having a high intensity, laser diodes for optical communication having excellent temperature characteristics, and similar light emitting devices. The III-V semiconductor alloy layered structure is provided to be used as an active layer for forming the light emitting device, which comprises first and second monatomic layers.Type: GrantFiled: May 21, 1999Date of Patent: February 19, 2002Assignee: Ricoh Company, Ltd.Inventor: Shunichi Sato
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Publication number: 20010054716Abstract: An opto-electronic device has a diffusion area of one conductive type formed in a semiconductor substrate of another conductive type, an ohmic contact layer making contact with the diffusion area, and an electrode making contact with the ohmic contact layer. The diffusion area is formed by solid-phase diffusion. The same mask is used to define the patterns of both the diffusion source layer and the ohmic contact layer, so that the ohmic contact layer is self-aligned with the diffusion area.Type: ApplicationFiled: August 20, 2001Publication date: December 27, 2001Applicant: Oki Data CorporationInventors: Masaharu Nobori, Hiroyuki Fujiwara, Masumi Koizumi
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Patent number: 6281518Abstract: A layered structure of a III-V semiconductor alloy is disclosed, including N and at least one of the other group-V elements and a plurality of the group-III elements, capable of having an improved crystallinity, and of being grown with an arbitrary elemental composition together with a higher N content. The III-V semiconductor alloy is composed of GaxIn1−xNyAs1−y (0<x<1 and 0<y<1) and the layered structure includes at least two kinds of monoatomic layers. The monoatomic layers each have a composition of Gax1In1−x1Ny1As1−y1, (0<x1≦1 and 0<y1<1) with either none or a first minimal In content, and of Gax2In1−x2Ny2As1−y2 (0≦x2<x1≦1 and 0<y2<1) with either a second In content larger than the first In content, or none of Al or Ga content, respectively, and are deposited in a predetermined order, to thereby result in a superlattice structure which is considered to be a a semiconductor alloy layer having a deduced average composition.Type: GrantFiled: December 3, 1998Date of Patent: August 28, 2001Assignee: Ricoh Company, Ltd.Inventor: Shunichi Sato
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Patent number: 6236671Abstract: A light emitting device and heterojunction phototransistor combination having a structure where a p-type material terminal of a laser is common with an emitter of a PNP heterojunction phototransistor. This configuration results in a light emitting device and heterojunction phototransistor structure that has a drastically reduced bias voltage requirement and that allows independent biasing of the laser and the heterojunction phototransistor.Type: GrantFiled: October 29, 1998Date of Patent: May 22, 2001Assignee: Agilent Technologies, Inc.Inventor: Dubravko I. Babic
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Patent number: 6229159Abstract: An optical integrated oxide device uses a silicon-based functional matrix substrate on which both an oxide device and a semiconductor light emitting device can be commonly integrated with an optimum structure and a high density. A single-crystal Si substrate has formed on its surface a first region where a cleaned surface of the single-crystal Si substrate itself appears, and a second region in which a CeO2 thin film is preferentially (100)-oriented or epitaxially grown on the single-crystal Si substrate. A semiconductor laser is integrated in the first region by epitaxial growth or atomic layer bonding, and an optical modulation device or optical detection device made of oxides are formed in the second region, to make up an optical integrated oxide device. A MgAl2O4 thin film may be used instead of CeO2 thin film.Type: GrantFiled: August 31, 1999Date of Patent: May 8, 2001Assignee: Sony CorporationInventor: Masayuki Suzuki
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Patent number: 6222202Abstract: A light emitting device and photodetector combination having a structure where the layer of the photodetector that contacts the light emitting device has a semiconductor conductivity type polarity opposite that of the light emitting device. This configuration results in a light emitting device and photodetector structure that has a very low bias voltage requirement. Additionally, by shunting any current flowing through the junction formed where the light emitting device meets the photodetector, the bias voltage requirement is further reduced.Type: GrantFiled: October 6, 1998Date of Patent: April 24, 2001Assignee: Agilent Technologies, Inc.Inventors: Dubravko I. Babic, Scott W. Corzine
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Patent number: 6215131Abstract: A light-emitting device using a vacuum doughnut to serve as a current blocking layer is disclosed. The light-emitting device comprises: a substrate of a first conductivity type; a buffer layer formed on the substrate; a double heterostructure layer comprising a first cladding layer, an active layer and a second cladding layer, formed on the buffer layer; and a cap layer of a second conductivity type formed on the double heterostructure layer. A vacuum doughnut is formed between the active layer and an electrode formed on the cap layer to block a current flowing from the electrode formed on the cap layer so that the current flows through a region of the double heterostructure layer that is uncovered by the electrode. Furthermore, the vacuum doughnut can also be formed in the second cladding layer instead of forming in the cap layer.Type: GrantFiled: August 11, 1999Date of Patent: April 10, 2001Assignee: Advanced Epitaxy Technology Inc.Inventors: Jian-Tin Chen, Wei-Chih Lai, Tsong-Yu Chen
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Patent number: 6204512Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.Type: GrantFiled: November 24, 1999Date of Patent: March 20, 2001Assignee: Nichia Chemical Industries, Ltd.Inventors: Shuji Nakamura, Takao Yamada, Masayuki Senoh, Motokazu Yamada, Kanji Bando
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Patent number: 6169295Abstract: An IR transceiver module includes a lead frame, a sensor, an emitter, and a body encapsulating the sensor and emitter, where the body has an integrally formed lens aligned with both the sensor and with the emitter. The sensor is supported proximate to a support surface of the lead frame and has a sensing area which is generally parallel to the support surface. The emitter is supported proximate to the sensor and within a vertical projection of the sensing area, i.e. it is vertically aligned with the sensor. In embodiments of the invention, a recess is formed into the sensing surface of the sensor that is provided with a reflective material to form a reflective cup for the emitter. In other embodiments, a transceiver is also supported proximate to the lead frame and is electrically coupled to both the sensor and the emitter. By providing a module having both the emitter and sensor aligned with a single lens, a very small form factor can be achieved.Type: GrantFiled: May 29, 1998Date of Patent: January 2, 2001Assignee: Maxim Integrated Products, Inc.Inventor: Ronald B. Koo
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Patent number: 6147359Type: GrantFiled: October 14, 1992Date of Patent: November 14, 2000Assignee: The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Northern IrelandInventors: Leigh-Trevor Canham, John Michael Keen, Weng Yee Leong
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Patent number: 6121656Abstract: A semiconductor memory device in which a stored information can be simply erased only by an electric signal so as to be rewritten is provided. The semiconductor memory device includes (a) a semiconductor chip having an array of memory cells, stored information in the memory cells being erasable by light irradiation; (b) a light emitting element irradiating a light into the memory cells portion of the semiconductor chip; and (c) a package in which the semiconductor chip and the light emitting element are encapsulated with a resin in one body.Type: GrantFiled: November 5, 1997Date of Patent: September 19, 2000Assignee: Rohm Co. Ltd.Inventors: Haruo Tanaka, Yukio Shakuda
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Patent number: 6107645Abstract: A cold end and a hot end are demarcated in a first thermoelectric semiconductor member. A first member made from metal or a semiconductor is connected to the cold end of the first thermoelectric semiconductor member. The first member is made from a material wherein, heat absorption occurs when first carriers comprising either electrons or holes are injected from the first member into the first thermoelectric semiconductor member. The first carriers transported to the hot end of the first thermoelectric semiconductor member are gathered into a light-emitting region. The light-emitting region is made from a semiconductor material. In this light-emitting region, light emission due to recombination between electrons and holes occurs.Type: GrantFiled: October 29, 1998Date of Patent: August 22, 2000Assignee: Fujitsu LimitedInventor: Norio Hidaka
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Patent number: 6066859Abstract: An opto-electronic component with two MQW structures having different functions, wherein the layer sequences that form these MQW structures are grown in a single epitaxy process of uniform layers in every layer plane. In an embodiment, a laser diode-modulator combination is provided wherein the MQW layer sequence of the laser is preferably arranged within the MQW layer sequence of the modulator.Type: GrantFiled: December 15, 1997Date of Patent: May 23, 2000Assignee: Siemens AktiengesellschaftInventor: Bernhard Stegmueller
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Patent number: 6031251Abstract: A linear optocoupler (71) having a light emitting diode (28) and a detector diode (29) formed on a common semiconductor substrate (33). Light emitted by the light emitting diode (28) is transmissive to semiconductor substrate (33). A layer of light reflective material (34) is formed on a side opposite from which the light emitting diode (28) and the detector diode (29) on the semiconductor substrate (33). A portion of light emitted by the light emitting diode (28) transmits through the semiconductor substrate (33) to be reflected by the layer of light reflective material (34). The reflected light transmits through the semiconductor substrate (33) to be received by the detector diode (29). A photo detector diode (61) and the semiconductor substrate (33) including the light emitting diode (28) and the detector diode (29) are mounted on a lead frame (51) co-planar to one another. A light flux coupling media (76) couples light from the light emitting diode (28) to the photo detector diode (29).Type: GrantFiled: November 28, 1994Date of Patent: February 29, 2000Assignee: Motorola, Inc.Inventors: Horst A. Gempe, Gary W. Hoshizaki
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Patent number: 6028323Abstract: A method for infrared (IR) imaging using a panel made of integrated GaAs quantum well infrared photodetector (QWIP) and near-infrared (NIR) or visible light emitting diode (LED). The panel is a large area diode with an optical window for top illumination or without the window for backside illumination. The integrated device acts as a photon energy up-converter which converts infrared light of wavelength longer than about 1.1 .mu.m to near infrared or visible light which falls into the silicon detector spectral range. Using this device, an IR image is up-converted and the resulting NIR or visible image is then detected by an off-the-shelf silicon charge-coupled-device (CCD) camera The image detected on the CCD camera represents the original infrared image. A specific device embodiment for converting 9 .mu.m IR to 870 nm NIR is given.Type: GrantFiled: July 17, 1997Date of Patent: February 22, 2000Assignee: National Research Council of CanadaInventor: Hui-Chun Liu
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Patent number: 6015719Abstract: Methods for the fabrication of TS LED chips with improved light extraction and optics, particularly increased top surface emission, and the TS LEDs so fabricated are described. Non-absorbing DBRs within the chip permit the fabrication of the LEDs. The transparent DBRs redirect light away from absorbing regions such as contacts within the chip, increasing the light extraction efficiency of the LED. The non-absorbing DBRs can also redirect light toward the top surface of the chip, improving the amount of top surface emission and the on-axis intensity of the packaged LED. These benefits are accomplished with optically non-absorbing layers, maintaining the advantages of a TS LED, which advantages include .about.6 light escape cones, and improved multiple pass light extraction.Type: GrantFiled: April 24, 1998Date of Patent: January 18, 2000Assignee: Hewlett-Packard CompanyInventors: Fred A. Kish, Jr., Stephen A. Stockman
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Patent number: 6008506Abstract: There is provided an optical semiconductor device, including a first semiconductor layer, a first insulating layer formed on the first semiconductor layer, the first insulating layer having a different index of refraction from that of the first semiconductor layer, a highly doped, second semiconductor layer formed on the first insulating layer, a third semiconductor layer formed on the second semiconductor layer, a device isolation region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the first insulating layer, the device isolation region defining a device formation region therein, the device formation region being formed with a recess starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the second semiconductor layer, a second insulating layer covering an inner sidewall of the recess therewith, a multi-layered structure formed within the recess, the multi-layered structure having at least a qType: GrantFiled: April 28, 1998Date of Patent: December 28, 1999Assignee: NEC CorporationInventor: Takenori Morikawa
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Patent number: 5994154Abstract: There is provided an optical semiconductor device, including a first semiconductor layer, a first insulating layer formed on the first semiconductor layer, the first insulating layer having a different index of refraction from that of the first semiconductor layer, a highly doped, second semiconductor layer formed on the first insulating layer, a third semiconductor layer formed on the second semiconductor layer, a device isolation region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the first insulating layer, the device isolation region defining a device formation region therein, the device formation region being formed with a recess starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the second semiconductor layer, a second insulating layer covering an inner sidewall of the recess therewith, a multi-layered structure formed within the recess, the multi-layered structure having at least a qType: GrantFiled: April 28, 1998Date of Patent: November 30, 1999Assignee: NEC CorporationInventor: Takenori Morikawa
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Patent number: 5952683Abstract: A functional semiconductor element, which is designed to perform an ultrafast amplifying, bistable, similar functional operation by initiating and stopping an avalanche multiplication in one of i-type layers of what is called a triangular barrier diode (TBD) structure having an n-i-p-i-n, p-i-n-i-p, n-i-p-i-p, n-i-n-i-p, n-i-n-i-n, p-i-n-i-n, p-i-p-i-p, or p-i-p-i-n configuration. By forming a light absorbing layer and a light emitting layer or light modulating layer in this structure, it is possible to function the element as an optical functional element. Furthermore, the addition of a resonant tunneling diode implements a novel function.Type: GrantFiled: July 15, 1997Date of Patent: September 14, 1999Assignee: Kokusai Denshin Denwa Kabushiki KaishaInventors: Haruhisa Sakata, Katsuyuki Utaka, Yuichi Matsushima
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Patent number: 5920587Abstract: A semiconductor laser device having light output monitoring light-receiving portion can be fabricated monolithically. A semiconductor laser element (LD) composed of a first cladding layer (22), an active layer (23) and a second cladding layer (24) is formed on a semiconductor substrate (21). A light-receiving portion (PD.sub.1) of a pn junction is formed on the semiconductor substrate (21) disposed behind the semiconductor laser element (LD) by diffusion or selective growth.Type: GrantFiled: February 18, 1997Date of Patent: July 6, 1999Assignee: Sony CorporationInventors: Hironobu Narui, Masato Doi, Kenji Sahara, Yoshinobu Higuchi
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Patent number: 5895938Abstract: Disclosed is a semiconductor device comprising a semiconductor BCN compound layer and a metallic BCN compound layer and/or an insulating BCN compound layer, wherein the semiconductor BCN compound layer and the metallic BCN compound layer and/or insulating BCN compound layer are stacked one upon the other.Type: GrantFiled: February 12, 1997Date of Patent: April 20, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Miyoko Watanabe, Koichi Mizushima, Satoshi Itoh, Masao Mashita
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Patent number: 5889294Abstract: An edge emitting LED comprises a semiconductor substrate having a main surface, an active layer formed over the main surface, and the active layer having a light emitting region, an optical absorption region having a bandgap energy smaller than that of the light emitting region, and a composition change region formed between the light emitting region and the optical absorption region, the composition change region having the bandgap energy continuously changes. Accordingly, an edge emitting LED is able to produce a stable, spontaneous emission of a light under a wide range of operating conditions.Type: GrantFiled: February 25, 1997Date of Patent: March 30, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 5838174Abstract: To prevent leakage of light from a waveguide path to an isolation film in a photocoupler, isolation films are formed so that end portions thereof face a substrate, and a photodiode and phototransistor are formed on islands surrounded by these isolation films. Accordingly, a waveguide path optically coupling the photodiode and photocoupler is formed on a silicon oxide film and on the end portions of the isolation films. The isolation films are formed by alternatingly laminating silicon oxide films having a refractive index smaller than the waveguide path and silicon nitride films having a refractive index equal to or greater than the waveguide path. Accordingly, the several film thicknesses of the silicon nitride films are established to be smaller than the wavelength of light within the silicon nitride films. Because of this, leakage of light from the waveguide path to the silicon nitride films of the isolation films can be prevented.Type: GrantFiled: November 25, 1996Date of Patent: November 17, 1998Assignee: Denso CorporationInventors: Tsuyoshi Nakagawa, Yoshiaki Nakatsugawa, Hajime Inuzuka
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Patent number: 5828085Abstract: An active layer of a light-emitting diode is surrounded jointly by a pair of clad layers and a pair of block layers. The active layer includes a light-emitting portion and a light-absorbing portion which are continuously formed in one body. The light-emitting portion emits light when carriers are injected thereinto between the pair of clad layers, and the light-absorbing portion absorbs light coming from the light-emitting portion. A bandgap of the light-absorbing portion may be smaller than that of the light-emitting portion.Type: GrantFiled: August 6, 1997Date of Patent: October 27, 1998Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 5818073Abstract: A semiconductor device includes a III-V compound semiconductor layer including two or more Group III elements and containing dopant impurities, including a spontaneous superlattice, and having a stripe shape with two ends, and electrodes disposed on the ends of the stripe shaped semiconductor layer to form a resistor element. Because of the spontaneous superlattice, electrons are one-dimensionally confined within the III-V compound semiconductor layer, i.e., the electrons flow easier in the direction perpendicular to the periodic direction of the spontaneous superlattice than in the direction parallel to it, resulting in anisotropic of electrical resistivity. Therefore, the orientation of the resistor element with respect to the periodic direction of the spontaneous superlattice becomes another factor in determining the resistance of the resistor element.Type: GrantFiled: September 29, 1995Date of Patent: October 6, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Seiji Ochi, Tatuya Kimura
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Patent number: 5808314Abstract: The present invention relates to a semiconductor emission device with fast wavelength modulation and constituted by three sections, namely two lateral sections, each having an active layer and a DFB network and which produce an optical gain, connected across a central electroabsorbant section, to which is applied a reverse voltage making it possible to quasi-instantaneously modify the absorption rate in said section.Type: GrantFiled: August 30, 1996Date of Patent: September 15, 1998Assignee: France TelecomInventors: Hisao Nakajima, Josette Charil, Serge Slempkes