Abstract: A patterning apparatus includes a laser generator, at least one lens, a detector, and a controller. The laser generator generates a first laser beam and a second laser beam having different intensities. The at least one lens irradiates the first laser beam to form a pattern in a substrate, irradiates a second laser beam to determine a defect of the pattern, and condenses reflected beams generated as the second laser beam is reflected from the substrate. The detector converts the reflected beams to electrical signals. The controller determines a defect of the pattern based on the electrical signals.

Abstract: Method for producing a directed monolayer or multilayer assembly of colloidal nanoparticles attached to an electret substrate, including imparting a surface electric potential to an electret substrate according to a pattern of positive and/or negative electric charges, and contacting an electret substrate with a colloidal dispersion. The colloidal dispersion has electrically neutral or near neutral and electrically polarizable colloidal nanoparticles, and a nonpolarizing or weakly polarizing dispersion medium. The absolute value of the surface electric potential and the concentration of polarizable nanoparticles are no lower than a first surface electric potential threshold and no lower than a second concentration threshold, respectively, such as to obtain an assembly having a desired geometric shape, at least the first layer of which is compact in terms of the absence of undesired gaps having sizes greater than the size of two adjacent nanoparticles, preferably not greater than the size of one nanoparticle.

Abstract: A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

Abstract: A nanoimprint lithography method, including: pressing a mold in a photosensitive resin to form at least one imprint pattern defined by a stamped area and an adjacent area, the adjacent area being less stamped or not stamped at all, and being thicker than the stamped area; and exposure to a certain amount of sunlight. Respective thicknesses of the two areas are defined such that the two areas absorb a different amount of the sunlight and the amount of sunlight provided by the exposure is predetermined so as to be great enough to activate the resin in whichever of the two areas has the greater absorption, and so as not to be great enough to activate the other of the two areas.

Abstract: A method for printing a desired periodic pattern includes providing a mask bearing a pattern of features having a period, providing a substrate bearing a photosensitive layer, arranging the substrate with a separation from the mask, generating collimated light with a wavelength and an intensity, at least the former of which may be temporally varied to deliver a spectral distribution of energy density, illuminating the mask pattern with the light while varying at least its wavelength so as to deliver a spectral distribution of energy density, such that the light-field transmitted by the mask is instantaneously composed of a range of transversal intensity distributions between Talbot planes. The layer is exposed to a time-integrated intensity distribution that prints the desired pattern. The separation, spectral distribution and period are arranged so that the time-integrated intensity distribution corresponds to an average of the range of transversal intensity distributions.

Abstract: The present invention provides a laser processing method comprising the steps of attaching a protective tape 25 to a front face 3 of a wafer 1a, irradiating a substrate 15 with laser light L while employing a rear face of the wafer 1a as a laser light entrance surface and locating a light-converging point P within the substrate 15 so as to form a molten processed region 13 due to multiphoton absorption, causing the molten processed region 13 to form a cutting start region 8 inside by a predetermined distance from the laser light entrance surface along a line 5 along which the object is intended to be cut in the wafer 1a, attaching an expandable tape 23 to the rear face 21 of the wafer 1a, and expanding the expandable tape 23 so as to separate a plurality of chip parts 24 produced upon cutting the wafer 1a from the cutting start region 8 acting as a start point from each other.

Abstract: Examples of methods and systems for laser processing of materials are disclosed. Methods and systems for singulation of a wafer comprising a coated substrate can utilize a laser outputting light that has a wavelength that is transparent to the wafer substrate but which may not be transparent to the coating layer(s). Using techniques for managing fluence and focal condition of the laser beam, the coating layer(s) and the substrate material can be processed through ablation and internal modification, respectively. The internal modification can result in die separation.

Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a substrate having opposite first and second sides. A semiconductor layer is formed on the first side of the substrate. The method includes forming a photoresist layer over the semiconductor layer. The method includes patterning the photoresist layer into a plurality of photoresist components. The photoresist components are separated by openings. The method includes filling the openings with a plurality of thermally conductive components. The method includes separating the semiconductor layer into a plurality of dies using a radiation process that is performed to the substrate from the second side. Each of the first regions of the substrate is aligned with one of the conductive components.

Abstract: In one embodiment, first and second pattern structures respectively include first and second conductive line patterns and first and second hard masks sequentially stacked, and at least portions thereof extends in a first direction. The insulation layer patterns contact end portions of the first and second pattern structures. The first pattern structure and a first insulation layer pattern of the insulation layer patterns form a first closed curve shape in plan view, and the second pattern structure and a second insulation layer pattern of the insulation layer patterns form a second closed curve shape in plan view. The insulating interlayer covers upper portions of the first and second pattern structures and the insulation layer patterns, a first air gap between the first and second pattern structures, and a second air gap between the insulation layer patterns.

Abstract: Various lithography methods are disclosed. An exemplary lithography method includes forming a first patterned silicon-containing organic polymer layer over a substrate by removing a first patterned resist layer, wherein the first patterned silicon-containing organic polymer layer includes a first opening having a first dimension and a second opening having the first dimension, the first opening and the second opening exposing the substrate; forming a second patterned silicon-containing organic polymer layer over the substrate by removing a second patterned resist layer, wherein a portion of the patterned second silicon-containing organic polymer layer combines with a portion of the first patterned silicon-containing organic polymer layer to reduce the first dimension of the second opening to a second dimension; and etching the substrate exposed by the first opening having the first dimension and the second opening having the second dimension.

Abstract: An approach for patterning and etching without a mask is provided in a manufacturing a thin-film transistor, a gate electrode, a gate insulating layer, a semiconductor layer, an ohmic contact layer and source metal layer of a substrate. A first photoresist pattern including a first photo pattern and a second photo pattern is formed using a digital exposure device by generating a plurality of spot beams, the first photo pattern is formed to a first region of the base substrate and has a first thickness, and the second photo pattern is formed to a second region adjacent to the first region, and has a second thickness and a width in a range of about 50% to about 60% of a diameter of the spot beam. The source metal layer is patterned to form a source electrode and a drain electrode, and the source electrode and the drain electrode are spaced apart from each other in the first region of an active pattern.

Abstract: A method for manufacturing a laser-active solid having a bonded passive Q-switch is provided. A plane-parallel first wafer plate may be manufactured from a laser-active material. A second plane-parallel wafer plate may be manufactured from a material that is suitable as a passive Q-switch. The first wafer plate and the second wafer plate may be bonded to form a wafer block, which may then be coated on both end faces with a resonator mirror. Subsequently, the wafer block may be separated into multiple passively Q-switched solid state lasers.

Abstract: An object to be processed is restrained from warping at the time of laser processing. A modified region M2 is formed within a wafer 11, and fractures a2, b2 extending in directions parallel to the thickness direction of the wafer 11 and tilted with respect to a plane including lines 5 are generated from the modified region M2. A modified region M3 is formed within the wafer 11, and a fracture a3 extending in a direction parallel to the thickness direction of the wafer 11 and tilted with respect to the plane including the lines 5 is generated from the modified region M3 so as to connect with the fracture b2. That is, the fractures a2, a3, b2 are generated so as to be connected together.

Abstract: A method for manufacturing a memory element is proposed. A laser beam emitted from a laser oscillator is entered into a deflector, and a laser beam which has passed through the deflector is entered into a diffractive optical element to be diverged into a plurality of laser beams. Then, a photoresist formed over an insulating film is irradiated with the laser beam which is made to diverge into the plurality of laser beams, and the photoresist irradiated with the laser beam is developed so as to selectively etch the insulating film.

Abstract: The present invention provides an antenna with low resistance and a semiconductor device having an antenna whose communication distance is improved. A fluid containing conductive particles is applied over an object. After curing the fluid containing the conductive particles, the fluid is irradiated with a laser to form an antenna. As a method for applying the fluid containing the conductive particles, screen printing, spin coating, dipping, or a droplet discharging method is used. Further, a solid laser having a wavelength of 1 nm or more and 380 nm or less is used as the laser.

Abstract: A method of lithography patterning includes forming a first material layer on a substrate; forming a first patterned resist layer including at least one opening therein on the first material layer; forming a second material layer on the first patterned resist layer and the first material layer; forming a second patterned resist layer including at least one opening therein on the second material layer; and etching the first and second material layers uncovered by the first and second patterned resist layers.

Abstract: A substrate processing method includes preparing a substrate, a first mask adjacent to a first surface of the substrate and including a first light transmitting portion allowing light to be transmitted therethrough, a condenser adjacent to the first surface, a second mask including a second light transmitting portion, and a photo detecting member including a photo detecting portion detecting light having passed through the second light transmitting portion, the condenser condensing light having passed through the first light transmitting portion toward the second light transmitting portion, the second light transmitting portion allowing the light condensed by the condenser to be transmitted therethrough, and forming a recess in the substrate by laser beam irradiation from a direction opposite to the first surface. When an intensity of the laser beam detected by the photo detecting portion is at or above a specific intensity, the irradiation of the laser beam is stopped.

Abstract: A method for manufacturing a thin film transistor (TFT) is disclosed. The method is achieved by forming and defining a source and a drain of a thin film transistor through two lithographic processes cycles so that the channel length (L) of the thin film transistor can be reduced to 1.5 to 4.0 ?m. Besides, the Ion current of the thin film transistor is increased as the channel length (L) is decreased. Therefore, the component area of the thin film transistor is decreased as the channel width (W) is decreased. Thus, the aperture ratio of the TFT-LCD can be increased due to the decreased component area of the thin film transistor.

Abstract: An object to be processed is restrained from warping at the time of laser processing. A modified region M2 is formed within a wafer 11, and fractures a2, b2 extending in directions parallel to the thickness direction of the wafer 11 and tilted with respect to a plane including lines 5 are generated from the modified region M2. A modified region M3 is formed within the wafer 11, and a fracture a3 extending in a direction parallel to the thickness direction of the wafer 11 and tilted with respect to the plane including the lines 5 is generated from the modified region M3 so as to connect with the fracture b2. That is, the fractures a2, a3, b2 are generated so as to be connected together.

Abstract: A semiconductor fabrication system and method are presented. A three dimensional multilayer integrated circuit fabrication method can include forming a first device layer and forming a second device layer on top of the first device layer with minimal detrimental heat transfer to the first layer by utilizing a controlled laser layer formation annealing process. A controlled laser crystallization process can be utilized and the controlled laser can include creating an amorphous layer; defining a crystallization area in the amorphous layer, where in the crystallization area is defined to promote single crystal growth (i.e. prevent multi-crystalline growth); and applying laser to the crystallization area, wherein the laser is applied in a manner that prevents undesired heat transfer to another layer.

Abstract: The present invention provides an antenna with low resistance and a semiconductor device having an antenna whose communication distance is improved. A fluid containing conductive particles is applied over an object. After curing the fluid containing the conductive particles, the fluid is irradiated with a laser to form an antenna. As a method for applying the fluid containing the conductive particles, screen printing, spin coating, dipping, or a droplet discharging method is used. Further, a solid laser having a wavelength of 1 nm or more and 380 nm or less is used as the laser.

Abstract: A translucent solar cell and a manufacturing method thereof are provided. The translucent solar cell at least includes a substrate, a front electrode layer, a photoconductive layer, and a back electrode layer stacked in order. Therein, a plurality of apertures are formed on the front electrode layer. In addition, a plurality of light-transmissive regions are formed on the back electrode layer and further extended in a depth direction so as to reach the plurality of apertures on the front electrode layer. Thus, the projected area of each light-transmissive region is within and smaller than that of the corresponding aperture.

Abstract: A surface emitting laser includes a lower Bragg reflector, a resonator and an upper Bragg reflector. The resonator is provided on top of the lower Bragg reflector and includes an active layer, a lower semiconductor layer and an upper semiconductor layer. The upper Bragg reflector is provided on top of the resonator, and includes a plurality of semiconductor layers. In this surface emitting laser, the uppermost layer among the plurality of semiconductor layers in the lower Bragg reflector forms an air gap, which is larger than the aperture of the first insulating layer, while the lowermost layer among the plurality of semiconductor layers in the upper Bragg reflector forms an air gap, which is larger than the aperture of the second insulating layer.

Abstract: A passivation film and a method of forming the same are provided, the passivation film being used in a plasma display panel etc. In the passivation film, a first MgO layer, an intervening layer, and a second MgO layer are laminated and a laser is then irradiated to oxidize the intervening layer. Simultaneously, defects are formed at the interfaces of the first and second MgO layers. Accordingly, a plasma discharge firing voltage greatly decreases, and the total power consumption of the plasma display panel is significantly reduced.

Abstract: A surface of a single crystal semiconductor substrate is irradiated with ions to form a damaged region, an insulating layer is formed over the surface of the single crystal semiconductor substrate, and a surface of a substrate having an insulating surface is made to be in contact with a surface of the insulating layer to bond the substrate having an insulating surface to the single crystal semiconductor substrate. Then, the single crystal semiconductor substrate is separated at the damaged region by performing heat treatment to form a single crystal semiconductor layer over the substrate having an insulating surface, and the single crystal semiconductor layer is patterned to form a plurality of island-shaped semiconductor layers. One of the island-shaped semiconductor layers is irradiated with a laser beam which is shaped to entirely cover the island-shaped semiconductor layer.

Abstract: It is an object of the present invention to provide a laser irradiation technique which can keep the stability of the laser oscillator high and which can perform laser process homogeneously by avoiding the adverse effect due to the return light reflected on an irradiation when, for example, crystallizing with a lens array, and to provide a crystallization method and a method for manufacturing a semiconductor device which use the technique. In the present invention, a laser beam emitted from a laser oscillator is divided into a plurality of beams through a lens array such as a cylindrical lens array, the divided beams pass through opening portions of a slit while being focused at the opening portions and condensed beam is irradiated to an irradiation surface. Thus, the light reflected on the irradiation object can be blocked by using the slit.

Abstract: Fully and uniformly silicided gate conductors are produced by deeply “perforating” silicide gate conductors with sub-lithographic, sub-critical dimension, nanometer-scale openings. A silicide-forming metal (e.g. cobalt, tungsten, etc.) is then deposited, polysilicon gates, covering them and filling the perforations. An anneal step converts the polysilicon to silicide. Because of the deep perforations, the surface area of polysilicon in contact with the silicide-forming metal is greatly increased over conventional silicidation techniques, causing the polysilicon gate to be fully converted to a uniform silicide composition. A self-assembling diblock copolymer is used to form a regular sub-lithographic nanometer-scale pattern that is used as an etching “template” for forming the perforations.

Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.

Abstract: A method for manufacturing a thin film transistor (TFT) is disclosed. The method is achieved by forming and defining a source and a drain of a thin film transistor through two lithographic processes cycles so that the channel length (L) of the thin film transistor can be reduced to 1.5 to 4.0 ?m. Besides, the Ion current of the thin film transistor is increased as the channel length (L) is decreased. Therefore, the component area of the thin film transistor is decreased as the channel width (W) is decreased. Thus, the aperture ratio of the TFT-LCD can be increased due to the decreased component area of the thin film transistor.

Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device that has high driving ability (that is, large W/L) according to a method in which the use efficiency of a material is improved and the throughput and yield are enhanced. The present invention provides a method for a semiconductor device, which comprises the steps of forming a first conductive layer in contact with a semiconductor region, forming an insulating layer on the first conductive layer by one of droplet discharge and application, irradiating a portion of the insulating layer with laser light to form a mask pattern, and forming divided first conductive layers by etching with the use of the mask pattern as a mask.

Abstract: A method for manufacturing a semiconductor device. The method comprises depositing a material layer on a semiconductor substrate and patterning the material layer with a patterning material. Patterning forms a patterned structure of a semiconductor device, wherein the patterned structure has a sidewall with a roughness associated therewith. The method also comprises removing the patterning material from the patterned structure and annealing an outer surface of the patterned structure such that the roughness is reduced.

Abstract: Ga(In)N-based laser structures and related methods of fabrication are proposed where Ga(In)N-based semiconductor laser structures are formed on AlN or GaN substrates in a manner that addresses the need to avoid undue tensile strain in the semiconductor structure. In accordance with one embodiment of the present invention, a Ga(In)N-based semiconductor laser is provided on an AlN or GaN substrate provided with an AlGaN lattice adjustment layer where the substrate, the lattice adjustment layer, the lower cladding region, the active waveguiding region, the upper cladding region, and the N and P type contact regions of the laser form a compositional continuum in the semiconductor laser. Additional embodiments are disclosed and claimed.

Abstract: A method of forming a charge pattern includes treating a stamp layer with a plasma, applying the treated stamp layer to a surface of a substrate to thereby form a charge pattern on the surface of the substrate, and separating the stamp layer from the surface of the substrate. In one aspect, the method includes depositing nanoparticles on the surface of the substrate. An apparatus made in accordance with the method is also provided.

Abstract: Provided is a method of manufacturing a nitride-based semiconductor light-emitting device having an improved structure in which optical extraction efficiency is improved. The method of manufacturing a nitride-based semiconductor light-emitting device including an n-doped semiconductor layer, an active layer, a p-doped semiconductor layer, an n-electrode and a p-electrode includes: forming an azobenzene-functionalized polymer film on a base layer by selecting one layer from the group consisting of the n-doped semiconductor layer, the p-doped semiconductor layer, the n-electrode and the p-electrode as the base layer; forming surface relief gratings of a micro-pattern caused by a photophysical mass transport property of azobenzene-functionalized polymer by irradiating interference laser beams onto the azobenzene-functionalized polymer film; forming a photonic crystal layer using a metal oxide on a recessed gap of the azobenzene-functionalized polymer film, and removing the azobenzene-functionalized polymer film.

Abstract: Fully and uniformly silicided gate conductors are produced by deeply “perforating” silicide gate conductors with sub-lithographic, sub-critical dimension, nanometer-scale openings. A silicide-forming metal (e.g. cobalt, tungsten, etc.) is then deposited, polysilicon gates, covering them and filling the perforations. An anneal step converts the polysilicon to silicide. Because of the deep perforations, the surface area of polysilicon in contact with the silicide-forming metal is greatly increased over conventional silicidation techniques, causing the polysilicon gate to be fully converted to a uniform silicide composition. A self-assembling diblock copolymer is used to form a regular sub-lithographic nanometer-scale pattern that is used as an etching “template” for forming the perforations.

Abstract: An opto-thermal annealing method for forming a field effect transistor uses a reflective metal gate so that electrical properties of the metal gate and also interface between the metal gate and a gate dielectric are not compromised when opto-thermal annealing a source/drain region adjacent the metal gate. Another opto-thermal annealing method may be used for simultaneously opto-thermally annealing: (1) a silicon layer and a silicide forming metal layer to form a fully silicided gate; and (2) a source/drain region to form an annealed source/drain region. An additional opto-thermal annealing method may use a thermal insulator layer in conjunction with a thermal absorber layer to selectively opto-thermally anneal a silicon layer and a silicide forming metal layer to form a fully silicide gate.

Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device that has high driving ability (that is, large W/L) according to a method in which the use efficiency of a material is improved and the throughput and yield are enhanced. The present invention provides a method for a semiconductor device, which comprises the steps of forming a first conductive layer in contact with a semiconductor region, forming an insulating layer on the first conductive layer by one of droplet discharge and application, irradiating a portion of the insulating layer with laser light to form a mask pattern, and forming divided first conductive layers by etching with the use of the mask pattern as a mask.

Abstract: A method of forming a polycrystalline silicon layer includes: disposing a mask over the amorphous silicon layer, the mask having a plurality of transmissive regions, the plurality of transmissive regions being disposed in a stairstep arrangement spaced apart from each other in a first direction and a second direction substantially perpendicular from the first direction, each transmissive region having a central portion and first and second side portions that are adjacent to opposite ends of the central portion along the first direction, and wherein each of the portions has a length along the first direction and a width along the second direction, and wherein the width of first and second portions decreases away from the central portion along the first direction; irradiating a laser beam onto the amorphous silicon layer a first time through the mask to form a plurality of first irradiated regions corresponding to the plurality of transmissive regions, each first irradiated region having a central portion, and

Abstract: A method and apparatus for use in depositing electrical charge and/or nanoparticles is provided. A stamping process is used in which a stamp having a flexible layer such as a flexible semiconductor layer applies a charge pattern on a substrate. Other techniques include lithographic patterning, the use of pre-patterned dissimilar materials, deposition by ions or radiation, the use of differing work functions, the use of liquid phase materials. Deposition monitoring techniques and apparatuses are also provided.

Abstract: A method of lithography patterning includes forming a first material layer on a substrate, the first material layer being substantially free of silicon, and forming a patterned resist layer including at least one opening therein above the first material layer. A second material layer containing silicon is formed on the patterned resist layer and an opening is formed in the first material layer using the second material layer as a mask.