Abstract: A method for producing a light-emitting device, includes: performing, on a first substrate made of III-V group compound semiconductor, crystal growth of a laminated body including an etching easy layer contiguous to the first substrate and a light-emitting layer made of nitride semiconductor; bonding a second substrate and the laminated body; and detaching the second substrate provided with the light-emitting layer from the first substrate by, one of removing the etching easy layer by using a solution etching method, and removing the first substrate and the etching easy layer by using mechanical polishing method.

Abstract: The present invention relates to a method of fabricating an SOI SJ LDMOS structure that can completely eliminate the substrate-assisted depletion effects, comprising the following steps: step one: a conducting layer is prepared below the SOI BOX layer using the bonding technique; the conducting layer is prepared in the following way: depositing a barrier layer on a first bulk silicon wafer, and then depositing a charge conducting layer, thereby obtaining a first intermediate structure; forming a silicon dioxide layer on a second bulk silicon wafer via thermal oxidation, then depositing a barrier layer, and finally depositing a charge conducting layer, thereby obtaining a second intermediate structure; bonding the first intermediate structure and the second intermediate structure using the metal bonding technology to arrange the conducting layer below the SOI BOX layer; step two: a SJ LDMOS structure is fabricated on the SOI substrate having a conducting layer.

Abstract: A wafer temporary bonding method using silicon direct bonding (SDB) may include preparing a carrier wafer and a device wafer, adjusting roughness of a surface of the carrier wafer, and combining the carrier wafer and the device wafer using the SDB. Because the method uses SDB, instead of an adhesive layer, for a temporary bonding process, a module or process to generate and remove an adhesive is unnecessary. Also, a defect in a subsequent process, for example, a back-grinding process, due to irregularity of the adhesive may be prevented.

Abstract: A method of making a semiconductor device includes forming an under-film layer over bumps disposed on a surface of a wafer to completely cover the bumps, and forming an adhesive layer over the under-film layer. The method further includes attaching a support layer over the adhesive layer, removing a portion of a back surface of the wafer, and removing the support layer to expose the adhesive layer that remains disposed over the under-film layer. The method further includes removing the adhesive layer to expose the under-film layer while the bumps remain completely covered by the under-film layer, and singulating the wafer to form a semiconductor die. The method further includes pressing the bumps into contact with a substrate while the under-film layer provides an underfill between the semiconductor die and the substrate.

Abstract: The invention relates to a process for fabricating a multilayer structure comprising: bonding a first wafer onto a second wafer, at least the first wafer having a chamfered edge; and thinning the first wafer so as to form in a transferred layer, the thinning comprising a grinding step and a chemical etching step. After the grinding step and before the chemical etching step, a trimming step of the edge of the first wafer is carried out using a grinding wheel, the working surface of which comprises grit particles having an average size of less than or equal to 800-mesh or greater than or equal to 18 microns, the trimming step being carried out to a defined depth in the first wafer so as to leave a thickness of the first wafer of less than or equal to 35 ?m in the trimmed region.

Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate having a main horizontal surface, an opposite surface and a completely embedded dielectric region. A deep vertical trench is etched from the main horizontal surface into the semiconductor substrate using the dielectric region as an etch stop. A vertical transistor structure is formed in the semiconductor substrate. A first metallization in ohmic contact with the transistor structure is formed on the main horizontal surface. The semiconductor substrate is thinned at the opposite surface at least close to the dielectric region. Further, a semiconductor device is provided.

Abstract: Provided is a semiconductor device including: a base plate; a thermally conductive resin layer formed on an upper surface of the base plate; an integrated layer which is formed on an upper surface of the thermally conductive resin layer, and includes an electrode and an insulating resin layer covering all side surfaces of the electrode; and a semiconductor element formed on an upper surface of the electrode, in which the integrated layer is thermocompression bonded to the base plate through the thermally conductive resin layer. This semiconductor device excels in insulating properties and reliability.

Abstract: Organic anti-stiction coatings such as, for example, hydrocarbon and fluorocarbon based self-assembled organosilanes and siloxanes applied either in solvent or via chemical vapor deposition, are selectively etched using a UV-Ozone (UVO) dry etching technique in which the portions of the organic anti-stiction coating to be etched are exposed simultaneously to multiple wavelengths of ultraviolet light that excite and dissociate organic molecules from the anti-stiction coating and generate atomic oxygen from molecular oxygen and ozone so that the organic molecules react with atomic oxygen to form volatile products that are dissipated, resulting in removal of the exposed portions of the anti-stiction coating. A hybrid etching process using heat followed by UVO exposure may be used. A shadow mask (e.g., of glass or quartz), a protective material layer, or other mechanism may be used to selective expose the portions of the anti-stiction coating to be UVO etched.

Abstract: A method of manufacturing a vertical light emitting diode includes: providing a first substrate; forming a lapping stop layer on the first substrate, the lapping stop layer being harder than the first substrate; depositing an epitaxial layer on the lapping stop layer; bonding a second substrate on the epitaxial layer; and removing the first substrate from the lapping stop layer.

Abstract: A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.

Abstract: To prevent bubbles from occurring along a transfer interface, the present method includes the steps of: forming a peeled layer 10 in a transferred member 6 by implanting a peeled-layer forming substance into the transferred member 6; forming a planar surface in the transferred member 6 by planarizing a surface of the transferred member 6; forming a composite including the transferred member 6 and a glass substrate 2 by directly combining the transferred member 6 via the planar surface with a surface of the glass substrate 2; and peeling a part of the transferred member 6 from the composite along the peeled layer 10 serving as an interface by heat-treating the composite.

Abstract: A Direct Silicon Bonded substrate can include a first substrate and a second substrate in which the second substrate can be rotated to an azimuthal twist angle of 45 degrees in comparison to the first substrate. Disclosed are a semiconductor device and a method for making a semiconductor device that includes a DSB substrate with an adjusted thickness based upon the threshold voltage (Vt). In other words, a thicker substrate or layer can correspond to a high threshold voltage (HVt) and a thinner substrate or layer can correspond to a low threshold voltage (LVt) in order to improve mobility in LVt devices.

Abstract: A method for fabrication of 3D semiconductor devices utilizing a layer transfer and steps for forming transistors on top of a pre-fabricated semiconductor device comprising transistors formed on crystallized semiconductor base layer and metal layer for the transistors interconnections and insulation layer. The advantage of this approach is reduction of the over all metal length used to interconnect the various transistors.

Abstract: InP epitaxial material is directly bonded onto a Silicon-On-Insulator (SOI) wafer having Vertical Outgassing Channels (VOCs) between the bonding surface and the insulator (buried oxide, or BOX) layer. H2O and other molecules near the bonding surface migrate to the closest VOC and are quenched in the buried oxide (BOX) layer quickly by combining with bridging oxygen ions and forming pairs of stable nonbridging hydroxyl groups (Si—OH). Various sizes and spacings of channels are envisioned for various devices.

Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

Abstract: A method for producing a light-emitting device, includes: performing, on a first substrate made of III-V group compound semiconductor, crystal growth of a laminated body including an etching easy layer contiguous to the first substrate and a light-emitting layer made of nitride semiconductor; bonding a second substrate and the laminated body; and detaching the second substrate provided with the light-emitting layer from the first substrate by, one of removing the etching easy layer by using a solution etching method, and removing the first substrate and the etching easy layer by using mechanical polishing method.

Abstract: A method for manufacturing a dielectric isolation type semiconductor device comprises: forming a plurality of trenches in a first region on a major surface of a semiconductor substrate; forming a first dielectric layer on the major surface of the semiconductor substrate and a first thick dielectric layer in the first region by oxidizing a surface of the semiconductor substrate; bonding a semiconductor layer of a first conductive type to the semiconductor substrate via the first dielectric layer; forming a first semiconductor region by implanting an impurity into a part of the semiconductor layer above the first thick dielectric layer; forming a second semiconductor region by implanting an impurity of a second conductive type into a part of the semiconductor layer so as to surround the first semiconductor region separating from the first semiconductor region.

Abstract: Methods and apparatus for producing a semiconductor on glass (SOG) structure include: bringing a first surface of a glass substrate into direct or indirect contact with a semiconductor wafer; heating at least one of the glass substrate and the semiconductor wafer such that a second surface of the glass substrate, opposite to the first surface thereof, is at a lower temperature than the first surface; applying a voltage potential across the glass substrate and the semiconductor wafer; and maintaining the contact, heating and voltage to induce an anodic bond between the semiconductor wafer and the glass substrate via electrolysis.

Abstract: The invention relates to a method for preparing a surface of a semiconductor substrate by oxidizing the surface of the semiconductor substrate to thereby transform the natural oxide into an artificial oxide and then removing the artificial oxide, in particular to obtain an oxide-free substrate surface.

Abstract: A method for fabricating a semiconductor on insulator substrate by providing a first semiconductor substrate with a first impurity density of a first impurity type, subjecting the first semiconductor substrate to a first thermal treatment to thereby reduce the first impurity density in a modified layer adjacent a surface of the first semiconductor substrate being treated, transferring at least partially the modified layer with the reduced first impurity density onto a second substrate, to thereby obtain a modified second substrate, and providing a further layer on a transferred layer of the modified second substrate with the further layer having a second impurity density of a second impurity type that is different than the first impurity type of the transferred modified layer. By doing so, a contamination by dopants of the second impurity type of a fabrication line using semiconductor material with dopants of the first impurity type, can be prevented.

Abstract: A bonded wafer is produced by directly bonding a silicon wafer for active layer and a silicon wafer for support substrate without an insulating film and thinning the silicon wafer for active layer to a given thickness, in which a silicon wafer cut out from an ingot at a cutting angle of 0-0.1° (compound angle) with respect to a predetermined crystal face is used in each of the silicon wafer for active layer and silicon wafer for support substrate.

Abstract: A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.

Abstract: Electronic device wafer level scale packages and fabrication methods thereof A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A first trench is formed by etching the semiconductor exposing an inter-layered dielectric layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the first trench is removed to create a second trench. The insulating layer and the ILD layer are sequentially removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an S-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed.

Abstract: P-type semiconductor sheets and n-type semiconductor sheets formed by mixing a powder of semiconductor material, a binder resin, a plasticizer, and a surfactant are prepared. In addition, separator sheets formed by mixing a resin such as PMMA and a plasticizer are prepared. Through holes are formed in each of the separator sheets and then filled with a conductive material. Thereafter, the p-type semiconductor sheet, the separator sheet, the n-type semiconductor sheet and the separator sheet are stacked. The resultant laminated body is cut into a predetermined size and then subjected to a baking process.

Abstract: A semiconductor structure for use as a template for forming high-performance metal oxide semiconductor field effect transistor (MOSFET) devices is provided. More specifically, the present invention provides a structure that includes a SiGe-on-insulator substrate including a tensile-strained SiGe alloy layer located atop an insulating layer; and a strained Si layer atop the tensile-strained SiGe alloy layer. The present invention also provides a method of forming the tensile-strained SGOI substrate as well as the heterostructure described above. The method of the present invention decouples the preference for high strain in the strained Si layer and the Ge content in the underlying layer by providing a tensile-strained SiGe alloy layer directly atop on an insulating layer.

Abstract: A method for bonding a semiconductor device onto a substrate is provided which comprises the steps of picking up a solder ball with a pick head, placing the solder ball onto the substrate and melting the solder ball on the substrate and placing the semiconductor device on the molten solder ball. The molten solder ball is then allowed to cool to form a solder joint which bonds the semiconductor device to the substrate.

Abstract: The invention relates to a method for bonding wafers along their corresponding surfaces.

Abstract: Methods of producing CdZnTe (CZT) layers for the epitaxial growth of HgCdTe thereon include implanting ions into a CZT substrate at a low temperature to form a damaged layer underneath a CZT surface layer, bonding a wafer to the CZT substrate about the CZT surface layer using a bonding material, and, annealing the CZT substrate for a time sufficient to facilitate the splitting of the CZT substrate at the damaged layer from the CZT surface layer.

Abstract: A photovoltaic cell is formed by bonding a donor body to a receiver element and cleaving a thin lamina from the donor body. Electrical contact is made to the bonded surface of the lamina through vias formed in the lamina. In some embodiments the emitter exists only at the bonded surface or only at the cleaved surface face; the emitter does not wrap through the vias between the surfaces. Wiring contacting each of the two surfaces is formed only at the cleaved face, and one set of wiring contacts the bonded surface through conductive material formed in the vias, insulated from the via sidewalls.

Abstract: A semiconductor device including a compound semiconductor laminated structure having a plurality of compound semiconductor layers formed over a semiconductor substrate, a first insulation film covering at least a part of a surface of the compound semiconductor laminated structure, and a second insulation film formed on the first insulation film, wherein the second insulation film includes more hydrogen than the first insulation film.

Abstract: A method for fabricating a semiconductor on insulator substrate by providing a first semiconductor substrate with a first impurity density of a first impurity type, subjecting the first semiconductor substrate to a first thermal treatment to thereby reduce the first impurity density in a modified layer adjacent a surface of the first semiconductor substrate being treated, transferring at least partially the modified layer with the reduced first impurity density onto a second substrate, to thereby obtain a modified second substrate, and providing a further layer on a transferred layer of the modified second substrate with the further layer having a second impurity density of a second impurity type that is different than the first impurity type of the transferred modified layer. By doing so, a contamination by dopants of the second impurity type of a fabrication line using semiconductor material with dopants of the first impurity type, can be prevented.

Abstract: A microstructure of the semiconductor on insulator type with different patterns is produced by forming a stacked uniform structure including a plate forming a substrate, a continuous insulative layer and a semiconductor layer. The continuous insulative layer is a stack of at least three elementary layers, including a bottom elementary layer, at least one intermediate elementary layer, and a top elementary layer overlying the semiconductor layer, where at least one of the bottom elementary layer and the top elementary layer being of an insulative material. In the stacked uniform structure, at least two patterns are differentiated by modifying at least one of the elementary layers in one of the patterns so that the elementary layer has a significantly different physical or chemical property between the two patterns, where at least one of the bottom and top elementary layer is an insulative material that remains unchanged.

Abstract: A Direct Silicon Bonded substrate can include a first substrate and a second substrate in which the second substrate can be rotated to an azimuthal twist angle of 45 degrees in comparison to the first substrate. Disclosed are a semiconductor device and a method for making a semiconductor device that includes a DSB substrate with an adjusted thickness based upon the threshold voltage (Vt). In other words, a thicker substrate or layer can correspond to a high threshold voltage (HVt) and a thinner substrate or layer can correspond to a low threshold voltage (LVt) in order to improve mobility in LVt devices.

Abstract: Adhesion of particles due to static buildup during a laminated substrate manufacturing process is constrained, so as to reduce generation of a void or a blister in a lamination step and improve yield. A laminate 13 is formed by superimposing a first semiconductor substrate 11, which is to be an active layer, on a second semiconductor substrate 12, which is to be a supporting substrate, via an oxide film 11a. Electric resistance of either or both of the first and second semiconductor substrates 11 and 12 before superimposition is 0.005-0.2 ?cm.

Abstract: A method of forming a semiconductor structure includes providing a substrate and providing a detach region which is carried by the substrate. A device structure which includes a stack of crystalline semiconductor layers is provided, wherein the detach region is positioned between the device structure and substrate. The stack is processed to form a vertically oriented semiconductor device.

Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.

Abstract: A semiconductor device begins with a wafer having a plurality of bumps formed on a surface of the wafer. An under-film layer is formed over the wafer to completely cover all portions of the bumps with the under-film layer. An adhesive layer is formed over the under-film layer. A support layer is attached over the adhesive layer. A back surface of the wafer undergoes grinding. The support layer provides structural support to the wafer. The support layer is removed to expose the adhesive layer. The adhesive layer is removed to expose the under-film layer. The wafer is singulated into semiconductor die. The semiconductor die is mounted to a substrate by applying force to a back surface of the semiconductor die to press the bumps through under-film layer to contact the substrate while the under-film layer provides an underfill between the semiconductor die and substrate.

Abstract: A group III nitride semiconductor composite substrate includes a substrate composed of a conductive material having a melting point of not less than 100° C., a group III nitride layer provided on the substrate, and a group III nitride single crystal film provided on the group III nitride layer. The group III nitride layer includes an undulation including a periodic roughness in a surface of the group III nitride layer contacted with the group III nitride single crystal film. The undulation includes a 1-dimensional power spectral density of less than 500 nm3 in the spatial wavelength region of not less than 0.1 (/?m) and less than 1 (/?m).

Abstract: A device structure includes a III-nitride wurtzite semiconductor light emitting region disposed between a p-type region and an n-type region. A bonded interface is disposed between two surfaces, one of the surfaces being a surface of the device structure. The bonded interface facilitates an orientation of the wurtzite c-axis in the light emitting region that confines carriers in the light emitting region, potentially increasing efficiency at high current density.

Abstract: A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.

Abstract: A method of recovering a first substrate, including the steps of: sticking a second substrate on a semiconductor layer epitaxially grown on the first substrate; and separating the semiconductor layer and the first substrate. Furthermore, a method of reproducing a first substrate, including the step of surface processing the first substrate separated. Furthermore, a method of reproducing a first substrate, including the step of homoepitaxially growing the first substrate surface processed. Furthermore, a method of producing a semiconductor wafer, including the step of epitaxially growing a semiconductor layer on a first substrate. Thus a group III nitride or similar, expensive substrate can be used to efficiently and economically, epitaxially grow a group III nitride or similar semiconductor layer.

Abstract: A bonded wafer is produced by removing a part or all of native oxide films formed on each surface of both a wafer for active layer and a wafer for support substrate to be bonded; forming a uniform oxide film with a thickness of less than 5 nm on at least one surface of these wafers by a given oxide film forming method; bonding the wafer for active layer to the wafer for support substrate through the uniform oxide film; thinning the wafer for active layer; and subjecting the bonded wafer to a given heat treatment in a non-oxidizing atmosphere to substantially remove the uniform oxide film existing in the bonding interface.

Abstract: Ge/Si and other nonsilicon film heterostructures are formed by hydrogen-induced exfoliation of the Ge film which is wafer bonded to a cheaper substrate, such as Si. A thin, single-crystal layer of Ge is transferred to Si substrate. The bond at the interface of the Ge/Si heterostructures is covalent to ensure good thermal contact, mechanical strength, and to enable the formation of an ohmic contact between the Si substrate and Ge layers. To accomplish this type of bond, hydrophobic wafer bonding is used, because as the invention demonstrates the hydrogen-surface-terminating species that facilitate van der Waals bonding evolves at temperatures above 600° C. into covalent bonding in hydrophobically bound Ge/Si layer transferred systems.

Abstract: In aspects of the present invention, a method is disclosed to form a lamina having opposing first and second surfaces. Heavily doped contact regions extend from the first surface to the second surface. Generally the lamina is formed by affixing a semiconductor donor body to a receiver element, then cleaving the lamina from the semiconductor donor body wherein the lamina remains affixed to the receiver element. In the present invention, the heavily doped contact regions are formed by doping the semiconductor donor body before cleaving of the lamina. A photovoltaic cell comprising the lamina is then fabricated. By forming the heavily doped contact regions before bonding to the receiver element and cleaving, post-bonding high-temperature steps can be avoided, which may be advantageous.

Abstract: An LED package structure with standby bonding pads for increasing wire-bonding yield includes a substrate unit, a light-emitting unit, a conductive wire unit and a package unit. The substrate unit has a substrate body and a plurality of positive pads and negative pads. The light-emitting unit has a plurality of LED chips. The positive electrode of each LED chip corresponds to at least two of the positive pads, and the negative electrode of each. LED chip corresponds to at least two of the negative pads. Every two wires of the conductive wire unit are respectively electrically connected between the positive electrode of each LED chip and one of the at least two positive pads and between the negative electrode of each LED chip and one of the at least two negative pads. The package unit has a translucent package resin body on the substrate body to cover the LED chips.

Abstract: A die bonding apparatus and a bonding method are provided wherein the apparatus comprises a bond head movable between a supply of semiconductor dice and a die bonding site, a pick-up tool attached to the bond head for holding a die to be bonded at the die bonding site and an optical assembly positioned for viewing an orientation of the die bonding site. The bond head is configured such that an orientation of the die being held by the pick-up tool between the optical assembly and the die bonding site is viewable by the optical assembly, whereby the orientation of the die may be aligned with the orientation of the die bonding site.

Abstract: The present invention provides a method for manufacturing a bonded wafer, which includes at least the steps of bonding a bond wafer and a base wafer, grinding an outer peripheral portion of the bonded bond wafer, etching off an unbonded portion of the ground bond wafer, and then reducing a thickness of the bond wafer, wherein, in the step of grinding the outer peripheral portion, the bonded bond wafer is ground so as to form a groove along the outer peripheral portion of the bond wafer to form an outer edge portion outside the groove; and in the subsequent step of etching, the outer edge portion is removed together with the groove portion of the bond wafer to form a terrace portion where the base wafer is exposed at the outer peripheral portion of the bonded wafer. Thus, it is possible to provide a method for manufacturing a bonded wafer, which can reduce the number of dimples formed in a terrace portion of a base wafer upon removing an outer peripheral portion of a bonded bond wafer.

Abstract: A semiconductor method includes thermally treating at least a portion of a substrate so as to generate a plurality of vacancies in a region at a depth substantially near to a surface of the substrate. The substrate is then quenched so as to substantially maintain the vacancies in the region substantially near to the surface of the substrate.

Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.

Abstract: This invention describes a radiation-emitting semiconductor component based on GaN, whose semiconductor body is made up of a stack of different GaN semiconductor layers (1). The semiconductor body has a first principal surface (3) and a second principal surface (4), with the radiation produced being emitted through the first principal surface (3) and with a reflector (6) being produced on the second principal surface (4). The invention also describes a production method for a semiconductor component pursuant to the invention. An interlayer (9) is first applied to a substrate (8), and a plurality of GaN layers (1) that constitute the semiconductor body of the component are then applied to this. The substrate (8) and the interlayer (9) are then detached and a reflector (6) is produced on a principal surface of the semiconductor body.