For Charge-coupled Device (epo) Patents (Class 257/E21.187)
  • Patent number: 8906742
    Abstract: Systems and methods are disclosed for performing laser annealing in a manner that reduces or minimizes wafer surface temperature variations during the laser annealing process. The systems and methods include annealing the wafer surface with first and second laser beams that represent preheat and anneal laser beams having respective first and second intensities. The preheat laser beam brings the wafer surface temperate close to the annealing temperature and the anneal laser beam brings the wafer surface temperature up to the annealing temperature. The anneal laser beam can have a different wavelength, or the same wavelength but different orientation relative to the wafer surface. Reflectivity maps of the wafer surface at the preheat and anneal wavelengths are measured and used to select the first and second intensities that ensure good anneal temperature uniformity as a function of wafer position. The first and second intensities can also be selected to minimize edge damage or slip generation.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: December 9, 2014
    Assignee: Ultratech, Inc.
    Inventors: Xiaohua Shen, Yun Wang, Xiaoru Wang
  • Patent number: 8574941
    Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator. The method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: November 5, 2013
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Tomoyuki Hirano
  • Patent number: 8546805
    Abstract: Systems and methods are disclosed for performing laser annealing in a manner that reduces or minimizes wafer surface temperature variations during the laser annealing process. The systems and methods include annealing the wafer surface with first and second laser beams that represent preheat and anneal laser beams having respective first and second intensities. The preheat laser beam brings the wafer surface temperate close to the annealing temperature and the anneal laser beam brings the wafer surface temperature up to the annealing temperature. The anneal laser beam can have a different wavelength, or the same wavelength but different orientation relative to the wafer surface. Reflectivity maps of the wafer surface at the preheat and anneal wavelengths are measured and used to select first and second intensities that ensure good anneal temperature uniformity as a function of wafer position.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: October 1, 2013
    Assignee: Ultratech, Inc.
    Inventors: Xiaohua Shen, Yun Wang, Xiaoru Wang
  • Patent number: 7557390
    Abstract: A solid image capturing element comprising a plurality of vertical shift registers arranged to each correspond to a column of a plurality of light receiving pixels in a matrix arrangement, a horizontal shift register provided on an output side of the plurality of vertical shift registers, and an output section provided on an output side of the horizontal shift register. In this solid image capturing element, a reverse conductive semiconductor region is formed over one major surface of one conductive semiconductor substrate, the plurality of light receiving pixels, the plurality of vertical shift registers, the horizontal shift register, and the output section are formed in the semiconductor region, and a portion of the semiconductor region where the output section is formed has a higher dopant concentration than the portion of the semiconductor region where the horizontal shift register is formed.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: July 7, 2009
    Assignee: Sanyo Electric co., Ltd.
    Inventors: Yoshihiro Okada, Yuzo Otsuru
  • Publication number: 20070284569
    Abstract: A charge coupled device (CCD) is disclosed which has a semiconductor body (20) comprising polymer or oligomer semiconductor material in place of the conventional silicon. A back electrode (22) of the device is electrically coupled to the semi-conductor body through a Schottky junction, reducing the availability of holes in the semiconductor body. Shift electrodes forming a shift register are driven by negative electrical potentials and accumulations of holes in p type semiconductor material represent data.
    Type: Application
    Filed: December 16, 2004
    Publication date: December 13, 2007
    Inventor: William Eccleston
  • Patent number: 7253092
    Abstract: Disclosed herein is a method of making integrated circuits. In one embodiment the method includes forming tungsten plugs in the integrated circuit and forming electrically conductive interconnect lines in the integrated circuit after formation of the tungsten plugs. At least one tungsten plug is electrically connected to at least one electrically conductive interconnect line. Thereafter at least one electrically conductive interconnect line is contacted with water for a period of time less than 120 minutes.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: August 7, 2007
    Assignee: NEC Electronics America, Inc.
    Inventors: Elizabeth A. Dauch, John W. Jacobs