Abstract: Acquisition of critical minerals via refinement from aqueous sources. Technological and geopolitical advantages—inure to conflict-free refinement of rare materials including critical minerals used in production of energy storage devices, among other applications. Additionally, the applied “clean tech” methods advance environmental goals such as those given in the Paris Agreement. Various site-specific system configurations and corresponding site-specific methods of operation bring to bear a panoply of economically viable approaches to critical mineral refinement. In some approaches, electrical power needed to drive refinement is provided by selected site-specific renewable energy sources. Real-world implementations involve co-locating a dissociative reactor with a geothermal energy plant near a salar or other source (preferably aqueous) of critical minerals therein. Refined critical minerals are produced on site.

Abstract: Embodiments of the invention are directed to a method of forming a semiconductor device. A non-limiting example of the method includes forming a semiconductor layer within or on a portion of a substrate, wherein the semiconductor layer includes a first type of semiconductor material. A gate stack is formed over a first exposed surface of the semiconductor layer. A first hydrogenated and doped semiconductor layer is formed over a second exposed surface of the semiconductor layer. A second hydrogenated and doped semiconductor layer is formed over a third exposed surface of the semiconductor layer, wherein a lateral dimension of the first hydrogenated and doped semiconductor layer terminates at a first sidewall of the gate stack, and wherein a lateral dimension of the second hydrogenated and doped semiconductor layer terminates at a second sidewall of the gate stack.

Abstract: Methods of hydrogen atom incorporation and of passivation of grain boundaries of polycrystalline semiconductors use a low temperature, pulsed plasma to incorporate hydrogen atoms into the grain boundaries of polycrystalline semiconductor materials in a controlled manner. A hydrogen-passivated polycrystalline IR detector has hydrogen atoms incorporated into grain boundaries of a polycrystalline Group III-V compound semiconductor detector element and a dark current density characteristic that is lower than the dark current density characteristic of a polycrystalline IR detector without the incorporated hydrogen atoms.

Abstract: A pixel circuit includes a first capacitor and diode stage connected to a gate of a first transistor and ground, which receives a select input. A data line is coupled to a first source/drain of the first transistor, and a second source/drain of the first transistor is coupled to a gate of a second transistor. The second transistor has a drain connected to a supply voltage and a source connected to a resistor. The resistor connects to an organic light emitting diode (OLED), which connects to the ground.

Abstract: A base insulating film is formed over a substrate. A first oxide semiconductor film is formed over the base insulating film, and then first heat treatment is performed to form a second oxide semiconductor film. Then, selective etching is performed to form a third oxide semiconductor film. An insulating film is formed over the first insulating film and the third oxide semiconductor film. A surface of the insulating film is polished to expose a surface of the third oxide semiconductor film, so that a sidewall insulating film is formed in contact with at least a side surface of the third oxide semiconductor film. Then, a source electrode and a drain electrode are formed over the sidewall insulating film and the third oxide semiconductor film. A gate insulating film and a gate electrode are formed.

Abstract: Disclosed is a method of manufacturing a semiconductor device including: performing a pre-process to a metal film or a GST film by supplying a first processing gas to a substrate, on a surface of which the metal film or the GST film is formed, without supplying a second processing gas; and performing a formation process to the substrate to which the pre-process has been performed such that a film is formed on the metal film or the GST film by executing at least one cycle of alternately (i) supplying the first processing gas, and (ii) supplying the second processing gas that is activated by plasma excitation.

Abstract: A low temperature poly-silicon thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The method comprises: S1: sequentially forming an active layer (3), a gate insulation layer (4), a gate electrode (5) and an interlayer insulation layer (6) on a base substrate (1); S2: forming a first metal thin film layer (8); S3: performing a hydrogenation treatment on the active layer (3) and the gate insulation layer (6); S4: forming a second metal thin film layer (7), the second metal thin film layer (7) being used for forming a source electrode and a drain electrode.

Abstract: A thin film transistor and manufacturing method thereof, an array substrate and a display device are provided. In the manufacturing method of the thin film transistor, manufacturing an active layer includes: forming a germanium thin film, and forming pattern of the active layer through a patterning process; conducting a topological treatment on the germanium thin film with a functionalized element, so as to obtain the active layer (4) with topological semiconductor characteristics. The resultant thin film transistor has a higher carrier mobility and a better performance.

Abstract: A semiconductor device having a high-k gate dielectric, and a method of manufacture, is provided. A gate dielectric layer is formed over a substrate. An interfacial layer may be interposed between the gate dielectric layer and the substrate. A barrier layer, such as a TiN layer, having a higher concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer is formed. The barrier layer may be formed by depositing, for example, a TiN layer and performing a nitridation process on the TiN layer to increase the concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer. A gate electrode is formed over the barrier layer.

Abstract: A semiconductor device includes a memory block including a transistor region and a memory region. A variable resistance layer of the memory region acts as a gate insulating layer in the transistor region.

Abstract: Native oxide growth on germanium, silicon germanium, and InGaAs undesirably affects CET (capacitive equivalent thickness) and EOT (effective oxide thickness) of high-k and low-k metal-oxide layers formed on these semiconductors. Even if pre-existing native oxide is initially removed from the bare semiconductor surface, some metal oxide layers are oxygen-permeable in thicknesses below about 25 ? thick. Oxygen-containing species used in the metal-oxide deposition process may diffuse through these permeable layers, react with the underlying semiconductor, and re-grow the native oxide. To eliminate or mitigate this re-growth, the substrate is exposed to a gas or plasma reductant (e.g., containing hydrogen). The reductant diffuses through the permeable layers to react with the re-grown native oxide, detaching the oxygen and leaving the un-oxidized semiconductor. The reduction product(s) resulting from the reaction may then be removed from the substrate (e.g., driven off by heat).

Abstract: A rolled-up transmission line structure for a radiofrequency integrated circuit (RFIC) comprises a multilayer sheet in a rolled configuration comprising multiple turns about a longitudinal axis, where the multilayer sheet comprises a conductive pattern layer on a strain-relieved layer. The conductive pattern layer comprises a first conductive film and a second conductive film separated from the first conductive film in a rolling direction. In the rolled configuration, the first conductive film surrounds the longitudinal axis, and the second conductive film surrounds the first conductive film. The first conductive film serves as a signal line and the second conductive film serves as a conductive shield for the rolled-up transmission line structure.

Abstract: Provided are field effect transistor (FET) assemblies and methods of forming thereof. An FET assembly may include a dielectric layer formed from tantalum silicon oxide and having the atomic ratio of silicon to tantalum and silicon (Si/(Ta+Si)) of less than 5% to provide a low trap density. The dielectric layer may be disposed over an interface layer, which is disposed over a channel region. The same type of the dielectric layer may be used a common gate dielectric of an nMOSFET (e.g., III-V materials) and a pMOSFET (e.g., germanium). The channel region may include one of indium gallium arsenide, indium phosphate, or germanium. The interface layer may include silicon oxide to provide a higher energy barrier. The dielectric layer may be formed using an atomic layer deposition technique by adsorbing both tantalum and silicon containing precursors on the deposition surface and then oxidizing both precursors in the same operation.

Abstract: One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×1016 atoms/cm3, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H2O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.

Abstract: A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an H2 gas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.

Abstract: In one implementation, a chemical sensor is described. The chemical sensor includes a chemically-sensitive field effect transistor including a floating gate conductor having an upper surface. A dielectric material defines an opening extending to the upper surface of the floating gate conductor. A conductive element on a sidewall of the opening and extending over an upper surface of the dielectric material.

Abstract: A cavity is etched from a front surface into a semiconductor substrate. After providing an etch stop structure at the bottom of the cavity, the cavity is closed. From a back surface opposite to the front surface the semiconductor substrate is grinded at least up to an edge of the etch stop structure oriented to the back surface. Providing the etch stop structure at the bottom of an etched cavity allows for precisely adjusting a thickness of a semiconductor body of a semiconductor device.

Abstract: One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×1016 atoms/cm3, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H2O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.

Abstract: Provided is a metallic wiring film which is not peeled away even when exposed to a hydrogen plasma. A metallic wiring film is constituted by an adhesion layer containing copper, Ca, and oxygen and a low-resistance metal layer (a layer of a copper alloy or pure copper) having a lower resistance than the adhesion layer. When the adhesion layer is composed of a copper alloy, which contains Ca and oxygen, and a source electrode film and a drain electrode film adhering to an ohmic contact layer are constituted by the adhesion layer, even if the adhesion layer is exposed to the hydrogen plasma, a Cu-containing oxide formed at an interface between the adhesion layer and the ohmic contact layer is not reduced, so that no peeling occurs between the adhesion layer and a silicon layer.

Abstract: A method for fabricating a 3D-nonvolatile memory device includes forming a sub-channel over a substrate, forming a stacked layer over the substrate, the stacked layer including a plurality of interlayer dielectric layers that are alternatively stacked with conductive layers, selectively etching the stacked layer to form a first open region exposing the sub-channel, forming a main-channel conductive layer to gap-fill the first open region, selectively etching the stacked layer and the main-channel conductive layer to form a second open region defining a plurality of main channels, and forming an isolation layer to gap-fill the second open region.

Abstract: A manufacturing method of a photoelectric conversion device module, wherein an insulating layer and a first electrode are formed over a base substrate; a plurality of single-crystal semiconductor substrates having a first conductivity type including embrittlement layers formed inside are attached; the plurality of single-crystal semiconductor substrates are separated at the embrittlement layers so that a plurality of stacked bodies including the insulating layer, the first electrode and a first single-crystal semiconductor layer is formed; a second single-crystal semiconductor layer is formed over the stacked bodies to form a first photoelectric conversion layer; a second photoelectric conversion layer including a non-single-crystal semiconductor layer is formed; a second electrode is formed; and selective etching is conducted to form photoelectric conversion cells which are element-separated, and a connecting electrode is formed to connect the second electrode of one photoelectric conversion cell and the fir

Abstract: A method for fabricating a three-dimensional semiconductor memory device including three-dimensionally arranged transistors includes forming a thin film structure comprising a plurality of thin films on a semiconductor substrate, patterning the thin film structure such that a penetration region is formed to expose the semiconductor substrate, forming a polycrystalline semiconductor layer to cover the resultant structure where the penetration region is formed, patterning the semiconductor layer to locally form a semiconductor pattern within the penetration region, and performing a post-treatment process to treat the semiconductor layer or the semiconductor pattern with a post-treatment material containing hydrogen or deuterium.

Abstract: A photodiode includes a silicon semiconductor layer; a P-type high concentration diffusion layer with a P-type impurity diffused therein at a high concentration; an N-type high concentration diffusion layer with an N-type impurity diffused therein at a high concentration; and a low concentration diffusion layer with one of the P-type impurity and the N-type impurity diffused therein at a low concentration. The P-type high concentration diffusion layer and the N-type high concentration diffusion layer are formed in the silicon semiconductor layer, and are arranged to face each other with the low concentration diffusion layer in between. The photodiode further includes an interlayer insulation film formed on the silicon semiconductor layer, so that a covalent bond between silicon and hydrogen is formed in an atom row of the low concentration layer adjacent to an interface thereof with respect to the interlayer insulation film.

Abstract: In a method of annealing a Cd1-xZnxTe sample/wafer, surface contamination is removed from the sample/wafer and the sample/wafer is then introduced into a chamber. The chamber is evacuated and Hydrogen or Deuterium gas is introduced into the evacuated chamber. The sample/wafer is heated to a suitable annealing temperature in the presence of the Hydrogen or Deuterium gas for a predetermined period of time.

Abstract: A method of forming a semiconductor device is disclosed. Nitrogen layers of an IPD stack are deposited using silane and a nitrogen plasma to yield a nitride layer plasma treated through its entire thickness. In addition to nitriding the bottom nitride layer of the stack, the middle nitride layer may also be nitrided. Depositing silicon from silane in a nitrogen plasma may be accomplished using high density plasma, ALD, or remote plasma processes. Elevated temperature may be used during deposition to reduce residual hydrogen in the deposited layer.

Abstract: Apparatus and methods for repairing silicon dangling bonds resulting from semiconductor processing are disclosed. The silicon dangling bonds can be repaired by introducing hydrogen radicals with substantially no hydrogen ions into the processing chamber to react with the silicon dangling bonds, eliminating them.

Abstract: The present invention is a method for manufacturing a bonded wafer by an ion implantation delamination method including at least the steps of, bonding a bond wafer having a micro bubble layer formed by gas ion implantation with a base wafer to be a supporting substrate, delaminating the bond wafer along the micro bubble layer as a boundary to form a thin film on the base wafer, the method comprising, cleaning the bonded wafer after delaminating the bond wafer using ozone water; performing rapid thermal anneal process under a hydrogen containing atmosphere; forming a thermal oxide film on a surface layer of the bonded wafer by subjecting to heat treatment under an oxidizing gas atmosphere and removing the thermal oxide film; subjecting to heat treatment under a non-oxidizing gas atmosphere.

Abstract: An object of the present invention is to provide a semiconductor device having a structure which can realize not only suppressing a punch-through current but also reusing a silicon wafer which is used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. The semiconductor device can suppress the punch-through current by forming a semiconductor film in which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted over a substrate having an insulating surface, and forming a channel formation region using a semiconductor film of stacked layers obtained by bonding a single crystal semiconductor film to the semiconductor film by an SOI technique.

Abstract: By performing a heat treatment on the basis of a hydrogen ambient, exposed silicon-containing surface portions may be reorganized prior to the formation of gate dielectric materials. Hence, the interface quality and the material characteristics of the gate dielectrics may be improved, thereby reducing negative bias temperature instability effects in highly scaled P-channel transistors.

Abstract: A semiconductor device includes a workpiece having a bottom surface opposite the top surface. Metallization layers are disposed over the top surface and a protective layer is disposed over the metallization layers. The semiconductor device further includes a metal silicide layer disposed on the bottom surface. The metal silicide layer is less than about five atomic layers in thickness. A first metal layer is disposed over the metal silicide layer such that a metal of the first metal layer is the same as a metal of the metal silicide layer.

Abstract: The present disclosure passivates solar cell defects. Plasma immersion ion implantation (PIII) is used to repair the defects during or after making the solar cell. Hydrogen ion is implanted into absorption layer with different sums of energy to fill gaps of defects or surface recombination centers. Thus, solar cell defects are diminished and carriers are transferred with improved photovoltaic conversion efficiency.

Abstract: A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer.

Abstract: A method of treating a semiconductor device wherein there is provided a semiconductor device, the semiconductor device being at least in part chemically bonded to an undesired chemical species. The semiconductor device is subjected to light of a wavelength sufficient to cleave at least some of the chemical bonds between the semiconductor device and the undesired chemical species, and the semiconductor device is exposed to a source of a desired chemical species, such that the semiconductor device becomes at least in part chemically bonded to the desired chemical species.

Abstract: The present invention relates to a device and a method for dividing up substrates (2) in wafer form (e.g. wafers), which is used in the semiconductor industry, MST (microstructure technology) industry and photovoltaic industry, whereby improved reliability of the process and lower reject rates are accomplished. This object is achieved according to the invention by using adhesion forces that act between the substrates in wafer form and the devices (1) thereby used.

Abstract: By hydrogen-terminating a semiconductor surface using a solution containing HF2? ions and an oxidant, the hydrogen termination can be quickly carried out. In this case, the semiconductor surface is silicon having a (111) surface, a (110) surface, or a (551) surface.

Abstract: A method of treating a nanoporous low-k dielectric material formed on a semiconductor substrate is provided. The low-k dielectric material has etched openings with an etch damaged region containing silanol groups on exterior surfaces of the etched openings and on interior surfaces of interconnected pores. First, the low-k dielectric material is contacted with a vapor phase catalyst in an amount effective to form hydrogen bonds between the catalyst and the silanol groups in the etch damaged region, forming a catalytic intermediary.

Abstract: A semiconductor device including a compound semiconductor laminated structure having a plurality of compound semiconductor layers formed over a semiconductor substrate, a first insulation film covering at least a part of a surface of the compound semiconductor laminated structure, and a second insulation film formed on the first insulation film, wherein the second insulation film includes more hydrogen than the first insulation film.

Abstract: The present disclosure passivates solar cell defects. Plasma immersion ion implantation (PIII) is used to repair the defects during or after making the solar cell. Hydrogen ion is implanted into absorption layer with different sums of energy to fill gaps of defects or surface recombination centers. Thus, solar cell defects are diminished and carriers are transferred with improved photovoltaic conversion efficiency.

Abstract: A method for fabricating a three-dimensional semiconductor memory device including three-dimensionally arranged transistors includes forming a thin film structure comprising a plurality of thin films on a semiconductor substrate, patterning the thin film structure such that a penetration region is formed to expose the semiconductor substrate, forming a polycrystalline semiconductor layer to cover the resultant structure where the penetration region is formed, patterning the semiconductor layer to locally form a semiconductor pattern within the penetration region, and performing a post-treatment process to treat the semiconductor layer or the semiconductor pattern with a post-treatment material containing hydrogen or deuterium.

Abstract: Apparatus and method are provided for hydrogenating semiconductor or other materials by ultraviolet (UV) radiation in the presence of hydrogen. Hydrogen uptake may be optimized by selection of temperature and wavelength of the UV radiation. Patterned areas may be selectively hydrogenated, such as mesas in Avalanche Photodiode Arrays.

Abstract: Apparatus and methods for repairing silicon dangling bonds resulting from semiconductor processing are disclosed. The silicon dangling bonds can be repaired by introducing hydrogen radicals with substantially no hydrogen ions into the processing chamber to react with the silicon dangling bonds, eliminating them.

Abstract: A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.

Abstract: Apparatus and method to improve the operating parameters of HgCdTe-based optoelectric devices by the addition of hydrogen to passivate dislocation defects. A chamber and a UV light source are provided. The UV light source is configured to provide UV radiation within the chamber. The optoelectric device, which may comprise a HgCdTe semiconductor, is placed into the chamber and may be held in position by a sample holder. Hydrogen gas is introduced into the chamber. The material is irradiated within the chamber by the UV light source with the device and hydrogen gas present within the chamber to cause absorption of the hydrogen into the material.

Abstract: Provided is a method for producing an SOI substrate having a thick-film SOI layer, in which an ion-implanted layer is formed by implanting at least one kind of ion of hydrogen ion and a rare gas ion into a surface of a bond wafer, an SOI substrate having an SOI layer is produced by, after the ion-implanted surface of the bond wafer and a surface of a base wafer are bonded together via an oxide film, delaminating the bond wafer along the ion-implanted layer, heat treatment is performed on the SOI substrate having the SOI layer in a reducing atmosphere containing hydrogen or an atmosphere containing hydrogen chloride gas, and, after the surface of the SOI layer is polished by CMP, a silicon epitaxial layer is grown on the SOI layer of the SOI substrate.

Abstract: Provided is an organic light emitting display, in which a semiconductor circuit unit of 2T-1C structure including a switching transistor and a driving transistor formed of single crystalline silicon is formed on a plastic substrate. A method of fabricating the single crystalline silicon includes: growing a single crystalline silicon layer to a predetermined thickness on a crystal growth plate; depositing a buffer layer on the single crystalline silicon layer; forming a partition layer at a predetermined depth in the single crystalline silicon layer by, e.g., implanting hydrogen ions in the single crystalline silicon layer from an upper portion of an insulating layer; attaching a substrate to the buffer layer; and releasing the partition layer of the single crystalline silicon layer by heating the partition layer from the crystal growth plate to obtain a single crystalline silicon layer of a predetermined thickness on the substrate.

Abstract: A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an H2 gas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.

Abstract: A method of cleaning a semiconductor substrate conductive layer surface that can remove a residual organic material and a natural oxide satisfactorily and does not adversely affect a k value without damaging the side-wall insulation film of a via hole. A semiconductor device, including insulation films formed on the surface of a conductive layer of a semiconductor substrate and a via hole formed in an insulation film to partly expose the conductive layer, is carried into a reaction vessel, plasma including hydrogen is generated in the reaction vessel to clean the surface of the conductive layer at the bottom of the via hole, a residual organic material is decomposed and removed by ashing, and a copper oxide film on the surface of the conductive layer is reduced to Cu.

Abstract: A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer.

Abstract: A method for the selective removal of a high-k layer such as HfO2 over silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BCl3 plasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BCl3 comprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl3/N2 plasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero.

Abstract: An annealing method of a zinc oxide thin film, comprises loading a substrate coated with a zinc oxide thin film into a chamber, allowing a hydrogen gas to be flowed into the chamber, fixing pressure in the chamber and annealing the zinc oxide thin film using the hydrogen gas in the chamber.