Of Group Iii-v Compound, E.g., To Make Them Semi-insulating (epo) Patents (Class 257/E21.322)
  • Patent number: 8980728
    Abstract: A method of manufacturing a semiconductor apparatus is disclosed. A first-type doped layer, a second-type doped layer, and an internal electrical connection layer are formed. The internal electrical connection layer is deposited and electrically coupled between the first-type doped layer and the second-type doped layer. In one embodiment, the internal electrical connection layer is formed by using a group IV based precursor and nitrogen based precursor. In another embodiment, the internal electrical connection layer is formed by a mixture comprising a carbon-contained doping source, and the internal electrical connection layer has a carbon concentration greater than 1017 atoms/cm3. In a further embodiment, the internal electrical connection layer is formed at a temperature lower than those of the first-type doped layer and the second-type doped layer.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: March 17, 2015
    Assignee: Phostek, Inc.
    Inventors: Yen-Chang Hsieh, Jinn Kong Sheu, Heng Liu, Chun-Chao Li, Ya-Hsuan Shih, Chia-Nan Chen
  • Patent number: 8884336
    Abstract: A light emitting device according to the embodiment includes a first electrode; a light emitting structure including a first semiconductor layer over the first electrode, an active layer over the first semiconductor layer, and a second semiconductor layer over the second semiconductor layer; a second electrode over the second semiconductor layer; and a connection member having one end making contact with the first semiconductor layer and the other end making contact with the second semiconductor layer to form a schottky contact with respect to one of the first and second semiconductor layers.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: November 11, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Patent number: 8294182
    Abstract: A light emitting device according to the embodiment includes a first electrode; a light emitting structure including a first semiconductor layer over the first electrode, an active layer over the first semiconductor layer, and a second semiconductor layer over the second semiconductor layer; a second electrode over the second semiconductor layer; and a connection member having one end making contact with the first semiconductor layer and the other end making contact with the second semiconductor layer to form a schottky contact with respect to one of the first and second semiconductor layers.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: October 23, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Publication number: 20120040511
    Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1?x?yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.
    Type: Application
    Filed: October 25, 2011
    Publication date: February 16, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Seiji NAKAHATA, Ryu Hirota, Kensaku Motoki, Takuji Okahisa, Kouji Uematsu
  • Publication number: 20110024747
    Abstract: The invention provides methods which can be applied during the epitaxial growth of two or more layers of Group III-nitride semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects interact with a protective layer of a protective material to form amorphous complex regions capable of preventing the further propagation of defects and dislocations. The invention also includes semiconductor structures fabricated by these methods.
    Type: Application
    Filed: November 14, 2008
    Publication date: February 3, 2011
    Applicant: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Chantal Arena, Subhash Mahajan
  • Publication number: 20090256240
    Abstract: The present invention discloses a production method for group III nitride ingots or pieces such as wafers. To solve the coloration problem in the wafers grown by the ammonothermal method, the present invention composed of the following steps; growth of group III nitride ingots by the ammonothermal method, slicing of the ingots into wafers, annealing of the wafers in a manner that avoids dissociation or decomposition of the wafers. This annealing process is effective to improve transparency of the wafers and/or otherwise remove contaminants from wafers.
    Type: Application
    Filed: February 25, 2009
    Publication date: October 15, 2009
    Inventors: Tadao HASHIMOTO, Edward Letts, Masanori Ikari