Abstract: Exemplary processing methods of forming an LED structure may include depositing an aluminum nitride layer on a substrate via a physical vapor deposition process. The methods may include heating the aluminum nitride layer to a temperature greater than or about 1500° C. The methods may include forming an ultraviolet light emitting diode structure overlying the aluminum nitride layer utilizing a metal-organic chemical vapor deposition or molecular beam epitaxy.

Abstract: In this photoelectric conversion element wherein group III-IV compound semiconductor single crystals containing zinc as an impurity are used as a substrate, the substrate is increased in size without lowering conversion efficiency. A heat-resistant crucible is filled with raw material and a sealant, and the raw material and sealant are heated, thereby melting the raw material into a melt, softening the encapsulant, and covering the melt from the top with the encapsulant. The temperature inside the crucible is controlled such that the temperature of the top of the encapsulant relative to the bottom of the encapsulant becomes higher in a range that not equal or exceed the temperature of bottom of the encapsulant, and seed crystal is dipped in the melt and pulled upward with respect to the melt, thereby growing single crystals from the seed crystal.

Abstract: The magnetic characteristics of a magnetoresistive device are improved by rendering magnetic debris non-magnetic during processing operations. Further improvement is realized by annealing the partially- or fully-formed device in the presence of a magnetic field in order to eliminate or stabilize magnetic micro-pinning sites or other magnetic abnormalities within the magnetoresistive stack for the device. Such improvement in magnetic characteristics decreases deviation in switching characteristics in arrays of such magnetoresistive devices such as those present in MRAMs.

Abstract: The disclosure provides a process to anneal group III-V metal nitride crystals, wafers, epitaxial layers, and epitaxial films to reduce nitrogen vacancies. In particular, the disclosure provides a process to perform slow annealing of the group III-V metal nitrides in a high temperature and high pressure environment.

Abstract: A nitride-based semiconductor light emitting device having a structure capable of improving optical output performance, and methods of manufacturing the same are provided. The active layer may include a first barrier layer formed of InxGa(1-x)N (0.01?x?0.05) on a n-type semiconductor layer, a first diffusion barrier layer formed of InyGa(1-y)N (0?y<0.01) on the first barrier layer, and doped with an anti-defect agent including at least one of an N (nitrogen) element and a Si (silicon) element, a quantum well layer formed of InzGa(1-z)N (0.25?z?0.35) on the first diffusion barrier layer, a second diffusion barrier layer formed of InyGa(1-y)N (0?y<0.01) on the quantum well layer, and doped with an anti-defect agent including at least one of an N element and a Si element, and a second barrier layer formed of InxGa(1-x)N (0.01?x?0.05) on the second diffusion barrier layer.

Abstract: Provided is a method for controllably activating a surface for stable amine-reactive chemistries. A surface containing nitride is exposed to a plasma having a reactive species containing hydrogen for a period of time sufficient to activate the substrate for amine-reactive chemistries. Amine-reactive chemical processes can then be applied to the activated surface to reliably and controllably bond molecules directly to said surface. The method is designed to create stable primary amines on the nitride substrate, so that any subsequent amine-reactive chemistry may proceed in a controlled manner that is directly proportional to the density of surface amines so created.

Abstract: Si atoms obtained by thermal decomposition of SiH4 are adsorbed in advance on one surface of a semiconductor substrate and side surfaces of a semiconductor mesa part. Thereby, prior to the growth of a buried layer, a diffusion protection layer composed of Si-doped InP with high impurity concentration is formed. As a result, when the buried layer is grown, Zn diffusing from an upper cladding layer is trapped by the diffusion protection layer, and interdiffusion between Zn and Fe is inhibited. Since the diffusion protection layer is formed uniformly at a small thickness of several monolayers, the diffusion protection layer is also inhibited from becoming a current leakage path. Consequently, the reliability of the semiconductor optical device can be improved.

Abstract: In the image TFT array structure, at least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first conductive layer. At least one second line intersecting the first line, an upper electrode corresponding to the lower electrode, a second electrode connected with the second line and a third electrode connected with the upper electrode are defined simultaneously by etching a second conductive layer applied to cover the substrate and above the first conductive layer. The lower electrode and the upper electrode of the storage capacitor have an approximately same large area.

Abstract: A method for manufacturing a semiconductor optical device comprises: forming a groove on a first semiconductor layer; forming a second semiconductor layer containing aluminum in the groove; forming a third semiconductor layer on the first semiconductor layer and the second semiconductor layer; forming an insulating layer on the third semiconductor layer covering the region opposite the second semiconductor layer; forming a stripe-shaped structure by etching the first semiconductor layer and the third semiconductor layer without exposing the second semiconductor layer, using the insulating layer as a mask; and burying the stripe-shaped structure with burying layers.

Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvin for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.

Abstract: Provided is a nitride-based semiconductor light emitting device having increased efficiency and power characteristics and method of manufacturing the same. The method may include forming a sacrificial layer on a substrate, forming a passivation layer on the sacrificial layer, forming a plurality of masking dots of a metal nitride on the passivation layer, laterally epitaxially growing a nitride-based semiconductor layer on the passivation layer using the masking dots as masks, forming a semiconductor device on the nitride-based semiconductor layer, and wet etching the sacrificial layer to separate and/or remove the substrate from the semiconductor device.