Abstract: The invention discloses a semiconductor structure comprising: a substrate, a conductor layer, and a dielectric layer surrounding the conductor layer on the substrate; a first insulating layer covering both of the conductor layer and the dielectric layer; a gate conductor layer formed on the first insulating layer, and a dielectric layer surrounding the gate conductor layer; and a second insulating layer covering both of the gate conductor layer and the dielectric layer surrounding the gate conductor layer; wherein a through hole filled with a semiconductor material penetrates through the gate conductor layer perpendicularly, the bottom of the through hole stops on the conductor layer, and a first conductor plug serving as a drain/source electrode is provided on the top of the through hole; and a second conductor plug serving as a source/drain electrode electrically contacts the conductor layer, and a third conductor plug serving as a gate electrode electrically contacts the gate conductor layer.

Abstract: A field-effect transistor includes a semi-insulating substrate, a source electrode, a drain electrode, a gate electrode, the electrodes being provided on the semi-insulating substrate, and a buried gate region which is provided under the gate electrode and in which an impurity is doped, wherein a concave slit is provided in the semi-insulating substrate, the slit being located between the gate electrode and the drain electrode and being adjacent to the buried gate region at the side of the drain electrode.

Abstract: A method for manufacturing a compound semiconductor device forms an EB resist layer on first SiN film, performs EB exposure at high dose for recess forming opening and at low dose for eaves removing opening, develops the high dose EB resist pattern to etch the first SiN film, selectively etches the cap layer to form a recess wider than the opening of the first SiN film leaving eaves of SiN, develops the low dose EB resist pattern to form the eaves removing opening, etches the first SiN film to extinguish the eaves, forms second SiN film on the exposed surface, forms a resist pattern having a gate electrode opening on the second SiN film to etch the second SiN film, forms a metal layer to form a gate electrode by lift-off. The SiN film in eaves shape will not be left.

Abstract: A Light Modulating sensing MOSFET transistor includes: a substrate receiving light radiation, the substrate having two source and drain areas separated by a channel extending along a first direction; a gate conductive beam extending along a second direction being substantially perpendicular to the first direction, the beam being fixed at each of its two opposite ends on at least one supporting area and being located above the channel area, the gate beam being substantially opaque and flexible so as to perform progressive modulation of the light reaching the channel in accordance with its bending controlled by the difference of voltage between the gate and the bulk and causing the beam to bend and to come closer to the surface of the channel. A process for manufacturing a light Modulating sensing MOSFET transistor is also provided.

Abstract: A separative extended gate field effect transistor based vitamin C sensor includes: a substrate; a patterned conductive layer on the substrate, including a first electrode region array, at least two first contact regions, a second electrode region and a second contact region; a graphite-based paste layer on the first electrode region array; a ruthenium dioxide sensing layer on the graphite-based paste layer and electrically connected to the first contact region; a vitamin C enzyme layer on the ruthenium dioxide sensing layer; and a reference electrode on the second electrode region electrically connected to the second contact region.

Abstract: A field effect type semiconductor device is disclosed wherein a channel is easily depleted just under a gate electrode to implement an E-mode, but a channel is hard to be depleted just under a gate recess region so that the transconductance gm and the cutoff frequency fT can be set to sufficiently high values. The present device includes a first etching stop layer Schottky contacting with an end face of the gate electrode and a second etching stop layer extending to a position in the proximity of a side face of the gate electrode. The first etching stop layer is formed from a material which is easily depleted (one of materials of a group including InAlP, InP, InAsP, InSbP, InAlAsP, and InAlSbP), and the second etching stop layer is formed from a material which is hard to be depleted (one of materials of a group including InGaP, InGaAsP, InGaSbP).

Abstract: A dual gate power switch comprised of a vertical arrangement of a normally off SIT (static induction transistor) in series with a normally on SIT in a monolithic semiconductor structure. The structure includes a first pillar having at the base thereof laterally extending shoulder portions having sections of a first gate for controlling the normally off SIT. The structure includes a second pillar, of a width greater than the first pillar and which also has laterally extending shoulder portions having sections of a second gate for controlling the normally on SIT. Contacts are provided for SIT operation.

Abstract: Gallium nitride material devices and methods associated with the same. In some embodiments, the devices may be transistors which include a conductive structure connected to a source electrode. The conductive structure may form a source field plate which can be formed over a dielectric material and can extend in the direction of the gate electrode of the transistor. The source field plate may reduce the electrical field (e.g., peak electrical field and/or integrated electrical field) in the region of the device between the gate electrode and the drain electrode which can lead to a number of advantages including reduced gate-drain feedback capacitance, reduced surface electron concentration, increased breakdown voltage, and improved device reliability. These advantages enable the gallium nitride material transistors to operate at high drain efficiencies and/or high output powers. The devices can be used in RF power applications, amongst others.