Abstract: A semiconductor device includes a III-V compound semiconductor layer and a source/drain structure. The source/drain structure is disposed on the III-V compound semiconductor layer. The source/drain structure includes a metal layer and metal silicide patterns. The metal layer is disposed on the metal silicide patterns, and a portion of the metal layer is disposed between the metal silicide patterns adjacent to each other.

Abstract: A GaN-based high electron mobility transistor (HEMT) device includes a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate, a drain contact and a source contact on the barrier layer, and a gate contact on the barrier layer between the drain contact and the source contact. A sheet resistance of a drain access region and/or a source access region of the semiconductor structure is between 300 and 400 ?/sq.

Abstract: A dual gate power switch comprised of a vertical arrangement of a normally off SIT (static induction transistor) in series with a normally on SIT in a monolithic semiconductor structure. The structure includes a first pillar having at the base thereof laterally extending shoulder portions having sections of a first gate for controlling the normally off SIT. The structure includes a second pillar, of a width greater than the first pillar and which also has laterally extending shoulder portions having sections of a second gate for controlling the normally on SIT. Contacts are provided for SIT operation.