Abstract: By repeatedly applying a process sequence comprising an etch process and a selective epitaxial growth process during the formation of drain and source areas in a transistor device, highly complex dopant profiles may be generated on the basis of in situ doping. Further-more, a strain material may be provided while stress relaxation mechanisms may be reduced due to the absence of any implantation processes.
Type:
Application
Filed:
February 27, 2009
Publication date:
December 3, 2009
Inventors:
Anthony Mowry, Andy Wei, Andreas Gehring, Casey Scott
Abstract: A photovoltaic device having a first electrode layer, a high resistivity transparent film disposed on the first electrode, a second electrode layer, and an inorganic photoactive layer disposed between the first and second electrode layers, wherein the inorganic photoactive layer is disposed in at least partial electrical contact with the high resistivity transparent film, and in at least partial electrical contact with the second electrode. The photoactive layer has a first inorganic material and a second inorganic material different from the first inorganic material, wherein the first and second inorganic materials exhibit a type II band offset energy profile, and wherein the photoactive layer has a first population of nanostructures of a first inorganic material and a second population of nanostructures of a second inorganic material.
Type:
Application
Filed:
October 20, 2006
Publication date:
September 3, 2009
Inventors:
Paul A. Alivisatos, Ilan Gur, Delia Milliron
Abstract: A process for producing metal nitride thin films comprising doping the metal nitride thin films by atomic layer deposition (ALD) with silicon or boron or a combination thereof. The work function of metal nitride thin films, which are used in metal electrode applications, can efficiently be tuned.
Abstract: An embodiment of the invention provides a substrate. The substrate comprises a single crystal substrate. An epitaxial buffer film is on the single crystal substrate. An epitaxial ZnGa2O4 is on the epitaxial buffer film.
Type:
Grant
Filed:
January 25, 2007
Date of Patent:
July 7, 2009
Assignee:
Industrial Technology Research Institute
Abstract: There is provided a method of manufacturing a nitride semiconductor light emitting device. A method of manufacturing a nitride semiconductor light emitting device according to an aspect of the invention may include: nitriding a surface of an m-plane sapphire substrate; forming a high-temperature buffer layer on the m-plane sapphire substrate; depositing a semi-polar (11-22) plane nitride thin film on the high-temperature buffer layer; and forming a light emitting structure including a first nitride semiconductor layer, an active layer, and a second nitride semiconductor layer on the semi-polar (11-22) plane nitride thin film.
Type:
Application
Filed:
November 21, 2008
Publication date:
May 28, 2009
Inventors:
Ho Sun Paek, Sung Nam Lee, Tan Sakong, Youn Joon Sung, In Hoe Hur
Abstract: A Cd1-xZnxS film material, with a high value of thermal coefficient of resistance, in the range of 1.5% to 3.7%. The Cd1-xZnxS material has excellent characteristics for use in a microbolometer-type uncooled infrared sensor. The film material can be deposited on microbolometer membranes or any other wafer for different applications. The film material can be deposited using the MOCVD technique, thermal evaporation or a different technique to form the film material over the wafer. The Cd1-xZnxS properties can be modified controlling certain deposition parameters and different annealing techniques. The process is performed at temperature compatible with CMOS technology.
Type:
Grant
Filed:
December 6, 2005
Date of Patent:
May 5, 2009
Assignee:
Technion Research & Development Foundation Ltd.
Inventors:
Sara Stolyarova, Yehuda Sinai, Moshe Weinstein, Avi Shai, Yael Nemirovsky
Abstract: Provided is a phase-change random access memory (PRAM). The PRAM includes a bottom electrode, a bottom electrode contact layer, which is formed on one area of the bottom electrode, and an insulating layer, which is formed on a side of the bottom electrode contact layer, a phase-change layer, which is formed on the bottom electrode contact layer and the insulating layer and is formed of a phase-change material having a crystallization temperature between 100° C. and 150° C., and a top electrode, which is formed on the phase-change layer.
Type:
Application
Filed:
March 6, 2008
Publication date:
February 26, 2009
Inventors:
Cheol-kyu Kim, Yoon-ho Khang, Tae-yon Lee
Abstract: A structure including a substrate, an intermediate layer provided and formed directly onto the substrate, a transition region, and a group II-VI bulk crystal material provided and formed as an extension of the transition region. The transition region acts to change the structure from the underlying substrate to that of the bulk crystal. In a method of manufacture, a similar technique can be used for growing the transition region and the bulk crystal layer.
Type:
Application
Filed:
December 21, 2006
Publication date:
February 26, 2009
Applicant:
DURHAM SCIENTIFIC CRYSTALS LIMITED
Inventors:
Arnab Basu, Max Robinson, Ben Cantwell, Andy Brinkman
Abstract: This invention provides a method for forming a microcrystalline silicon film, which employs a three-stage deposition process to form a microcrystalline film. A microcrystalline silicon seed layer is formed on a substrate. Gaseous ions are used to bombard a surface of the microcrystalline silicon seed layer. Microcrystalline silicon is formed on the microcrystalline silicon seed layer after the bombardment to a predetermined thickness.
Abstract: An embodiment of the invention provides a substrate. The substrate comprises a single crystal substrate. An epitaxial buffer film is on the single crystal substrate. An epitaxial ZnGa2O4 is on the epitaxial buffer film.
Type:
Application
Filed:
September 9, 2008
Publication date:
January 1, 2009
Applicant:
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Abstract: Provided are a method of forming an oxide semiconductor layer and a method of manufacturing a semiconductor device using the method of forming an oxide semiconductor layer. The method may include mounting an oxide semiconductor target in a chamber; loading a substrate into the chamber; vacuuming the chamber; applying a direct current power to the oxide semiconductor target while injecting oxygen and a sputtering gas into the chamber; and forming an oxide semiconductor layer on a surface of the substrate by applying plasma of the sputtering gas onto the oxide semiconductor target. Here, the oxide semiconductor target may have a resistance of 1 k? or less. The oxide semiconductor target may have a composition of x(first oxide).y(second oxide).z(third oxide) where x, y and z are molar ratios. Each of the first through third oxides may be one of Ga2O3, HfO2, In2O3, and ZnO but different from each other. The oxide semiconductor target may be one of Ga2O3, HfO2, In2O3, and ZnO.
Abstract: A biased pulse DC reactor for sputtering of oxide films is presented. The biased pulse DC reactor couples pulsed DC at a particular frequency to the target through a filter which filters out the effects of a bias power applied to the substrate, protecting the pulsed DC power supply. Films deposited utilizing the reactor have controllable material properties such as the index of refraction. Optical components such as waveguide amplifiers and multiplexers can be fabricated using processes performed on a reactor according to the present invention.
Type:
Grant
Filed:
September 16, 2005
Date of Patent:
August 19, 2008
Assignee:
SpringWorks, LLC
Inventors:
Hongmei Zhang, Mukundan Narasimhan, Ravi B. Mullapudi, Richard E. Demaray
Abstract: A biased pulse DC reactor for sputtering of oxide films is presented. The biased pulse DC reactor couples pulsed DC at a particular frequency to the target through a filter which filters out the effects of a bias power applied to the substrate, protecting the pulsed DC power supply. Films deposited utilizing the reactor have controllable material properties such as the index of refraction. Optical components such as waveguide amplifiers and multiplexers can be fabricated using processes performed on a reactor according to the present inention.
Type:
Grant
Filed:
October 1, 2004
Date of Patent:
June 3, 2008
Assignee:
SpringWorks, LLC
Inventors:
Hongmei Zhang, Mukundan Narasimhan, Ravi B. Mullapudi, Richard E. Demaray
Abstract: A method is provided for forming a rare earth (RE) element-doped silicon (Si) oxide film with nanocrystalline (nc) Si particles. The method comprises: providing a first target of Si, embedded with a first rare earth element; providing a second target of Si; co-sputtering the first and second targets; forming a Si-rich Si oxide (SRSO) film on a substrate, doped with the first rare earth element; and, annealing the rare earth element-doped SRSO film. The first target is doped with a rare earth element such as erbium (Er), ytterbium (Yb), cerium (Ce), praseodymium (Pr), or terbium (Tb). The sputtering power is in the range of about 75 to 300 watts (W). Different sputtering powers are applied to the two targets. Also, deposition can be controlled by varying the effective areas of the two targets. For example, one of the targets can be partially covered.
Type:
Grant
Filed:
January 18, 2006
Date of Patent:
November 20, 2007
Assignee:
Sharp Laboratories of America, Inc.
Inventors:
Wei Gao, Tingkai Li, Robert A. Barrowcliff, Yoshi Ono, Sheng Teng Hsu