Abstract: Upon fixing fine particulate active element members, which are carbon nanotube, rod-shaped semiconductor crystal, or the like, in an electronic device at predetermined positions thereof respectively, a method for producing an electronic device includes: dispersing the fine particulate active element members in a dielectric liquid and filling the liquid in a space between a process-objective substrate and a mask which is placed opposite to the substrate and which has predetermined pattern electrodes formed therein; and applying a predetermined voltage to the predetermined electrodes to concentrate the fine particulate active element members at positions which correspond to positions of the pattern electrodes, respectively. In this state, a light is irradiated to the substrate and the fine particulate active element members in the liquid so as to fix the fine particulate active element members to the substrate by a photochemical reaction.

Abstract: A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and may have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1.

Abstract: A thin film transistor comprises a zinc-oxide-containing semiconductor material. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating a thin film transistor device, wherein the substrate temperature is no more than 300° C. during fabrication.

Abstract: A method for forming a semiconductor thin film includes the steps of applying an inorganic semiconductor fine particle-dispersion solution on a substrate and drying the coating to form a semiconductor fine particle layer, and immersing the semiconductor fine particle layer in a solution to form a semiconductor thin film.

Abstract: This invention relates to a method for producing group IB-IIA-VIA quaternary or higher alloy semiconductor films wherein the method comprises the steps of (i) providing a metal film comprising a mixture of group IB and group IIIA metals; (ii) heat treating the metal film in the presence of a source of a first group VIA element (said first group VIA element hereinafter being referred to as VIA1) under conditions to form a first film comprising a mixture of at least one binary alloy selected from the group consisting of a group IB-VIA1 alloy and a group IIIA-VIA1 alloy and at least one group IB-IIIA-VIA1 ternary alloy (iii) optionally heat treating the first film in the presence of a source of a second group VIA element (said second group VI element hereinafter being referred to as VIA2) under conditions to convert the first film into a second film comprising at least one alloy selected from the group consisting of a group IB-VIA1-VIA2 alloy and a group IIIA-VIA1-VIA2 alloy; and the at least one group IB-III-VI

Abstract: A method for fabricating DRAM cells, e.g., dynamic random access memory cells. The method includes providing a semiconductor substrate, e.g., silicon wafer. The method includes forming a plurality of NMOS transistor gate structures. Each of the NMOS gate structures includes an NMOS source region and an NMOS drain region and a plurality of PMOS gate structures. Each of the PMOS gate structures includes a PMOS source region and a PMOS drain region. The NMOS gate structures are formed on P-type well regions and the PMOS gate structures are formed on N-type well regions. An interlayer dielectric layer is overlying each of the gate structures while filling a gap between two or more of the NMOS gate structures.

Abstract: A room temperature operation polycrystalline infrared responsive photodetector, manufactured by a process, comprising the steps of patterning vacuum-deposited material and dry-etching a photonic crystal structure with resonant coupling tuned to long wavelengths.

Abstract: A method for fabricating a liquid crystal display (LCD) device includes: forming a gate line, a gate electrode, and a gate pad electrode on a substrate; sequentially forming a gate insulating layer, a semiconductor layer and a metal layer on an entire surface of the substrate including the gate electrode; forming a first photoresist on the metal layer; patterning the semiconductor layer, a data line, source and drain electrodes, and a data pad electrode by selectively etching the gate insulating layer, the semiconductor layer, and the metal layer using the first photoresist as a mask; forming a second photoresist to cover the gate pad electrode; forming a passivation layer on an entire surface of the substrate including the first and second photoresists; removing the passivation layer on the first and second photoresists by lift-stripping the first and second photoresists; and forming a pixel electrode electrically connected to the drain electrode.

Abstract: A system and method affecting mass transport to reduce or eliminate iso-dense bias in spin-on-dielectric (SOD) or spin-on-glass (SOG) processes use a nozzle to dispense the liquid dielectric and a separate nozzle for jetting N2 or other gas onto a semiconductor wafer. The gas is jetted onto the wafer shortly after spin-on-dielectric liquid is dispensed. The jetting of the gas in the spin-coating process increases the volumetric flow of the liquid coating material in the radial direction, which in turn reduces the field thickness above isolated or no patterned areas to that at the more densely patterned areas, thereby improving the uniformity of the spun-on dielectric thickness on the wafer.

Abstract: Aspects of the invention provide a manufacturing method enabling a fine layer pattern to form it precisely and stably. An exemplary method for manufacturing a layer pattern can include a step (a) of forming a region defined by a first layer and a second layer on a substrate and a step (b) of ejecting a liquid like material to the region from an ejecting part of an ejecting device. Here, the first layer can be formed on the substrate and the second layer can be located on the first layer. A lyophobicity of the first layer to the liquid like material is lower than the lyophobicity of the second layer to the liquid like material.

Abstract: Temperature-sensing compositions can include an inorganic material, such as a semiconductor nanocrystal. The nanocrystal can be a dependable and accurate indicator of temperature. The intensity of emission of the nanocrystal varies with temperature and can be highly sensitive to surface temperature. The nanocrystals can be processed with a binder to form a matrix, which can be varied by altering the chemical nature of the surface of the nanocrystal. A nanocrystal with a compatibilizing outer layer can be incorporated into a coating formulation and retain its temperature sensitive emissive properties.

Abstract: An insulating layer (5) and a conductive seed layer (6) are applied to a substrate (1) in a simple process. A photo resist with palladium chloride are provided in a bath for electrophoretic deposition onto the substrate. The photo resist is an insulator and the palladium chloride is a catalyst. The layer is heated with UV to cure it. The layer is plasma etched to expose more of the palladium chloride, which acts as a catalyst for electrodes plating of the conductive seed layer. A thicker conductive layer (7) is then electroplated onto the seed layer. These steps may be repeated for successive insulating and/or conductive layers.

Abstract: A process for producing light-emitting devices, particularly OLEDs, which saves material and produces a homogeneous light-emitting layer, is provided. The process involves applying layers to a substrate so as to produce a layer assembly, including the steps of 1) applying an electrode, 2) producing a surface with depressions, and 3) applying organic light-emitting material that is introduced into the depressions.