For Tft (epo) Patents (Class 257/E29.151)
  • Patent number: 7968388
    Abstract: A method for manufacturing a thin-film device includes forming a separation layer on a substrate, forming a base insulating layer on the separation layer, forming a thin-film device layer on the base insulating layer, bonding a transfer layer including the base insulating layer and the thin-film device layer to a transfer body with an adhesive, causing intralayer delamination or interfacial delamination in the separation layer, and removing the transfer layer from the substrate. The thin-film device layer includes a first wiring sublayer which is located at the bottom of the thin-film device layer and which is in contact with the base insulating layer, a dielectric sublayer which is in contact with a surface of the first wiring sublayer, a semiconductor sublayer electrically insulated from the first wiring sublayer with the dielectric sublayer, and a second wiring sublayer formed subsequently to the semiconductor sublayer.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: June 28, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Yuko Komatsu
  • Patent number: 7964871
    Abstract: A thin-film transistor including a channel layer being formed of an oxide semiconductor transparent to visible light and having a refractive index of nx, a gate-insulating layer disposed on one face of the channel layer, and a transparent layer disposed on the other face of the channel layer and having a refractive index of nt, where there is a relationship of nx>nt. A thin-film transistor including a substrate having a refractive index of no, a transparent layer disposed on the substrate and having a refractive index of nt, and a channel layer disposed on the transparent layer and having a refractive index of nx, where there is a relationship of nx>nt>no.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: June 21, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tatsuya Iwasaki
  • Patent number: 7955907
    Abstract: An object of the invention is to provide a method for manufacturing a substrate having a film pattern such as an insulating film, a semiconductor film, or a conductive film with an easy process, and further, a semiconductor device and a television set having a high throughput or a high yield at low cost and a manufacturing method thereof. One feature of the invention is that a first film pattern is formed by a droplet discharge method, a photosensitive material is discharged or applied to the first film pattern, a mask pattern is formed by irradiating a region where the first film pattern and the photosensitive material are overlapped with a laser beam and by developing, and a second film pattern having a desired shape is formed by etching the first film pattern using the mask pattern as a mask.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: June 7, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hironobu Shoji, Yasuyuki Arai
  • Patent number: 7956948
    Abstract: A pixel structure formed on a substrate and electrically connected with a scan line and a data line, and including a semiconductor pattern and a pixel electrode is provided. The semiconductor pattern includes at least two channel areas, at least one doping area, a source area, and a drain area. The channel areas are located below the scan line and have different aspect ratios. The doping area is connected between the channel areas. The pixel electrode electrically connects the drain area, the source area is connected between one of the channel areas and the data line, and the drain area is connected between the other channel area and the pixel electrode. The scan line has different widths above different channel areas, and a length of each channel area is substantially equal to the width of the scan line.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: June 7, 2011
    Assignee: Au Optronics Corporation
    Inventors: Chia-Chiang Hsiao, Cheng Lo, Chih-Jen Hu
  • Patent number: 7952093
    Abstract: The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: May 31, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 7952101
    Abstract: The present invention has an object of providing a light emitting device including an OLED formed on a plastic substrate, which can prevent the degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light emitting layer in the OLED (hereinafter, referred to as barrier films) and a film having a smaller stress than that of the barrier-films (hereinafter, referred to as a stress relaxing film), the film being interposed between the barrier films, are provided. Owing to a laminate structure of a plurality of barrier films, even if a crack occurs in one of the barrier films, the other barrier film(s) can effectively prevent moisture or oxygen from penetrating into the organic light emitting layer. Moreover, the stress relaxing film, which has a smaller stress than that of the barrier films, is interposed between the barrier films, thereby making it possible to reduce a stress of the entire sealing film.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: May 31, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mai Akiba
  • Patent number: 7952102
    Abstract: In a display device which forms thin film transistors on a substrate, the thin film transistor includes an n-type thin film transistor and a p-type thin film transistor, a gate electrode of one thin film transistor out of the n-type thin film transistor and the p-type thin film transistor forms a metal layer made of a material different from the gate electrode on a gate-insulation-film side thereof, and an LDD layer is formed over a semiconductor layer of at least one of the n-type thin film transistor and the p-type thin film transistor.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: May 31, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Eiji Oue, Toshio Miyazawa
  • Patent number: 7947985
    Abstract: A thin film transistor array substrate and its manufacturing method are disclosed. A thin film transistor (TFT) includes a gate electrode formed on a substrate, and source and drain electrodes formed on the gate electrode and separated from each other. A common line made of the same material as the gate electrode is formed on the substrate. A storage capacitor includes a storage electrode connected with a storage electrode line and a pixel electrode formed on the storage electrode. The storage electrode and the pixel electrode are formed by patterning a transparent conductive film, and accordingly, light can be transmitted through the region where the storage capacitor is formed to thus increase an aperture ratio.
    Type: Grant
    Filed: May 5, 2009
    Date of Patent: May 24, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Cheol Kim, Woong-Kwon Kim, Sang-Youn Han, In-Woo Kim, Ho-Jun Lee, Byeong-Jae Ahn
  • Patent number: 7943405
    Abstract: A liquid crystal display panel and a fabricating method thereof comprising an image sensing capability, image scanning, and touch inputting. In the liquid crystal display device, a gate line and a data line are formed to intersect each other on a substrate to define a pixel area in which a pixel electrode is positioned. A first thin film transistor is positioned at an intersection area of the gate line and the data line. A sensor thin film transistor senses light having image information and supplied with a first driving voltage from the data line. A driving voltage supply line is positioned in parallel to the gate line to supply a second driving voltage to the sensor thin film transistor.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: May 17, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Hee Kwang Kang, Kyo Seop Choo
  • Publication number: 20110108920
    Abstract: A device and method for fabrication of fin devices for an integrated circuit includes forming fin structures in a semiconductor material of a semiconductor device wherein the semiconductor material is exposed on sidewalls of the fin structures. A donor material is epitaxially deposited on the exposed sidewalls of the fin structures. A condensation process is applied to move the donor material through the sidewalls into the semiconductor material such that accommodation of the donor material causes a strain in the semiconductor material of the fin structures. The donor material is removed, and a field effect transistor is formed from the fin structure.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 12, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: VEERARAGHAVAN S. BASKER, Kangguo Cheng, Bruce B. Doris, Johnathan E. Faltermeier, Ali Khakifirooz
  • Patent number: 7939829
    Abstract: A semiconductor device can easily reduce a leak current which flows when a reversely-staggered-type TFT element in which an active layer is made of polycrystalline semiconductor is turned off. The semiconductor device includes a reversely-staggered-type TFT element in which a semiconductor layer, a source electrode and a drain electrode are arranged on a surface of an insulation film, and a portion of the source electrode and a portion of the drain electrode respectively get over the semiconductor layer.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: May 10, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventor: Takeshi Sakai
  • Patent number: 7935578
    Abstract: The present invention relates to a TFT, a TFT array panel, and a method of manufacturing the TFT array panel. A method of manufacturing the TFT array panel includes the steps of forming a first electrode and a second electrode that are separated from each other on a substrate, forming a silicon layer including amorphous silicon and polycrystalline silicon on the substrate, forming a semiconductor by patterning the silicon layer, forming a gate insulating layer on the semiconductor, forming a third electrode that is opposite to the semiconductor on the gate insulating layer, forming a passivation layer on the third electrode, and forming a pixel electrode on the passivation layer. The TFT array panel has high mobility because the TFT include polycrystalline silicon at the channel region of the TFT.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: May 3, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Hoo Choi, Joon-Chul Goh, Beohm-Rock Choi
  • Patent number: 7935580
    Abstract: A display substrate includes a gate line, a storage capacitor, a source line, a switching element, a pixel electrode, and a color filter. The gate line is formed on a base substrate. The storage capacitor has a storage line substantially parallel to the gate line. The source line crosses the gate line to define a pixel area. The switching element is connected to the gate line and the source line. The pixel electrode contacts the switching element. The color filter pattern is formed between the base substrate and the pixel electrode such that the color filter pattern contracts the base substrate and the pixel electrode. Thus, the color filter pattern is formed on the display substrate using a three-mask process.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: May 3, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Seok Oh, Shi-Yul Kim, Sang-Gab Kim, Joo-Han Kim, Hong-Kee Chin, Yu-Gwang Jeong, Seung-Ha Choi
  • Patent number: 7927930
    Abstract: A method for fabricating an LCD device includes forming an active layer having a source region, a drain region and a channel region on the first substrate; forming first and second conductive layers on the first substrate; forming a gate electrode, a gate line and a pixel electrode by patterning the first and second conductive layers, the gate electrode and the gate line being formed as a dual layer having the first and second conductive layers and the pixel electrode being formed of the first conductive layer; forming a contact hole exposing a portion of the source and drain regions; forming a source and drain electrodes electrically connected to the source and drain regions through the contact hole; and forming a liquid crystal layer between the first and second substrates.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: April 19, 2011
    Assignee: LG Display Co., Ltd.
    Inventor: Yong In Park
  • Patent number: 7928440
    Abstract: A display substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (TFT) and a pixel electrode. The gate line is extended in a first direction on the base substrate. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is extended in a second direction and intersects the gate line at an intersecting portion. At the intersecting portion, the data line is separated from the gate line by an air gap. In another embodiment, the data line also includes at least one etching hole extending to the air gap. The TFT is electrically connected to the data and the gate lines. The pixel electrode is electrically connected to the TFT.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: April 19, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Geun Lee, Jae-Hyoung Youn, Ki-Won Kim, Jong-In Kim
  • Patent number: 7928575
    Abstract: In an electronic device comprising a first electrodes consisting of a metal oxide and a second electrode consisting of an aluminum alloy film directly contacted and electrically connected to the first electrode, the contact interface between the aluminum alloy film and the first electrode is constructed so that at least a part of alloy components constituting the aluminum alloy film exist as a precipitate or concentrated layer. This construction enables direct contact between the aluminum alloy film and the electrode consisting of a metallic oxide and allows elimination of a barrier metal in such an electronic device, and manufacturing technology therefor.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: April 19, 2011
    Assignee: Kobe Steel, Ltd.
    Inventors: Hiroshi Gotoh, Toshihiro Kugimiya, Junichi Nakai, Katsufumi Tomihisa
  • Patent number: 7923311
    Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: April 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoto Kusumoto
  • Patent number: 7923782
    Abstract: Channel depth in a field effect transistor is limited by an intra-layer structure including a discontinuous film or layer formed within a layer or substrate of semiconductor material. Channel depth can thus be controlled much in the manner of SOI or UT-SOI technology but with less expensive substrates and greater flexibility of channel depth control while avoiding floating body effects characteristic of SOI technology. The profile or cross-sectional shape of the discontinuous film may be controlled to an ogee or staircase shape to improve short channel effects and reduce source/drain and extension resistance without increase of capacitance. Materials for the discontinuous film may also be chosen to impose stress on the transistor channel from within the substrate or layer and provide increased levels of such stress to increase carrier mobility. Carrier mobility may be increased in combination with other meritorious effects.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: April 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Huilong Zhu, Philip J. Oldiges, Bruce B. Doris, Xinlin Wang, Oleg Gluschenkov, Huajie Chen, Ying Zhang
  • Patent number: 7919795
    Abstract: Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper, copper solid solution layer.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: April 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Chang-Oh Jeong, Eun-Guk Lee, Do-Hyun Kim
  • Patent number: 7915650
    Abstract: A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 29, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je Hun Lee, Do Hyun Kim, Eun Guk Lee, Chang Oh Jeong
  • Patent number: 7910933
    Abstract: A dual gate layout of a thin film transistor of liquid crystal display to alleviate dark current leakage is disclosed. The layout includes (1) a polysilicon on a substrate having a L-shaped or a snake shaped from top-view, which has a heavily doped source region, a first lightly doped region, a first gate channel, a second lightly doped region, a second gate channel, a third lightly doped region and a heavily doped drain region formed in order therein; (2) a gate oxide layer formed on the polysilicon layer and the substrate, (3) a gate metal layer then formed on the gate oxide layer having a scanning line and an extension portion with a L-shaped or an I-shaped. The gate metal intersects with the polysilicon layer thereto define the forgoing gate channels. Among of gate channels, at least one is along the signal line, which is connected to the source region through a source contact.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: March 22, 2011
    Assignee: AU Optronics Corp.
    Inventors: Wein-Town Sun, Chun-Sheng Li, Jian-Shen Yu
  • Patent number: 7906781
    Abstract: A method for fabricating a liquid crystal display (LCD) device comprises forming an active pattern and a data line on a substrate, the active pattern including a source, a drain, and a channel regions; a first insulation film on a portion of the substrate; forming a gate electrode in a portion of the active pattern where the first insulation film is formed; a second insulation film on the substrate; forming a plurality of first contact holes exposing a portion of the source and drain regions and a second contact hole exposing a portion of the data line; forming a source electrode from a transparent conductive material connected to a source region within the respective first contact hole and a data line within the second contact hole; and forming a pixel and a drain electrodes from the transparent conductive material connected to a drain region within the respective first contact hole.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: March 15, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Joon-Young Yang, Yong-In Park, Sang-Hyun Kim
  • Patent number: 7902002
    Abstract: When a semi-conductor film is irradiated with conventional pulsed laser light, unevenness, which is called as ridge, is caused on the surface of the semiconductor film. In the case of a top-gate type TFT, element characteristics are changed depending on the ridge. In particular, there is a problem in that variation in the plural thin film transistors electrically connected in parallel with one another. According to the present invention, in manufacturing a circuit including plural thin film transistors, the width LP of a region (not including a microcrystal region) that is melted by irradiating a semiconductor film with light of a continuous wave laser is enlarged, and active layers of a plurality of thin film transistors (that are electrically connected in parallel with one another) are arranged in one region.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: March 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koichiro Tanaka
  • Patent number: 7897972
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: March 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 7893435
    Abstract: A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: February 22, 2011
    Assignee: E Ink Corporation
    Inventors: Peter T. Kazlas, Joanna F. Au, Yu Chen, Nathan R. Kane, David John Cole
  • Patent number: 7883942
    Abstract: Gate lines are formed on a substrate. A gate insulating layer, an intrinsic a-Si layer, an extrinsic a-Si layer, a lower film of Cr and an upper film of Al containing metal are sequentially deposited. A photoresist having thicker first portions on wire areas and thinner second portions on channel areas is formed on the upper film. The upper film on remaining areas are wet-etched, and the lower film and the a-Si layers on the remaining areas are dry-etched along with the second portions of the photoresist. The upper film, the lower film, and the extrinsic a-Si layer on the channel areas are removed. The removal of the upper film and the lower film on the channel areas are performed by wet etching, and the first portions of the photoresist are removed after the removal of the upper film on the channel areas.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: February 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-Gee Baek, Kwon-Young Choi, Young-Joon Rhee, Bong-Joo Kang, Seung-Taek Lim, Hyang-Shik Kong, Won-Joo Kim
  • Patent number: 7883921
    Abstract: The present invention relates to an OLED display and a manufacturing method thereof, including a substrate, a control electrode formed on the substrate, a polysilicon semiconductor formed on the control electrode, a data line including an input electrode at least partially overlapping the polysilicon semiconductor and an output electrode facing the input electrode, an insulating layer covering the data line and the output electrode and having a contact hole, a gate line connected to the control electrode through the contact hole, and a pixel electrode connected to the output electrode.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: February 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Moo Huh, Seung-Kyu Park, Nam-Deog Kim, Joon-Hoo Choi
  • Patent number: 7880167
    Abstract: An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen from the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: February 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
  • Patent number: 7879634
    Abstract: A process for easy production of a liquid crystal cell substrate having a TFT driver element which contributes to reducing viewing angle dependence of color of a liquid crystal display device is provided: a process using a transfer material, more preferably, a process which comprises the following steps [1] to [4] in this order: [1] transferring on a TFT substrate a transfer material having a photosensitive polymer layer and an optically anisotropic layer on a temporary support; [2] separating the temporary support from the transfer material on the TFT substrate; [3] subjecting the transfer material to light exposure on the TFT substrate; and [4] removing unnecessary parts of the photosensitive polymer layer and the optically anisotropic layer on the substrate.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: February 1, 2011
    Assignee: FUJIFILM Corporation
    Inventors: Wakahiko Kaneko, Ichiro Amimori, Hideki Kaneiwa
  • Patent number: 7875506
    Abstract: The present invention discloses technique of etching selectively a layer containing siloxane. The present invention provides a semiconductor device with reduced operation deterioration due to etching failure. A method for manufacturing a semiconductor device comprises steps of forming a conductive layer electrically connecting to a transistor, an insulating layer covering the conductive layer, and a mask formed over the insulating layer; and etching the insulating layer with a processing gas including a hydrogen bromide gas.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: January 25, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Shigeharu Monoe
  • Patent number: 7858982
    Abstract: The present invention provides a thin film transistor array panel comprising: an insulating substrate; a gate line formed on the insulating substrate and having a gate electrode; a gate insulating layer formed on the gate line; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; diffusion barriers formed on the semiconductor and containing nitrogen; a data line crossing the gate line and having a source electrode partially contacting the diffusion barriers; a drain electrode partially contacting the diffusion barriers and facing the source electrode on the gate electrode; and a pixel electrode electrically connected to the drain electrode.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Beom-Seok Cho, Chang-Oh Jeong, Joo-Han Kim
  • Patent number: 7855381
    Abstract: A resin material having a small relative dielectric constant is used as a layer insulation film 114. The resin material has a flat surface. A black matrix or masking film for thin film transistors is formed thereon using a metal material. Such a configuration prevents the problem of a capacity generated between the masking film and a thin film transistor.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: December 21, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 7847289
    Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line over the substrate, a data line crossing the gate line to define a pixel region and including a transparent conductive layer and an opaque conductive layer, a data pad at one end of the data line and including a transparent conductive layer, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, the pixel electrode including a transparent conductive layer.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: December 7, 2010
    Assignee: LG Display Co., Ltd
    Inventors: Hyo-Uk Kim, Byung-Chul Ahn, Byoung-Ho Lim
  • Patent number: 7838916
    Abstract: A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a semiconductor layer, and a gate insulating layer for insulating the source electrode and the drain electrode from the gate electrode, wherein the gate insulating layer includes composite particles in which a hydrophobic compound is provided on the surfaces of insulating inorganic particles.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: November 23, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Moriya, Takeo Kawase
  • Patent number: 7825411
    Abstract: A thin film transistor and method of fabricating the same are provided. In the thin film transistor, a seed or a grain boundary exists in a semiconductor layer pattern but not in a junction region. The method includes forming a semiconductor layer pattern. Forming the semiconductor layer pattern includes: forming and patterning a first capping layer on an amorphous silicon layer; forming a second capping layer on the first capping layer pattern; forming a metal catalyst layer on the second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. Therefore, it is possible to prevent that a trap is generated in the junction region, thereby obtaining improved and uniform characteristics of the device.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: November 2, 2010
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Jin-Wook Seo, Ki-Yong Lee, Tae-Hoon Yang, Byoung-Keon Park
  • Patent number: 7820496
    Abstract: A thin film transistor substrate and method of manufacturing a thin film transistor substrate through a 3-sheet mask process includes forming a first conductive film on a substrate; forming a gate line including a gate electrode using a first photoresist film pattern formed on the first conductive film through a first mask with a desired pattern formed thereon; sequentially forming a gate insulation film, an active layer, an ohmic contact layer, a second conductive film and a protection film on an entire surface of the substrate; forming an active region and a data line including source-drain electrodes using a second photoresist film pattern that has different thicknesses in predetermined regions and is formed on the protection film through a second mask with a desired pattern formed thereon; forming a contact hole by exposing a channel region of the active layer and partially exposing the source-drain electrodes using the second photoresist pattern; forming a third conductive film on the entire surface of t
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: October 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong Hyuk Lee
  • Patent number: 7821006
    Abstract: There are provided a TFT, a TFT substrate using the TFT, a method of fabricating the TFT substrate, and an LCD. The TFT includes a source region, a drain region, and a gate electrode having an opening. The opening of the gate electrode is to enhance the light sensing ability of the TFT when it is used as a light sensor, since light is incident into a region where the opening is formed. The TFT including the gate having the opening can be used in a substrate of a flat display or an LCD using such a substrate. The above TFT can sense light incident from outside the display to adjust the brightness of the screen according to the external illumination.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: October 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwan-Wook Jung, Ung-Sik Kim, Pil-Mo Choi, Seock-Cheon Song, Ho-Suk Maeng, Sang-Hoon Lee, Keun-Woo Park
  • Patent number: 7821065
    Abstract: An object of the present invention is to provide a semiconductor device having high operation characteristic and reliability. The measures taken are: A pixel capacitor is formed between an electrode comprising anodic capable material over an organic resin film, an anodic oxide film of the electrode and a pixel electrode above. Since the anodic oxide film is anodically oxidized by applied voltage per unit time at 15 V/min, there is no wrap around on the electrode, and film peeling can be prevented.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: October 26, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Shunpei Yamazaki, Jun Koyama, Mitsuaki Osame, Yukio Tanaka, Yoshiharu Hirakata
  • Patent number: 7816258
    Abstract: An electro-optic device substrate includes a base and a TFT element having a source region and a drain region disposed on the base. The TFT element includes a silicon layer in the source region or the drain region, and the silicon layer at least partially includes a silicided portion. The electro-optic device substrate also includes a metal wire connected to the silicided portion of the silicon layer.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: October 19, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Minoru Moriwaki
  • Patent number: 7816712
    Abstract: A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: October 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hyun Choung, Hong-Sick Park, Joo-Ae Youn, Sun-Young Hong, Bong-Kyun Kim, Won-Suk Shin, Byeong-Jin Lee
  • Patent number: 7816192
    Abstract: The present invention relates to a thin film transistor substrate and a fabricating method thereof. The thin film transistor according to one embodiment of the present invention comprises: a gate wire and a data wire formed to cross each other on an insulating substrate and define a pixel area; a thin film transistor formed on the intersection of the gate wire and the data wire; an inorganic insulating layer covering the thin film transistor and having a surface that a prominence and depression pattern formed on; and a reflective layer provided on the prominence and depression pattern. Thus, the present invention provides a thin film transistor substrate and a fabricating method thereof, which reduce the time required in the process and enhance the productivity.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: October 19, 2010
    Assignee: LG Display Co., Ltd.
    Inventor: Hyun-Ho Kim
  • Publication number: 20100258806
    Abstract: An electronic device includes: a substrate; a lower electrode which is provided on the substrate and has an edge portion cross-section having a taper angle of 60° or less; a SiO2 film which is provided on the lower electrode, the SiO2 film including hydrogen atoms in a ratio of 3 atomic % or less, and having a refractive index n of 1.475 or less at a wavelength of 650 nm; and an upper electrode which is provided on the SiO2 film and has an overlapping portion with the lower electrode.
    Type: Application
    Filed: April 5, 2010
    Publication date: October 14, 2010
    Applicant: FUJIFILM CORPORATION
    Inventors: Masaya NAKAYAMA, Shinji IMAI
  • Patent number: 7812351
    Abstract: A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having equivalent energy. As a result, adjacent columnar or needle-like crystals are joined together to form a region having substantially no grain boundaries, i.e., a monodomain region which can substantially be regarded as a single crystal. A semiconductor device is formed by using the monodomain region as an active layer.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: October 12, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Jun Koyama, Takeshi Fukunaga
  • Patent number: 7812398
    Abstract: A semiconductor device and manufacturing method of the same is provided in which the driving current of a pMOSFET is increased, through a scheme formed easily using an existing silicon process. A pMOSFET is formed with a channel in a <100> direction on a (100) silicon substrate. A compressive stress is applied in a direction perpendicular to the channel by an STI.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: October 12, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Saito, Digh Hisamoto, Yoshinobu Kimura, Nobuyuki Sugii, Ryuta Tsuchiya
  • Patent number: 7807487
    Abstract: A thin film transistor including: an active layer on a substrate, the active layer having at least two unit channels; and source and drain electrodes on the active layer, wherein an interval D between each of the channels is larger than a unit channel width W.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: October 5, 2010
    Assignee: LG Display Co., Ltd.
    Inventor: Seok Woo Lee
  • Patent number: 7807999
    Abstract: An array substrate includes a gate line, a data line, a switching device, a transmissive electrode, a reflective electrode and a compensating wiring. A pixel region includes first and second regions. The switching device is connected to the gate line and the data line. The transmissive electrode is connected to the switching device. The transmissive electrode is formed in the first region. The reflective electrode is insulated from the transmissive electrode. The reflective electrode is formed in the second region that is adjacent to the first region. The compensating wiring is connected to the switching device. The compensating wiring faces the reflective electrode in the second region with an insulation layer interposed therebetween. Thus, both of a reflectivity of the reflective electrode and a transmissivity of the transmissive electrode are enhanced simultaneously, while the liquid crystal display apparatus maintains a uniform cell gap.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: October 5, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Seop Kim, Won-Sang Park, Sang-Il Kim, Dong-Sik Sakong, Young-Chol Yang, Sung-Kyu Hong, Jong-Lae Kim
  • Patent number: 7804092
    Abstract: An active-matrix-drive LCD includes a TFT substrate, on which a TFT is formed. The TFT includes a gate electrode layer, a gate insulating film, a patterned semiconductor layer, and a source/drain electrode layer, which are consecutively formed on an insulating substrate of the TFT substrate. The gate electrode layer has a thickness smaller than a thickness of the gate insulating film.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: September 28, 2010
    Assignee: NEC Corporation
    Inventor: Satoshi Doi
  • Patent number: 7799640
    Abstract: In one embodiment, a method of forming a semiconductor device with trench charge compensation structures includes exposing the trench sidewalls to a reduced temperature hydrogen desorption process to enhance the formation of monocrystalline semiconductor layers.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: September 21, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: John M. Parsey, Jr., Gordon M. Grivna, Shanghui L. Tu
  • Publication number: 20100230756
    Abstract: A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.
    Type: Application
    Filed: December 18, 2009
    Publication date: September 16, 2010
    Inventors: Voon-Yew Thean, Marc Rossow, Gregory S. Spencer, Tab A. Stephens, Dina H. Triyoso, Victor H. Vartanian
  • Publication number: 20100230679
    Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.
    Type: Application
    Filed: August 19, 2009
    Publication date: September 16, 2010
    Inventors: Joo-Han Kim, Ki-Yong Song, Dong-Ju Yang, Hee-Joon Kim, Yeo-Geon Yoon, Sung-Hen Cho, Chang-Hoon Kim, Jae-Hong Kim, Yu-Gwang Jeong, Ki-Yeup Lee, Snag-Gab Kim, Yun-Jong Yeo, Shin-Il Choi, Ji-Young Park