Abstract: An apparatus and method for manufacturing thin-film CdS/CdTe photovoltaic modules in a vacuum environment. The apparatus deposits CdS and CdTe layers onto a substrate using heated pocket deposition, a form of physical vapor deposition (PVD) in which a material thermally sublimes from a thermal sublimation source block and is deposited onto a substrate. The thermal sublimation source block includes a pocket having a lower surface into which an array of holes is formed to house plugs of deposition material. Upon heating, deposition material sublimes from a surface of each plug of deposition material, and the surface of each plug regresses into its corresponding hole while maintaining a constant surface area. The sublimation surface area of deposition material across the pocket remains substantially constant during an extended deposition process, and the deposition material is substantially free of undesired thermal radiation from the substrate.

Abstract: A semiconducting device includes a p-type semiconducting layer; a plurality of nanostructures extending from the p-type semiconducting layer; and a n-type semiconducting layer, wherein the n-type semiconducting layer coats the p-type semiconducting layer and the plurality of nanostructures. A photovoltaic cell includes a p-type layer; a plurality of nanowires protruding from the p-type layer; and a n-type layer deposited on the p-type layer and the plurality of nanowires forming a heterojunction.

Abstract: A method of forming a multifunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.

Abstract: A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region.

Abstract: A complementary metal-oxide-semiconductor (CMOS) optical sensor structure comprises a pixel containing a charge collection well of a same semiconductor material as a semiconductor layer in a semiconductor substrate and at least another pixel containing another charge collection well of a different semiconductor material than the material of the semiconductor layer. The charge collections wells have different band gaps, and consequently, generate charge carriers in response to light having different wavelengths. The CMOS sensor structure thus includes at least two pixels responding to light of different wavelengths, enabling wavelength-sensitive, or color-sensitive, capture of an optical data.

Abstract: The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much.

Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell, the method including: providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap and including a pseudomorphic window layer; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; and forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second solar subcell.

Abstract: An optoelectronic device is provided. The optoelectronic device includes a P-type semiconductor substrate, an N-type transparent amorphous oxide semiconductor (TAOS) layer located on a surface of the P-type semiconductor substrate, and a rear electrode on another surface of the P-type semiconductor substrate. The N-type TAOS layer constructs a portion of a P-N diode, and serves as a window layer and a front electrode layer.

Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a middle second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap and having a base layer and an adjacent emitter layer, wherein the other layer adjacent to the emitter layer has an index of refraction substantially equal to that of the emitter layer; a graded interlayer adjacent to the second solar having a third band gap greater than said second band gap; and a lower solar subcell adjacent to the interlayer, and having a fourth band gap smaller than the second band gap, the third subcell being lattice mismatched with respect to the second subcell.

Abstract: An optical device includes at least two materials forming a structure with a graded bandgap where photocarriers are generated. A first of the at least two materials has a larger concentration at opposed ends of the graded bandgap structure than a concentration of the first of the at least two materials at an interior region of the graded bandgap structure. The second of the at least two materials has a larger concentration at the interior region of the graded bandgap structure than the concentration of the second of the at least two materials at the opposed ends of the graded bandgap structure.

Abstract: A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.

Abstract: A photovoltaic structure is provided with an added layer inserted between an emitter layer and a window layer. The added layer includes all elements which are same or different both in the emitter layer and the window layer. The addition of the added layer enhances converted current and voltage that improves the conversion efficiency when the structure is applied to a solar cell.

Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based photodetector comprising an active region including at least a portion of the monocrystalline silicon layer.

Abstract: A method of manufacture of an avalanche photodiode involving a step of making a recess in a top window layer of an avalanche photodiode layer stack, such that a wall surrounding the recess runs smoothly and gradually from the level of the recess to the level of the window layer. Further, diffusing a dopant over the entire window layer area so as to form a p-n junction at the bottom of the recess, and providing a first electrical isolation region around the recess by buried ion implantation or wet oxidation in order to limit the flow of electrical current to the p-n junction. Forming an isolation trench around the photodiode and a second electrical isolation region by ion implantation into the trench such that the second electrical isolation region runs through the absorption layer of the photodiode.

Abstract: A semiconductor photosensitive element comprises: a semiconductor substrate of a first conductivity type; a first light absorption layer, a first semiconductor layer of a second conductivity type, a first semiconductor layer of the first conductivity type, a second light absorption layer, and a second semiconductor layer of a second conductivity type, arranged in this order on the semiconductor substrate; a first electrode connected to the second semiconductor layer of the second conductivity type; a second electrode connected to the semiconductor substrate; and a third electrode electrically connecting the first semiconductor layer of the first conductivity type to the first semiconductor layer of the second conductivity type. The third electrode is located outside a light detection region for detecting optical signals.

Abstract: A photovoltaic cell can include a heterojunction between semiconductor layers.

Abstract: A thin-film solar cell having a hetero-junction of semiconductor and the fabrication method thereof are provided. Instead of the conventional hetero-junction of III-V semiconductor or homo-structure of IV semiconductor, the thin-film solar cell according to the present invention adopts a novel hetero-junction structure of IV semiconductor to improve the cell efficiency thereof. By adjusting the amount of layer sequences and the thickness of the hetero-junction structure, the cell efficiency of the thin-film solar cell according to the present invention is also optimized.

Abstract: A P-type doped layer of a photoelectric conversion device is provided. The P-type doped layer is a double layer structure including a seeding layer and a wide band gap layer disposed thereon. The P-type doped layer with the double layer structure has both high conductivity and high photoelectric performance.

Abstract: A semiconductor photovoltaic device comprises a semiconductor substrate having a first surface and a second surface, the first surface and the second surface being opposed to each other, a plurality of trenches extending into the semiconductor substrate from the first surface, the first surface being a substantially planar surface, a dopant region in the semiconductor substrate near the first surface and the plurality of trenches, a first conductive layer over the semiconductor substrate, and a second conductive layer on the second surface of the semiconductor substrate.

Abstract: An inverted metamorphic multifunction solar cell, and its method of fabrication, including an upper subcell, a middle subcell, and a lower subcell, including providing a first substrate for the epitaxial growth of semiconductor material; forming an upper first solar subcell on the substrate having a first bandgap; forming a middle second solar subcell over the first solar subcell having a second bandgap smaller than the first bandgap; forming a graded interlayer over the second subcell, the graded interlayer having a third bandgap greater than the second bandgap; and forming a lower third solar subcell over the graded interlayer having a fourth bandgap smaller than the second bandgap such that the third subcell is lattice mismatched with respect to the second subcell, wherein at least one of the solar subcells has heterojunction base-emitter layers.

Abstract: A silicon layer having a conductivity type opposite to that of a bulk is provided on the surface of a silicon substrate and hydrogen ions are implanted to a predetermined depth into the surface region of the silicon substrate through the silicon layer to form a hydrogen ion-implanted layer. Then, an n-type germanium-based crystal layer whose conductivity type is opposite to that of the silicon layer and a p-type germanium-based crystal layer whose conductivity type is opposite to that of the germanium-based crystal layer are successively vapor-phase grown to provide a germanium-based crystal. The surface of the germanium-based crystal layer and the surface of the supporting substrate are bonded together. In this state, impact is applied externally to separate a silicon crystal from the silicon substrate along the hydrogen ion-implanted layer, thereby transferring a laminated structure composed of the germanium-based crystal and the silicon crystal onto the supporting substrate.

Abstract: A solid-state imaging element includes a layered substrate made of silicon and composed of, for example, an N-type substrate, a P-type layer, and an N-type layer. In the layered substrate, an imaging region in which a plurality of pixels are arranged and a peripheral circuit region are formed. A recess reaching the reverse face of the P-type layer is formed in a reverse face portion of the layered substrate in the imaging region, and a reflective film is formed on at least the inner face of the recess. Light is reflected on the reverse face and the obverse face of the layered substrate.

Abstract: The invention relates to an avalanche photodiode having enhanced gain uniformity enabled by a tailored diffused p-n junction profile. The tailoring is achieved by a two stage doping process incorporating a solid source diffusion in combination with conventional gas source diffusion. The solid source diffusion material is selected for its solubility to the dopant compared to the solubility of the multiplication layer to dopant. The solid source has a diameter between the first and second diffusion windows. Thus, there are three distinct diffusion regions during the second diffusion. The dopant in the multiplication layer at the edge region, the dopant from the solid source material with a relatively higher dopant concentration (limited by the solubility of the dopant in the solid source material) at the intermediate region, and the central region exposed to an infinite diffusion source from the solid source material as it is continually charged with new dopant from the external gas source.

Abstract: Disclosed herein is a quantum dot optical device, including: a substrate; a hole injection electrode; a hole transport layer; a quantum dot luminescent layer; an electron transport layer; and an electron injection electrode, wherein a light-emitting surface of the device has a periodical projection structure.

Abstract: The invention offers a photodetector that has an N-containing InGaAs-based absorption layer having a sensitivity in the near-infrared region and that suppresses the dark current and a production method thereof. The photodetector is provided with an InP substrate 1, an N-containing InGaAs-based absorption layer 3 positioned above the InP substrate 1, a window layer 5 positioned above the N-containing InGaAs-based absorption layer 3, and an InGaAs buffer layer 4 positioned between the N-containing InGaAs-based absorption layer 3 and the window layer 5.

Abstract: An n-type InGaAs light absorbing layer and an n-type InP layer (first conductivity type semiconductor layer), which is a window layer, and a multiplication layer are multilayered one atop another on an n-type InP substrate. By selectively diffusing impurities and implanting ions, a p-type InP region second conductivity type semiconductor region) is formed on a part of the top surface of the n-type InP layer. The top surfaces of the n-type InP layer and p-type InP region are covered with a surface protection film. A cathode electrode (first electrode) is connected to the underside of the n-type InP substrate. A ring-shaped anode electrode (second electrode) is connected to the top surface of the p-type InP region. A low-voltage electrode surrounds the anode electrode. A voltage lower than that of the cathode electrode is applied to this low-voltage electrode.

Abstract: A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions.

Abstract: A III-V semiconductor waveguide is coupled with a Si waveguide to form a hybrid structure. Spatial location of the optical mode (or supermode) of the hybrid structure is controlled by controlling at least one between the geometry and the refractive index of the structure, e.g., varying width of the Si waveguide. Control of such spatial location allows location of the optical mode either almost entirely in the III-V semiconductor waveguide or almost entirely in the Si waveguide, thus allowing various optical arrangements to be obtained according to the location of the optical mode and the proprieties of the waveguides.

Abstract: Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects.

Abstract: The invention specifies a radiation detector for detecting radiation (8) according to a predefined spectral sensitivity distribution (9) that exhibits a maximum at a predefined wavelength ?0, comprising a semiconductor body (1) with an active region (5) serving to generate a detector signal and intended to receive radiation, in which according to one embodiment the active region (5) includes a plurality of functional layers (4a, 4b, 4c, 4d) that have different band gaps and/or thicknesses and are implemented such that they (4a, 4b, 4c, 4d) at least partially absorb radiation in a range of wavelengths greater than ?0. According to a further embodiment, disposed after the active region is a filter layer structure (70) comprising at least one filter layer (7, 7a, 7b, 7c), said filter layer structure determining the short-wave side (101) of the detector sensitivity (10) according to the predefined spectral sensitivity distribution (9) by absorbing wavelengths smaller than ?0.

Abstract: A transmitted light absorption/recombination layer, a barrier layer, a wavelength selection/absorption layer, and an InP window layer having a p-type region are supported by an n-type substrate and arranged in that order. Light with a wavelength of 1.3 ?m reaches the wavelength selection/absorption layer through the InP window layer. Then, the light is absorbed by the wavelength selection/absorption layer and drawn from the device as an electric current signal. Light with a wavelength of 1.55 ?m reaches the transmitted light absorption/recombination layer through the barrier layer. Then, the light is absorbed by the transmitted light absorption/recombination layer, generating electrons and holes. These electrons and holes recombine with each other and, hence, disappear.

Abstract: An avalanche photodiode including a first electrode; and a substrate including a first semiconductor layer of a first conduction type electrically connected to the first electrode, in which at least an avalanche multiplication layer, a light absorption layer, and a second semiconductor layer of a second conduction type with a larger band gap than the light absorption layer are deposited on the substrate. The second semiconductor layer is separated into inner and outer regions by a groove formed therein, the inner region electrically connected to a second. With the configuration, the avalanche photodiode has a low dark current and high long-term reliability. In addition, the outer region includes an outer trench, and at least the light absorption layer is removed by the outer trench to form a side face of the light absorption layer. With the configuration, the dark current can be further reduced.

Abstract: A method of forming a semiconductor structure including a multijunction solar cell with an upper subcell, a middle subcell, and a lower subcell, by providing first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on said substrate having a first band gap; forming a second solar subcell over said first subcell having a second band gap smaller than said first band gap; and forming a grading interlayer over said second subcell having a third band gap larger than said second band gap; forming a third solar subcell having a fourth band gap smaller than said second band gap such that said third subcell is lattice mismatched with respect to said second subcell. A bypass diode is further provided in the semiconductor structure with a region of first polarity of the solar cell connected with a region of second polarity of the bypass diode.

Abstract: A photoelectric converting film stack type solid-state image pickup device comprising: a semiconductor substrate in which a signal read circuit is formed; and at least one photoelectric converting film interposed between two electrode films, said at least one photoelectric converting film being stacked above the semiconductor substrate, wherein a signal corresponding to an intensity of incident light is read outside by the signal read circuit, the signal being generated by photoelectric conversion with the photoelectric converting film, wherein the photoelectric converting film comprises: a first layer comprising: an ultrafine particle including (i) a quantum dot contributing to the photoelectric conversion and (ii) a material having a band gap larger than that of the quantum dot, the quantum dot being coated with the material; and a hole transport layer stacked on the first layer.

Abstract: A structure including a Si1-xGex substrate and a distributed Bragg reflector layer disposed directly onto the substrate. The distributed Bragg reflector layer includes a repeating pattern that includes at least one aluminum nitride layer and a second layer having the general formula AlyGa1-yN. Another aspect of the present invention is various devices including this structure. Another aspect of the present invention is directed to a method of forming such a structure comprising providing a Si1-xGex substrate and depositing a distributed Bragg reflector layer directly onto the substrate. Another aspect of the present invention is directed to a photodetector or photovoltaic cell device, including a Si1-xGex substrate device, a group III-nitride device and contacts to provide a conductive path for a current generated across at least one of the Si1-xGex substrate device and the group III-nitride device upon incident light.

Abstract: A semiconductor photocathode has first and second III-V compound semiconductor layers doped with a p-type impurity and joined to each other to make a heterojunction. The second III-V compound semiconductor layer functions as a light absorbing layer, an energy gap of the second III-V compound semiconductor layer is smaller than that of the first III-V compound semiconductor layer, and Be or C is used as the p-type dopant in each semiconductor layer. At this time, the second III-V compound semiconductor layer may be deposited on the first III-V compound semiconductor layer. The first III-V compound semiconductor layer and the second III-V compound semiconductor layer may contain at least one from each group of (In, Ga, Al) and (As, P, N).

Abstract: A semiconductor device has first and second III-V compound semiconductor layers one of which functions as a photosensitive layer or as a light emitting layer, which are doped with a p-type impurity in a low concentration, and which are joined to each other to make a heterojunction. An energy gap of the second III-V compound semiconductor layer is smaller than that of the first III-V compound semiconductor layer and the p-type dopant in each semiconductor layer is Be or C. At this time, the second III-V compound semiconductor layer may be deposited on the first III-V compound semiconductor layer. The first III-V compound semiconductor layer and the second III-V compound semiconductor layer may contain at least one from each group of (In, Ga, Al) and (As, P, N).

Abstract: A method of making a two-dimensional detector array (and of such an array) comprising, for each of a plurality of rows and a plurality of columns of individual detectors, forming an n-doped semiconductor photo absorbing layer, forming a barrier layer comprising one or more of AlSb, AlAsSb, AlGaAsSb, AlPSb, AlGaPSb, and HgZnTe, and forming an n-doped semiconductor contact area.

Abstract: A method for electrically connecting semiconductor layers using a layer less than 150 nm thick of a semiconductor material that exhibits strong piezoelectric and/or spontaneous electrical polarization to provide a tunnel junction that electrically connects the semiconductor layers. The semiconductor material that exhibits strong piezoelectric and/or spontaneous electrical polarization comprises an interface between differing (Al,In,Ga)N alloys. The tunnel junction may be between p-type and n-type semiconductor layers, or it may be between two n-type or p-type semiconductor layers. Stacked Schottky diodes or stacked photo-active junctions may be fabricated using this method.

Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.

Abstract: A method of fabricating a CoSb3-based thermoelectric device is disclosed. The method includes providing a high-temperature electrode, providing a buffer layer on the high-temperature electrode, forming composite n-type and p-type layers, attaching the buffer layer to the composite n-type and p-type layers, providing a low-temperature electrode on the composite n-type and p-type layers and separating the composite n-type and p-type layers from each other to define n-type and p-type legs between the high-temperature electrode and the low-temperature electrode.