Abstract: Disclosed herein is a radiation detector, comprising: an avalanche photodiode (APD) with a first side coupled to an electrode and configured to work in a linear mode; a capacitor module electrically connected to the electrode and comprising a capacitor, wherein the capacitor module is configured to collect charge carriers from the electrode onto the capacitor; a current sourcing module in parallel to the capacitor, the current sourcing module configured to compensate for a leakage current in the APD and comprising a current source and a modulator; wherein the current source is configured to output a first electrical current and a second electrical current; wherein the modulator is configured to control a ratio of a duration at which the current source outputs the first electrical current to a duration at which the current source outputs the second electrical current.

Abstract: A method of forming an image sensor includes forming a first image sensor element within a substrate. The first image sensor element and the substrate respectively comprise a first material. A second image sensor element is formed within the substrate. Forming the second image sensor element includes forming an isolation layer over the first image sensor element. Further, a buffer layer is formed over the isolation layer and an active layer is formed over the buffer layer. The active layer comprises a second material different from the first material.

Abstract: Disclosed herein is a radiation detector, comprising: an avalanche photodiode (APD) with a first side coupled to an electrode and configured to work in a linear mode; a capacitor module electrically connected to the electrode and comprising a capacitor, wherein the capacitor module is configured to collect charge carriers from the electrode onto the capacitor; a current sourcing module in parallel to the capacitor, the current sourcing module configured to compensate for a leakage current in the APD and comprising a current source and a modulator; wherein the current source is configured to output a first electrical current and a second electrical current; wherein the modulator is configured to control a ratio of a duration at which the current source outputs the first electrical current to a duration at which the current source outputs the second electrical current.

Abstract: Disclosed herein is a radiation detector, comprising: an avalanche photodiode (APD) with a first side coupled to an electrode and configured to work in a linear mode; a capacitor module electrically connected to the electrode and comprising a capacitor, wherein the capacitor module is configured to collect charge carriers from the electrode onto the capacitor; a current sourcing module in parallel to the capacitor, the current sourcing module configured to compensate for a leakage current in the APD and comprising a current source and a modulator; wherein the current source is configured to output a first electrical current and a second electrical current; wherein the modulator is configured to control a ratio of a duration at which the current source outputs the first electrical current to a duration at which the current source outputs the second electrical current.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods: (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions; (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor; (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field.

Abstract: A method of manufacturing a photodetector structure is provided. The method includes forming a structural layer by making a trench in a bulk silicon substrate and filling the trench with a cladding material, forming a single-crystallized silicon layer on the structural layer, and forming a germanium layer on the single-crystallized silicon layer.

Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.

Abstract: The present invention provides a method of forming a doping region. A substrate is provided, and a poly-silicon layer is formed on the substrate. A silicon oxide layer is formed on the poly-silicon layer. An implant process is performed to form a doping region in the poly-silicon layer. The present invention further provides a method for forming a MOS.

Abstract: A method and apparatus to manage the diffusion process by controlling the diffusion path in the semiconductor fabrication process is disclosed. In one embodiment, a method for processing a substrate comprising steps of forming one or more diffusion areas on said substrate; disposing the substrate in a diffusion chamber, wherein the diffusion chamber is under a vacuum condition and a source material therein is heated and evaporated; and diffusing the source material into the diffusion area on said substrate, wherein said source material travels through a diffusion controlling unit adapted to manage the flux thereof in the diffusion chamber, so concentration of the source material is uniform in a diffusion region above the substrate.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: In one aspect, optoelectronic devices are described herein. In some embodiments, an optoelectronic device comprises a fiber core, a radiation transmissive first electrode surrounding the fiber core, at least one photosensitive inorganic layer surrounding the first electrode and electrically connected to the first electrode, and a second electrode surrounding the inorganic layer and electrically connected to the inorganic layer. In some embodiments, the device comprises a photovoltaic cell.

Abstract: Provided is a photoelectric conversion device in which the conductivity after hydrogen-plasma exposure is set within an appropriate range, thereby suppressing the leakage current and improving the conversion efficiency. A photoelectric conversion device includes, on a substrate, a photoelectric conversion layer having at least two power generation cell layers, and an intermediate contact layer provided between the power generation cell layers. The intermediate contact layer mainly contains a compound represented by Zn1-xMgxO (0.096?x?0.183).

Abstract: Avalanche photodiodes (APDs) having at least one top stressor layer disposed on a germanium (Ge)-containing absorption layer are described herein. The top stressor layer can increase the tensile strain of the Ge-containing absorption layer, thus extending the absorption of APDs to longer wavelengths beyond 1550 nm. In one embodiment, the top stressor layer has a four-layer structure, including an amorphous silicon (Si) layer disposed on the Ge-containing absorption layer; a first silicon dioxide (SiO2) layer disposed on the amorphous Si layer, a silicon nitride (SiN) layer disposed on the first SiO2 layer, and a second SiO2 layer disposed on the SiN layer. The Ge-containing absorption layer can be further doped by p-type dopants. The doping concentration of p-type dopants is controlled such that a graded doping profile is formed within the Ge-containing absorption layer to decrease the dark currents in APDs.

Abstract: A method for forming a photovoltaic device includes depositing a p-type layer on a substrate. A barrier layer is formed on the p-type layer by exposing the p-type layer to an oxidizing agent. An intrinsic layer is formed on the barrier layer, and an n-type layer is formed on the intrinsic layer.

Abstract: An etching composition and a method of manufacturing a display substrate using the etching composition are disclosed. The etching composition includes phosphoric acid (H3PO4) of about 40% by weight to about 70% by weight, nitric acid (HNO3) of about 5% by weight to about 15% by weight, acetic acid (CH3COOH) of about 5% by weight to about 20% by weight, and a remainder of water. Thus, a metal layer including copper may be stably etched.

Abstract: All-carbon-based semiconductor devices are provided. In accordance with an example embodiment, an apparatus includes n-type and p-type carbon-based semiconductor material that form a p-n junction, which are respectively coupled to electrodes having a carbon allotrope. A first one of electrodes is connected to the n-type material and a second one of the electrodes is connected to the p-type material, and collect charge presented at the p-n junction.

Abstract: An intermediate layer for a stacked type photoelectric conversion device including an n-type silicon-based stacked body including an n-type crystalline silicon-based semiconductor layer and an n-type silicon-based composite layer, and a p-type silicon-based stacked body including a p-type crystalline silicon-based semiconductor layer and a p-type silicon-based composite layer, the n-type crystalline silicon-based semiconductor layer of the n-type silicon-based stacked body being in contact with the p-type crystalline silicon-based semiconductor layer of the p-type silicon-based stacked body, a stacked type photoelectric conversion device including the same, and a method for manufacturing a stacked type photoelectric conversion device.

Abstract: Disclosed is a method for manufacturing a thin-film solar cell using plasma between a couple of parallel electrodes. In the method, a base member is placed in a chamber between a first electrode and a second electrode facing each other. A hydrogen gas is heated, and thus heated hydrogen gas and a silicon-based gas are introduced into a space between the first electrode and the second electrode. A ratio of a flow rate of the heated hydrogen gas to that of the silicon-based gas is at least 25 and no more than 58. A plasma is generated between the first electrode and the second electrode by applying high-frequency power to the second electrode while a pressure in the chamber is 1000 Pa or higher, and an optically active layer containing crystalline silicon is deposited on the base material.

Abstract: In one or more embodiments described herein, there is provided an apparatus including a first layer for detecting electromagnetic signalling, and a second layer positioned proximate to the first layer. The first layer includes graphene, and the second layer is configured to undergo plasmonic resonance in response to receiving electromagnetic signalling. This plasmonic resonance that the second layer undergoes thereby sensitizes the graphene of the first layer to detection of particular spectral characteristics of received electromagnetic signalling corresponding to the particular plasmonic resonance of the second layer.

Abstract: A photodetector includes: a substrate; a first dielectric material positioned on the substrate; an optical waveguide positioned on the first dielectric material; a second dielectric material positioned on the optical waveguide; a graphene layer positioned on the second dielectric material; and a first electrode and a second electrode that are positioned on the graphene layer.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: A photovoltaic device and method include a photovoltaic stack having an N-doped layer, a P-doped layer and an intrinsic layer. A transparent electrode is formed on the photovoltaic stack and includes a carbon based layer and a high work function metal layer. The high work function metal layer is disposed at an interface between the carbon based layer and the P-doped layer such that the high work function metal layer forms a reduced barrier contact and is light transmissive.

Abstract: A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region including a first type of semiconductor region proximate to a second type of semiconductor region. The first type of semiconductor is to absorb light in a first range of wavelengths and the second type of semiconductor to absorb light in a second range of wavelengths. A multiplication region is defined proximate to and separate from the absorption region. The multiplication region includes an intrinsic semiconductor region in which there is an electric field to multiply the electrons created in the absorption region.

Abstract: Disclosed is a method for bonding semiconductor substrates, wherein an eutectic alloy does run off the bonding surfaces during the eutectic bonding. Also disclosed is an MEMS device which is obtained by bonding semiconductor substrates by this method. Specifically, a substrate (11) and a substrate (21) are eutectically bonded with each other by pressing and heating the substrate (11) and the substrate (21), while interposing an aluminum-containing layer (31) and a germanium layer (32) between a bonding part (30a) of the substrate (11) and a bonding part (30b) of the substrate (21) in such a manner that the aluminum-containing layer (31) and the germanium layer (32) overlap each other, with an outer edge (32a) of the germanium layer (32) being inwardly set back from the an outer edge (31a) of the aluminum-containing layer (31).

Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.

Abstract: A solar cell includes abutting P-type and N-type doped regions in a contiguous portion of a polysilicon layer. The polysilicon layer may be formed on a thin dielectric layer, which is formed on a backside of a solar cell substrate (e.g., silicon wafer). The polysilicon layer has a relatively large average grain size to reduce or eliminate recombination in a space charge region between the P-type and N-type doped regions, thereby increasing efficiency.

Abstract: Efficiency of silicon photovoltaic solar cells is increased by an annealing process for immobilizing oxygen formed in Czochralski-grown silicon. The annealing process includes a short anneal in a rapid thermal annealing chamber at a high temperature, for example, greater than 1150° C. in an oxygen-containing ambient, More preferably, the wafer is rapidly cooled to less than 950° C. without an intermediate temperature hold, at which temperature oxygen does not nucleate and/or precipitate, Subsequent processing to form a photovoltaic structure is typically performed at relatively low temperatures of less than 1000° C. or even 875° C.

Abstract: A process for fabricating a silicon-based thin-film photovoltaic cell, applicable for example in the energy generation field. The fabrication process includes a) depositing a p-doped or n-doped amorphous silicon film, the X-ray diffraction spectrum of which has a line centered at 28° that has a mid-height width, denoted by a, such that 4.7°?a<6.0°, on a substrate.

Abstract: A method of fabricating a solar cell is disclosed. The method includes the steps of forming a sacrificial layer on a silicon substrate, forming a doped silicon layer atop the sacrificial substrate, forming a silicon film atop the doped silicon layer, forming a plurality of interdigitated contacts on the silicon film, contacting each of the plurality of interdigitated contacts with a metal contact, and removing the sacrificial layer.

Abstract: An optically active material is used to create power devices and circuits having significant performance advantages over conventional methods for affecting optical control of power electronics devices and circuits. A silicon-carbide optically active material is formed by compensating shallow donors with the boron related D-center. The resulting material can be n-type or p-type but it is distinguished from other materials by the ability to induce persistent photoconductivity in it when illuminated by electromagnetic radiation with a photon energy in excess of the threshold energy required to photoexcite electrons from the D-center to allowed states close to the conduction band edge, which varies from polytype to polytype.

Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.

Abstract: A solar cell includes a support (6), a back electrode layer (5), at least a hydrogenated microcrystalline silicon photoelectric device (9), and a top electrode layer (11). The back electrode layer (5) has a rough surface. The solar cell includes, between the back electrode layer (5) and the hydrogenated microcrystalline silicon photoelectric device (9), an asymmetric intermediate layer (8), the intermediate layer (8) being adjacent to the hydrogenated microcrystalline silicon photoelectric device (9) and having a surface, on the side of the back electrode layer (5), having a roughness greater than the roughness of the surface of the intermediate layer (8) on the side of the hydrogenated microcrystalline silicon device (9). Such solar cells allow obtaining optimum Voc and FF parameters, while maintaining high current.

Abstract: A photovoltaic structure having a semiconductor substrate, and metal particles bonded to the semiconductor substrate. The photovoltaic structure is sufficiently thin to be translucent or semitransparent. The metal particles are produced when a layer of metal is deposited onto the semiconductor substrate and heated. The photovoltaic structure is capable of causing generation of an electrical current upon exposure to electromagnetic radiation within one or more of the infrared spectrum, the visible light spectrum, or the ultraviolet spectrum.

Abstract: A solar cell includes a first electrode layer, a P-type silicon layer, an N-type silicon layer, and a second electrode layer. The first electrode layer, the P-type silicon layer, the N-type silicon layer, and the second electrode layer are arranged in series side by side along a straight line and in contact with each other, thereby cooperatively forming a planar structure. The planar structure has a photoreceptive surface substantially parallel to the straight line and directly receives an incident light. A P-N junction is formed near an interface between the P-type silicon layer and the N-type silicon layer.

Abstract: In a method for adjusting the sensitivity of a photodetector, the bandgap of the photodetection material is adjusted by inducing strain in the photodetection material. Such adjustments can be made in situ and continuously, in a reproducible and repeatable manner. In embodiments of the method, the photodetection material is graphene, carbon nanotubes or graphene nanoribbon. The use of graphene permits a dynamically-adjustable sensitivity over a dynamic range of radiation having wavelengths of 1.38 microns or less, up to at least 60 microns. In an adjustable photodetector, a graphene layer is suspended over a silicon substrate by a layer of an insulating material. Adjusting the voltage across the graphene layer and the silicon substrate induces strain in the graphene layer by electrostatic attraction.

Abstract: A method of growing a germanium (Ge) epitaxial thin film having negative photoconductance characteristics and a photodiode using the same are provided. The method of growing the germanium (Ge) epitaxial thin film includes growing a germanium (Ge) thin film on a silicon substrate at a low temperature, raising the temperature to grow the germanium (Ge) thin film, and growing the germanium (Ge) thin film at a high temperature, wherein each stage of growth is performed using reduced pressure chemical vapor deposition (RPCVD). The three-stage growth method enables formation of a germanium (Ge) epitaxial thin film characterized by alleviated stress on a substrate, a lowered penetrating dislocation density, and reduced surface roughness.

Abstract: Provided are light detection devices and methods of manufacturing the same. The light detection device includes a first conductive pattern on a surface of a substrate, an insulating pattern on the substrate and having an opening exposing at least a portion of the first conductive pattern, a light absorbing layer filling the opening of the insulating pattern and having a top surface disposed at a level substantially higher than a top surface of the insulating pattern, a second conductive pattern on the light absorbing layer, and connecting terminals electrically connected to the first and second conductive patterns, respectively.

Abstract: In at least one embodiment, an infrared (IR) detector is provided. The IR detector comprises a thermal sensing element that includes an absorber that is formed of a superlattice quantum well structure. The superlattice quantum well structure includes a first layer and a second layer, the first layer being arranged to extend in a first plane and the second layer being positioned proximate to the first layer and extending in the first plane. The second layer extending further than the first layer in the first plane such that a portion thereof is exposed for receiving a conductive material to increase electrical conductivity in the detector.

Abstract: An infrared external photoemissive detector can have an n-p heterojunction comprising an n-type semiconductor layer and a p-layer; the n-layer semiconductor comprising doped silicon embedded with nanoparticles forming Schottky barriers; and the p-layer is a p-type diamond film. The nanoparticles can be about 20-30 atomic percentage metal particles (such as silver) having an average particle size of about 5-10 nm. The p-layer can have a surface layer that has a negative electron affinity. The n-layer can be in the range of about 3 ?m to 10 ?m thick, and preferably about 3 ?m thick. The doped silicon can be doped with elements selected from the list consisting of phosphorus and antimony.

Abstract: A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer formed through epitaxial growth and doped with a predetermined concentration level of impurities, an undoped silicon epitaxial layer formed over the SiGe epitaxial layer by epitaxial growth, and a photodiode region formed from a top surface of the undoped silicon epitaxial layer to a predetermined depth in the SiGe epitaxial layer.

Abstract: A method for forming a semiconductor film suitable for a practical photoelectric conversion device having favorable photoelectric conversion efficiency and adapted to volume production and increased substrate area, and a method for manufacturing a photoelectric conversion device including the semiconductor film are provided. The method for forming a semiconductor film manufactures the semiconductor film including amorphous structure by a plasma CVD method. The semiconductor film is an amorphous film of SiGe-based compound or a microcrystalline film of SiGe-based compound. The plasma CVD method controls bandgap in thickness direction of the semiconductor film by varying the ON or OFF time of electric power applied to generate a plasma and intermittently supplying the power. The ON time and OFF time of the power fall in a range where the duty ratio ON time/(ON time+OFF time)×100(%) is 10% or more and 50% or less.

Abstract: In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.

Abstract: A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. A first and a second Ohmic contact are applied to the first and the second doped regions of the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device to produce electromagnetic radiation upon the application of electrical power to the first and second Ohmic contacts.

Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.

Abstract: An object of the present invention is to provide a germanium laser diode that can be easily formed on a substrate such as silicon by using a normal silicon process and can emit light efficiently. A germanium light-emitting device according to the present invention is a germanium laser diode characterized in that tensile strain is applied to single-crystal germanium serving as a light-emitting layer to be of a direct transition type, a thin semiconductor layer made of silicon, germanium or silicon-germanium is connected adjacently to both ends of the germanium light-emitting layer, the thin semiconductor layer has a certain degree of thickness capable of preventing the occurrence of quantum confinement effect, another end of the thin semiconductor layer is connected to a thick electrode doped with impurities at a high concentration, the electrode is doped to a p type and an n type, a waveguide is formed so as not to be in direct contact with the electrode, and a mirror is formed at an end of the waveguide.

Abstract: Avalanche amplification structures including electrodes, an avalanche region, a quantifier, an integrator, a governor, and a substrate arranged to detect a weak signal composed of as few as several electrons are presented. Quantifier regulates the avalanche process. Integrator accumulates a signal charge. Governor drains the integrator and controls the quantifier. Avalanche amplifying structures include: normal quantifier, reverse bias designs; normal quantifier, normal bias designs; lateral quantifier, normal bias designs; changeable quantifier, normal bias, adjusting electrode designs; normal quantifier, normal bias, adjusting electrode designs; and lateral quantifier, normal bias, annular integrator designs. Avalanche amplification structures are likewise arranged to provide arrays of multi-channel devices. The described invention is expected to be used within photodetectors, electron amplifiers, chemical and biological sensors, and chemical and biological chips with lab-on-a-chip applications.