Including Polycrystalline Semiconductor (epo) Patents (Class 257/E31.043)
  • Patent number: 9023681
    Abstract: The present invention discloses a method of fabricating a heterojunction battery, comprising the steps of: depositing a first amorphous silicon intrinsic layer on the front of an n-type silicon wafer, wherein the n-type silicon wafer may be a monocrystal or polycrystal silicon wafer; depositing an amorphous silicon p layer on the first amorphous silicon intrinsic layer; depositing a first boron doped zinc oxide thin film on the amorphous silicon p layer; forming a back electrode and an Al-back surface field on the back of the n-type silicon wafer; and forming a positive electrode on the front of the silicon wafer. In addition, the present invention further discloses a method of fabricating a double-sided heterojunction battery. In the present invention, the boron doped zinc oxide is used as an anti-reflection film in place of an ITO thin film; due to the special nature, especially the light trapping effect of the boron doped zinc oxide, the boron doped zinc oxide can achieve good anti-reflection.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: May 5, 2015
    Assignee: Chint Solar (Zhejiang) Co., Ltd.
    Inventors: Xinwei Niu, Cao Yu, Lan Ding, Junmei Rong, Shiyong Liu, Minghua Wang, Jinyan Hu, Weizhi Han, Yongmin Zhu, Hua Zhang, Tao Feng, Jianbo Jin, Zhanwei Qiu, Liyou Yang
  • Patent number: 8946678
    Abstract: Room temperature IR and UV photodetectors are provided by electrochemical self-assembly of nanowires. The detectivity of such IR detectors is up to ten times better than the state of the art. Broad peaks are observed in the room temperature absorption spectra of 10-nm diameter nanowires of CdSe and ZnS at photon energies close to the bandgap energy, indicating that the detectors are frequency selective and preferably detect light of specific frequencies. Provided is a photodetector comprising: an aluminum substrate; a layer of insulator disposed on the aluminum substrate and comprising an array of columnar pores; a plurality of semiconductor nanowires disposed within the pores and standing vertically relative to the aluminum substrate; a layer of nickel disposed in operable communication with one or more of the semiconductor nanowires; and wire leads in operable communication with the aluminum substrate and the layer of nickel for connection with an electrical circuit.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: February 3, 2015
    Assignee: Virginia Commonwealth University
    Inventors: Supriyo Bandyopadhyay, Saumil Bandyopadhyay, Pratik Agnihotri
  • Patent number: 8945976
    Abstract: A thin silicon solar cell is described. An example solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a third region that creates heterojunction surface passivation. Amorphous silicon layers are deposited on both sides of the silicon wafer. A final layer of transparent conductive oxide is formed on both sides. Metal contacts are applied to the transparent conductive oxide.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: February 3, 2015
    Assignee: Suniva, Inc.
    Inventors: Daniel L. Meier, Ajeet Rohatgi
  • Patent number: 8859321
    Abstract: Fabrication of a tandem photovoltaic device includes forming a bottom cell having an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. A top cell is formed relative to the bottom cell. The top cell has an N-type layer, a P-type layer and a top intrinsic layer therebetween. The top intrinsic layer is formed of an undoped material deposited at a temperature that is different from the bottom intrinsic layer such that band gap energies for the top intrinsic layer and the bottom intrinsic layer are progressively lower for each cell.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: October 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 8816351
    Abstract: A laser annealing method includes forming a nitrogen-doped layer on a semiconductor layer, the nitrogen-doped layer having a nitrogen concentration of at least 3×1020 atoms/cc, irradiating a first area of the nitrogen-doped layer in a low oxygen environment with a laser beam and irradiating a second area of the nitrogen-doped layer in a low oxygen environment with a laser beam, a part of the second area overlapping with the first area.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: August 26, 2014
    Assignee: Japan Display Inc.
    Inventors: Kian Kiat Lim, Atsushi Nakamura, Kai Pheng Tan, Eng Soon Lim, Poh Ling Fu, Takaaki Kamimura
  • Patent number: 8704326
    Abstract: A thin-film photoelectric conversion device includes a crystalline germanium photoelectric conversion layer having improved open circuit voltage, fill factor, and photoelectric conversion efficiency for light having a longer wavelength. The photoelectric conversion device comprises a first electrode layer, one or more photoelectric conversion units, and a second electrode layer sequentially stacked on a substrate, wherein each of the photoelectric conversion units comprises a photoelectric conversion layer arranged between a p-type semiconductor layer and an n-type semiconductor layer. At least one of the photoelectric conversion units includes a crystalline germanium photoelectric conversion layer comprising a crystalline germanium semiconductor that is substantially intrinsic or weak n-type and is essentially free of silicon.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: April 22, 2014
    Assignee: Kaneka Corporation
    Inventors: Naoki Kadota, Toshiaki Sasaki
  • Patent number: 8691613
    Abstract: A crystalline-based silicon photoelectric conversion device comprises: an intrinsic silicon-based layer and a silicon-based layer of a first conductivity type, on one surface of a single-crystal silicon substrate of the first conductivity type; and an intrinsic silicon-based and a silicon-based layer of an opposite conductivity type, in this order on the other surface of the silicon substrate. At least one of forming the intrinsic silicon-based layer of the first conductivity type layer-side forming the intrinsic silicon-based layer of the opposite conductivity type layer-side includes: forming a first intrinsic silicon-based thin-film layer having a thickness of 1-10 nm on the silicon substrate; plasma-treating the silicon substrate in a gas containing mainly hydrogen; and forming a second intrinsic silicon-based thin-film layer on the first intrinsic silicon-based thin-film.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 8, 2014
    Assignee: Kaneka Corporation
    Inventors: Masashi Yoshimi, Mitsuru Ichikawa, Toshihiko Uto, Kenji Yamamoto
  • Publication number: 20140077210
    Abstract: A p-i-n photodetector includes at least one multilayer contact structure including wide gap and narrow gap layers to reduce dark current. The multilayer contact structure includes one or more wide band gap semiconductor layers in alternating sequence with one or more narrow band gap contact layers. A fabrication method of the photodetector includes transfer-doping of the narrow band gap contact layers, which are deposited in alternating sequence with wide band gap semiconductor layers.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20140042445
    Abstract: A system and method for fabricating a 3D image sensor structure is disclosed. The method comprises providing an image sensor with a backside illuminated photosensitive region on a substrate, applying a first dielectric layer to the first side of the substrate opposite the substrate side where image data is gathered, and applying a semiconductor layer that is optionally polysilicon, to the first dielectric layer. A least one control transistor may be created on the first dielectric layer, within the semiconductor layer and may optionally be a row select, reset or source follower transistor. An intermetal dielectric may be applied over the first dielectric layer; and may have at least one metal interconnect disposed therein. A second interlevel dielectric layer may be disposed on the control transistors. The dielectric layers and semiconductor layer may be applied by bonding a wafer to the substrate or via deposition.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 13, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Chun-Chieh Chuang
  • Publication number: 20130276871
    Abstract: A method for manufacturing a P-I-N microcrystalline silicon structure for thin-film solar cells, includes the steps of: (a) forming a P-type layer; (b) forming an I-type layer including a plurality of sub-layers successively stacked on the P-type layer using gas mixtures including fluoride and hydride that have different gas ratios, respectively; and (c) forming an N-type layer on the I-type layer. First, second, and third I-type sub-layers may be formed on the P-type layer using gas mixtures including fluoride and hydride at a first, second, and third gas ratios, respectively. Then, advantageously, the third gas ratio may be larger than the second gas ratio and the second gas ratio may be larger than the first gas ratio, and the first gas ratio may be 8%, the second gas ratio may range between 15% and 35%, and the third gas ratio may range between 35% and 50%.
    Type: Application
    Filed: July 13, 2012
    Publication date: October 24, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Hung CHEN, Jun-Chin LIU, Chun-Heng CHEN
  • Patent number: 8530267
    Abstract: A method for manufacturing a silicon-based thin film solar cell including a crystalline silicon photoelectric conversion unit which contains a p-type layer (4p), a crystalline i-type silicon photoelectric conversion layer (4ic), and an n-type layer (4nc) stacked in this order from a transparent substrate side is provided. In one example, an n-type silicon-based thin film layer (4na) is formed on the crystalline i-type silicon photoelectric conversion layer (4ic), the n-type silicon-based thin film layer (4na) having an n-type silicon alloy layer having a film thickness of 1-12 nm and being in contact with the crystalline i-type silicon photoelectric conversion layer.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: September 10, 2013
    Assignee: Kaneka Corporation
    Inventors: Kunta Yoshikawa, Mitsuru Ichikawa, Kenji Yamamoto
  • Publication number: 20130207109
    Abstract: A method for manufacturing a semiconductor device includes providing a substrate upon which the semiconductor device is to be disposed, heating the substrate to a first temperature that exceeds at least one of a softening point or glass transition temperature of the substrate, and depositing a polysilicon layer onto the substrate. A semiconductor device includes a substrate having at least one of a softening point, Ts, that is less than 600 degrees Celsius and a polysilicon layer disposed on an upper surface of the substrate such that the polysilicon layer abuts the substrate.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 15, 2013
    Applicant: Ji Fu Machinery & Equipment Inc.
    Inventor: Jerry Wong
  • Patent number: 8508009
    Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: August 13, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Hyuck Lim, Young-soo Park, Wenxu Xianyu, Hans S. Cho
  • Patent number: 8440906
    Abstract: A photovoltaic device having a first electrode layer, a high resistivity transparent film disposed on the first electrode, a second electrode layer, and an inorganic photoactive layer disposed between the first and second electrode layers, wherein the inorganic photoactive layer is disposed in at least partial electrical contact with the high resistivity transparent film, and in at least partial electrical contact with the second electrode. The photoactive layer has a first inorganic material and a second inorganic material different from the first inorganic material, wherein the first and second inorganic materials exhibit a type II band offset energy profile, and wherein the photoactive layer has a first population of nanostructures of a first inorganic material and a second population of nanostructures of a second inorganic material.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: May 14, 2013
    Assignee: The Regents of the University of California
    Inventors: A. Paul Alivisatos, Ilan Gur, Delia Milliron
  • Patent number: 8389388
    Abstract: A photonic device (200) and method (100) of making the photonic device (200) employs preferential etching of grain boundaries of a polycrystalline semiconductor material layer (210). The method (100) includes growing (110) the polycrystalline layer (210) on a substrate (201). The polycrystalline layer includes a transition region (212) of variously oriented grains and a region (214) of columnar grain boundaries (215) adjacent to the transition region. The method further includes preferentially etching (120) the columnar grain boundaries to provide tapered structures (220) of the semiconductor material that are continuous (217) with respective aligned grains (213) of the transition region. The tapered structures are predominantly single crystal. The method further includes forming (140) a conformal semiconductor junction (240) on the tapered structures and providing (160) first and second electrodes.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hans S. Cho, Theodore I. Kamins, Nathaniel J. Quitoriano
  • Publication number: 20130026468
    Abstract: A graphite substrate is processed to have surface unevenness in a range of 1 ?m to 8 ?m. Thereby, a semiconductor film to be laminated on the graphite substrate has a stable film quality, and thus adhesion of the graphite substrate and the semiconductor layer can be enhanced. When an electron blocking layer is interposed between the graphite substrate and the semiconductor layer, the electron blocking layer is thin and thus the surface unevenness of the graphite substrate is transferred onto the electron blocking layer. Consequently, the electron blocking layer also has surface unevenness approximately in such range. Thus, almost the same effect as a configuration in which the semiconductor layer is directly connected to the graphite substrate can be produced.
    Type: Application
    Filed: February 21, 2011
    Publication date: January 31, 2013
    Applicant: SHIMADZU CORPORATION
    Inventors: Toshinori Yoshimuta, Satoshi Tokuda, Koichi Tanabe, Hiroyuki Kishihara, Masatomo Kaino, Akina Yoshimatsu, Toshiyuki Sato, Shoji Kuwabara
  • Patent number: 8357940
    Abstract: A bottom gate-type thin film transistor includes a gate insulating film, an interlayer insulating film formed on the gate insulating film, having an opening which is formed in a formation region of a gate electrode, and a semiconductor film formed on the interlayer insulating film so as to cover the opening. The interlayer insulating film contains nitrides in an amount larger than that in the gate insulating film, and the semiconductor film includes a microcrystalline semiconductor film or a polycrystalline semiconductor film formed on semiconductor crystalline nuclei which are formed on the gate insulating film and the interlayer insulating film and contain at least Ge.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: January 22, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Isao Suzumura, Yoshiaki Toyota, Mieko Matsumura
  • Publication number: 20120318335
    Abstract: A photovoltaic device and method for fabricating a photovoltaic device include forming a light-absorbing semiconductor structure on a transmissive substrate including a first doped layer and forming an intrinsic layer on the first doped layer, wherein the intrinsic layer includes an amorphous material. The intrinsic layer is treated with a plasma to form seed sites. A first tunnel junction layer is formed on the intrinsic layer by growing microcrystals from the seed sites.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: AHMED ABOU-KANDIL, KEITH E. FOGEL, AUGUSTIN J. HONG, JEEHWAN KIM, DEVENDRA K. SADANA
  • Publication number: 20120292619
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 22, 2012
    Inventor: Leonard Forbes
  • Publication number: 20120288985
    Abstract: A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way.
    Type: Application
    Filed: January 26, 2011
    Publication date: November 15, 2012
    Applicant: Commissariat A L'Energie Atomique Et Aux Energies Alternatives
    Inventors: Hubert Moriceau, Pierre Mur, Pierre-Jean Ribeyron
  • Publication number: 20120261669
    Abstract: The present invention belongs to the technical field of optical interconnection and relates to a photo detector, in particular to a photo detector consisting of tunneling field-effect transistors.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 18, 2012
    Applicant: FUDAN UNIVERSITY
    Inventors: Pengfei Wang, Xi Lin, Wei Wang, Xiaoyong Liu, Wei Zhang
  • Publication number: 20120261670
    Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Roy, Jens Prima
  • Publication number: 20120258561
    Abstract: In embodiments of the present invention an undoped amorphous, nanocrystalline or microcrystalline semiconductor layer and a heavily doped amorphous, nanocrystalline, or microcrystalline semiconductor layer are formed on a monocrystalline silicon lamina. The lamina is the base region of a photovoltaic cell, while the amorphous, nanocrystalline or monocrystalline layers serve to passivate the surface of the lamina, reducing recombination at this surface. In embodiments, the heavily doped layer additionally serves as either the emitter of the cell or to provide electrical contact to the base layer. The undoped and heavily doped layers are deposited at low temperature, for example about 150 degrees C. or less with hydrogen dilution. This low temperature allows use of low-temperature materials and methods, while increased hydrogen dilution improves film quality and/or conductivity.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 11, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Jian Li, Venkatesan Murali, Yonghua Liu, Dong Xu
  • Publication number: 20120255612
    Abstract: Discloses is a method for depositing a thin metal oxide film on a substrate, comprising: providing a substrate (104); sequentially and alternatingly exposing a surface of said substrate to a first metal precursor and a first oxidant precursor, so as to deposit a first portion (116) of said metal oxide film (114) having a first thickness; and sequentially and alternatingly exposing the surface of the substrate to a second metal precursor and a second oxidant precursor, so as to deposit a second portion (118) of said metal oxide film (114) having a second thickness over said first portion of said metal oxide film, wherein the second oxidant precursor is ozone or oxygen plasma, while the first oxidant precursor is a milder oxidant than ozone. Also disclosed is a solar cell (100) including a metal oxide passivation film (114) deposited by said method.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 11, 2012
    Inventor: Dieter Pierreux
  • Publication number: 20120231575
    Abstract: The occurrence of internal stress is reduced during the solar cell production process, thereby reducing crystal defects and recombination loss. Provided is a method for producing a solar cell having a p-n junction, which involves a step for forming a p-type layer on a semiconductor substrate by applying a coating liquid for diffusion containing impurity which serves as an acceptor, and by diffusing the impurity by means of thermal diffusion and/or a step for forming an n-type layer on a semiconductor substrate by applying a coating liquid for diffusion containing impurity which serves as a donor, and by diffusing the impurity through a thermal diffusion treatment.
    Type: Application
    Filed: October 21, 2010
    Publication date: September 13, 2012
    Inventor: Kaoru Okaniwa
  • Publication number: 20120227808
    Abstract: Disclosed is a process for producing a silicon powder, which comprises the steps of: powderizing a silicon ingot having a grade of 99.999% or more into a crude silicon powder having a particle diameter of 3 mm or less by means of high-pressure purified-water cutting; and reducing the crude silicon powder into a silicon powder having a particle diameter ranging from 0.01 to 10 [mu]m inclusive by means of at least one method selected from jet milling, wet granulation, ultrasonic wave disruption and shock wave disruption. The process is a technique for producing a silicon powder rapidly from a silicon ingot without reducing purity.
    Type: Application
    Filed: October 19, 2010
    Publication date: September 13, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Ichiro Nakayama, Hitoshi Yamanishi, Yoshihisa Ooido, Nobuyuki Kamikihara, Tomohiro Okumura
  • Publication number: 20120211079
    Abstract: A method of forming a photovoltaic device that includes providing an absorption layer of a first crystalline semiconductor material having a first conductivity type, and epitaxially growing a second crystalline semiconductor layer of a second conductivity type that is opposite the first conductivity type. The first conductivity type may be p-type and the second conductivity type may be n-type, or the first conductivity type may be n-type and the second conductivity type may be p-type. The temperature of the epitaxially growing the second crystalline semiconductor layer does not exceed 500° C. Contacts are formed in electrical communication with the absorption layer and the second crystalline semiconductor layer.
    Type: Application
    Filed: February 23, 2011
    Publication date: August 23, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20120211749
    Abstract: To improve the performance of a protection circuit including a diode formed using a semiconductor film. A protection circuit is inserted between two input/output terminals. The protection circuit includes a diode which is formed over an insulating surface and is formed using a semiconductor film. Contact holes for connecting an n-type impurity region and a p-type impurity region of the diode to a first conductive film in the protection circuit are distributed over the entire impurity regions. Further, contact holes for connecting the first conductive film and a second conductive film in the protection circuit are dispersively formed over the semiconductor film. By forming the contact holes in this manner, wiring resistance between the diode and a terminal can be reduced and the entire semiconductor film of the diode can be effectively serve as a rectifier element.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Osamu FUKUOKA, Masahiko HAYAKAWA, Hideaki SHISHIDO
  • Patent number: 8187905
    Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: May 29, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Hyuck Lim, Young-soo Park, Wenxu Xianyu, Hans S. Cho
  • Publication number: 20120126231
    Abstract: An electric double layer capacitor, a lithium ion capacitor, and a charging device including a solar cell and either of the capacitors are disclosed. The electric double layer capacitor includes a first and second light-transmitting substrates; a pair of current collectors provided perpendicular to the substrates; active material layers provided on facing planes of the current collectors; and an electrolyte in a region surrounded by the substrates and the facing active material layers. The lithium ion capacitor includes a first and second light-transmitting substrates; a positive and negative electrode active material layers provided perpendicular to the substrates; and an electrolyte in a region surrounded by the facing substrates and the positive and negative electrode active material layers.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 24, 2012
    Inventors: Junpei MOMO, Yumiko SAITO, Rie MATSUBARA, Hiroatsu TODORIKI
  • Patent number: 8178778
    Abstract: A photovoltaic conversion element includes a one conductivity-type crystalline Si semiconductor; an opposite conductivity-type semiconductor which is joined to the crystalline Si semiconductor to form a pn junction therebetween; an electrode provided on the opposite conductivity-type semiconductor; and a depletion region formed from the side of the one conductivity-type crystalline Si semiconductor to the side of the opposite conductivity-type semiconductor across the pn junction formed therebetween. The depletion region has a first depletion region located inside the crystalline Si semiconductor and under the electrode, and the first depletion region has an oxygen concentration of 1E18 [atoms/cm3] or less.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: May 15, 2012
    Assignee: Kyocera Corporation
    Inventors: Koichiro Niira, Tomonari Sakamoto, Norihiko Matsushima
  • Publication number: 20120091456
    Abstract: A conformal electro-magnetic (EM) detector and a method of applying such a detector are provided herein as well as variations thereof Variations include, but are not limited to, single-element, area detectors; an array of multiple active elements.
    Type: Application
    Filed: August 16, 2011
    Publication date: April 19, 2012
    Applicant: LOCKHEED MARTIN CORPORATION
    Inventors: Matthew KELLEY, Christian Adams, Richard Reim
  • Publication number: 20120094430
    Abstract: A method of manufacturing a solar cell includes: forming a first electrode on a substrate; forming a P-type layer on the first electrode; forming an N-type layer on the P-type layer using a crystalline silicon manufacturing apparatus; and forming a second electrode on the N-type layer to form the solar cell. In this method, the forming of the N-type layer includes contacting the P-type layer with a gas including monosilane and hydrogen to form a sub N-type layer including an amorphous silicon layer, mirco-crystallizing the amorphous silicon layer by irradiating light onto the amorphous silicon layer, and repeating the contacting and the mirco-crystallizing to form the N-type layer.
    Type: Application
    Filed: May 27, 2011
    Publication date: April 19, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Seung-Jae JUNG
  • Publication number: 20120073650
    Abstract: Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: David Smith, Helen Liu, Tim Dennis, Jane Manning, Hsin-Chiao Luan, Ann Waldhauer, Genevieve A. Solomon, Brenda Pagulayan Malgapu, Joseph Ramirez
  • Patent number: 8119904
    Abstract: A multi-junction photovoltaic device includes a silicon substrate and a dielectric layer formed on the silicon substrate. A germanium layer is formed on the dielectric layer. The germanium includes a crystalline structure that is substantially similar to the crystalline structure of the silicon substrate. A first photovoltaic sub-cell includes a first plurality of doped semiconductor layers formed on the germanium layer. At least a second photovoltaic sub-cell includes a second plurality of doped semiconductor layers formed on the first photovoltaic sub-cell that is on the germanium layer that is on the dielectric layer.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Harold J. Hovel
  • Publication number: 20120032168
    Abstract: A photonic device (200) and method (100) of making the photonic device (200) employs preferential etching of grain boundaries of a polycrystalline semiconductor material layer (210). The method (100) includes growing (110) the polycrystalline layer (210) on a substrate (201). The polycrystalline layer includes a transition region (212) of variously oriented grains and a region (214) of columnar grain boundaries (215) adjacent to the transition region. The method further includes preferentially etching (120) the colunmar grain boundaries to provide tapered structures (220) of the semiconductor material that are continuous (217) with respective aligned grains (213) of the transition region. The tapered structures are predominantly single crystal. The method further includes forming (140) a conformal semiconductor junction (240) on the tapered structures and providing (160) first and second electrodes.
    Type: Application
    Filed: April 30, 2009
    Publication date: February 9, 2012
    Inventors: Hans S. Cho, Theodore I. Kamins, Nathaniel J. Quitoriano
  • Publication number: 20120032169
    Abstract: The present invention relates to a visible ray sensor and a light sensor capable of improving photosensitivity by preventing photodegradation. The visible ray sensor may include: a substrate, a light blocking member formed on the substrate, and a visible ray sensing thin film transistor formed on the light blocking member. The light blocking member may be made of a transparent electrode, a band pass filter, or an opaque metal.
    Type: Application
    Filed: December 28, 2010
    Publication date: February 9, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Youn Han, Jun-Ho Song, Kyung-Sook Jeon, Mi-Seon Seo, Sung-Hoon Yang, Suk-Won Jung, Seung Mi Seo
  • Publication number: 20120019496
    Abstract: A field-effect transistor (62a) has a back gate (62ag2). The back gate (62ag2), a cathode of a photodiode (62b), and a first end of a first capacitor (62c) are connected with each other via a first node (netA). An anode of the photodiode (62b) is connected with a first line (Vrst). A second end of the first capacitor (62c) is connected with a second line (Csn). A gate (62ag1) of the field-effect transistor (62a) is connected with a third line (Vrwn), and a drain of the filed-effect transistor (62a) is connected with a fourth line (Vsm). A source of the field-effect transistor (62a) is an output of an output amplifier (62a).
    Type: Application
    Filed: October 27, 2009
    Publication date: January 26, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Hajime Imai, Hideki Kitagawa
  • Patent number: 8101958
    Abstract: Embodiments relate to a semiconductor light-emitting device. The semiconductor light-emitting device comprises a plurality of compound semiconductor layers including a first 5 conductive semiconductor layer; an active layer on the first conductive semiconductor layer; and a second conductive semiconductor layer on the active layer; an electrode under the plurality of compound semiconductor layers; an electrode portion on the plurality of compound semiconductor layers; and a bending i0 prevention member comprising a pattern on the plurality of compound semiconductor layers.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: January 24, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Publication number: 20120009729
    Abstract: A method for manufacturing a solar cell is disclosed. A conductive layer is introduced into a mold having an interior defining a shape of a solar cell. A planar capillary space is formed along the conductive layer. A measure of silicon is placed in fluid communication with the capillary space. The silicon is melted and allowed to flow into the capillary space. The melted silicon is then cooled within the capillary space such that the silicon forms a p-n junction along the conductive layer.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Applicant: Mossey Creek Solar, LLC
    Inventor: John Carberry
  • Patent number: 8093590
    Abstract: In order to form a metal thin film, a silicide film, or the like between an upper-layer unit cell and a lower-layer unit cell in stacked-layer photoelectric conversion devices, a step of forming the thin film is additionally needed. Therefore, a problem such as decline in productivity of the photoelectric conversion devices occurs. A first unit cell including a single crystal semiconductor layer with a thickness of 10 ?m or less as a photoelectric conversion layer and a second unit cell including a non-single-crystal semiconductor layer as a photoelectric conversion layer, which is provided over the first unit cell, are at least included, and conductive clusters are dispersed between the unit cells. The conductive clusters are located between the lower-layer unit cell and the upper-layer unit cell to form an ohmic contact; thus, current flows between the both unit cells.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: January 10, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Publication number: 20120000528
    Abstract: Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 5, 2012
    Inventors: Tim Dennis, Scott Harrington, Jane Manning, David Smith, Ann Waldhauer
  • Publication number: 20110309361
    Abstract: A photoelectric conversion element includes a first conductive layer over a substrate; a first insulating layer covering the first conductive layer; a first semiconductor layer over the first insulating layer; a second conductive layer formed over the first semiconductor layer; an impurity semiconductor layer over the second semiconductor layer; a second conductive layer over the impurity semiconductor layer; a second insulating layer covering the first semiconductor layer and the second conductive layer; and a light-transmitting third conductive layer over the second insulating layer. A first opening and a second opening are formed in the second insulating layer. In the first opening, the first semiconductor layer is connected to the third conductive layer. In the second opening, the first conductive layer is connected to the third conductive layer. In the first opening, a light-receiving portion surrounded by an electrode formed of the second conductive layer is provided.
    Type: Application
    Filed: June 17, 2011
    Publication date: December 22, 2011
    Inventors: Koji Dairiki, Hidekazu Miyairi, Tsudoi Nagi
  • Publication number: 20110303898
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Application
    Filed: August 24, 2011
    Publication date: December 15, 2011
    Applicant: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Publication number: 20110303283
    Abstract: A solar cell structure of Group III-V semiconductor and method of manufacturing the same, comprising: a transparent substrate, an amorphous silicon layer, and at least a Group III-V polycrystalline semiconductor layer. Wherein, said amorphous silicon layer is formed on said transparent substrate through Plasma Enhanced Chemical Vapor Deposition (PECVD), and said Group III-V polycrystalline semiconductor layer is formed on said amorphous silicon layer sequentially by means of Metal-Organic Chemical Vapor Deposition (MOCVD). In said solar cell structure mentioned above, said transparent substrate replaces a conventional Group III-V substrate, hereby reducing its cost significantly, increasing surface area of said solar cell structure, hence increasing its light absorption area, and raising its photoelectric conversion efficiency.
    Type: Application
    Filed: January 31, 2011
    Publication date: December 15, 2011
    Applicant: AN CHING NEW ENERGY MACHINERY & EQUIPMENT CO., LTD .
    Inventors: YEE SHYI CHANG, CHI-JEN LIU
  • Patent number: 8076175
    Abstract: A thin silicon solar cell is described. Specifically, the solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a third region that creates heterojunction surface passivation. Amorphous silicon layers are deposited on both sides of the silicon wafer at temperatures below approximately 400 degrees Celsius to reduce the loss of passivation properties of the amorphous silicon. A final layer of transparent conductive oxide is formed on both sides at approximately 165 degrees Celsius. Metal contacts are applied to the transparent conductive oxide. The low temperatures and very thin material layers used to fabricate the outer layers of used to fabricate the outer layers of the solar cell protect the thin wafer from excessive stress that may lead to deforming the wafer.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: December 13, 2011
    Inventors: Daniel L. Meier, Ajeet Rohatgi
  • Publication number: 20110277826
    Abstract: A solar cell includes a substrate of a first conductive type; an emitter part of a second conductive type positioned at a front surface of the substrate; a first silicon thin film layer positioned on the emitter part and including amorphous silicon containing impurities of the second type that are doped therein; a first transparent conductive layer positioned on the first silicon thin film layer and electrically connected with the emitter part; a first electrode positioned on the first transparent conductive layer and electrically connected with the first transparent conductive layer; and a second electrode positioned on a back surface of the substrate. For example, the first silicon thin film layer includes N+-a-Si:H or N+-a-SiC:H.
    Type: Application
    Filed: October 6, 2010
    Publication date: November 17, 2011
    Inventors: Kyoungsoo LEE, Jonghwan Kim, Juwan Kang, Manhyo Ha, Daehee Jang
  • Publication number: 20110232753
    Abstract: A method and apparatus for making solar cell active layers is provided. A doped microcrystalline semiconductor layer is formed with a bandgap-enhancing alloy material at low hydrogen flow rates. Deposition conditions are established at a low flowrate of the semiconductor source and ramped to a high flowrate as a first sublayer is deposited. The bandgap-enhancing alloy material is added to the reaction mixture to deposit a second sublayer. The bandgap-enhancing alloy material may optionally be stopped to deposit a third sublayer.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 29, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Shuran Sheng, Yong Kee Chae
  • Publication number: 20110226316
    Abstract: The present invention provides improved solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 22, 2011
    Applicant: PVOPTIX
    Inventors: James P. Campbell, Harry R. Campbell, Ann B. Campbell, Joel F. Farber
  • Publication number: 20110220197
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a flexible substrate; a first electrode and a second electrode located over the flexible substrate; and at least one unit cell located between the first electrode and the second electrode, wherein the first electrode includes a transparent conductive oxide layer, wherein a texturing structure is formed on the transparent conductive oxide layer, and wherein a ratio of a root mean square (rms) roughness to an average pitch of the texturing structure is equal to or more than 0.05 and equal to or less than 0.13.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 15, 2011
    Inventor: Seung-Yeop Myong