Including Only Group Iv Element (epo) Patents (Class 257/E31.044)
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Patent number: 8987856Abstract: A photodiode, a light sensor and a fabricating method thereof are disclosed. An n-type semiconductor layer and an intrinsic semiconductor layer of the photodiode respectively comprise n-type amorphous indium gallium zinc oxide (IGZO) and intrinsic IGZO. The oxygen content of the intrinsic amorphous IGZO is greater than the oxygen content of the n-type amorphous IGZO. A light sensor comprise the photodiode is also disclosed.Type: GrantFiled: March 29, 2012Date of Patent: March 24, 2015Assignee: E Ink Holdings Inc.Inventors: Fang-An Shu, Yao-Chou Tsai, Ted-Hong Shinn
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Publication number: 20140087513Abstract: A photovoltaic device and method include a crystalline substrate and an emitter contact portion formed in contact with the substrate. A back-surface-field junction includes a homogeneous junction layer formed in contact with the crystalline substrate and having a same conductivity type and a higher active doping density than that of the substrate. The homogeneous junction layer includes a thickness less than a diffusion length of minority carriers in the homogeneous junction layer. A passivation layer is formed in contact with the homogeneous junction layer opposite the substrate, which is either undoped or has the same conductivity type as that of the substrate.Type: ApplicationFiled: October 22, 2012Publication date: March 27, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: TZE-CHIANG CHEN, BAHMAN HEKMATSHOARTABARI, DEVENDRA K. SADANA, DAVOOD SHAHRJERDI
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Publication number: 20130171769Abstract: A manufacturing method of a composite poly-silicon substrate of solar cells includes the following steps: providing a first substrate layer having a purity ranging from 2N to 3N; and forming a second substrate layer on the first substrate layer, where the purity of the second substrate layer ranges from 6N to 9N.Type: ApplicationFiled: December 30, 2011Publication date: July 4, 2013Applicant: INNOVATION & INFINITY GLOBAL CORP.Inventor: CHAO-CHIEH CHU
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Publication number: 20130153901Abstract: A device includes semiconductor substrate having a front side and a backside. A polysilicon layer is disposed on the backside of the semiconductor substrate. The polysilicon layer includes a portion doped with a p-type impurity. A dielectric layer is disposed on the backside of the semiconductor substrate, wherein the polysilicon layer is between the semiconductor substrate and the polysilicon layer.Type: ApplicationFiled: January 18, 2012Publication date: June 20, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shiu-Ko JangJian, Kei-Wei Chen, Ying-Lang Wang
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Publication number: 20130059413Abstract: A pixel of an image sensor includes a polysilicon layer, and an active region which needs to be electrically coupled with the polysilicon layer, wherein the polysilicon layer extends over a portion of the active region, such that the polysilicon layer and the active region are partially overlapped, and the polysilicon layer and the active region are coupled through a buried contact structure.Type: ApplicationFiled: November 1, 2012Publication date: March 7, 2013Inventors: Woon-Il Choi, Hyung-Sik Kim, Ui-Sik Kim
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Publication number: 20120322199Abstract: An improved method of manufacturing a polysilicon solar cell is disclosed. To create the polysilicon layer, which has p-type and n-type regions, the layer is grown in the presence of one type of dopant. After the doped polysilicon layer has been created, ions of the opposite dopant conductivity are selectively implanted into portions of the polysilicon layer. This selective implant may be performed using a shadow mask.Type: ApplicationFiled: June 15, 2011Publication date: December 20, 2012Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventor: John Graff
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Publication number: 20120318340Abstract: One embodiment of the present invention provides a back junction solar cell. The solar cell includes a base layer, a quantum-tunneling-barrier (QTB) layer situated below the base layer facing away from incident light, an emitter layer situated below the QTB layer, a front surface field (FSF) layer situated above the base layer, a front-side electrode situated above the FSF layer, and a back-side electrode situated below the emitter layer.Type: ApplicationFiled: August 31, 2012Publication date: December 20, 2012Applicant: SILEVO, INC.Inventors: Jiunn Benjamin Heng, Jianming Fu, Zheng Xu, Zhigang Xie
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Publication number: 20120213468Abstract: A silicon photonic photodetector structure, a method for fabricating the silicon photonic photodetector structure and a method for operating a silicon photonic photodetector device that results from the photonic photodetector structure each use a strip waveguide optically coupled with a polysilicon material photodetector layer that may be contiguous with a semiconductor material slab to which is located and formed a pair of electrical contacts separated by the polysilicon material photodetector layer. Within the foregoing silicon photonic photodetector structure and related methods the polysilicon material photodetector layer includes defect states suitable for absorbing an optical signal from the strip waveguide and generating an electrical output signal using at least one of the electrical contacts when the optical signal includes a photon energy less than a band gap energy of a polysilicon material from which is comprised the polysilicon material photodetector layer.Type: ApplicationFiled: February 16, 2012Publication date: August 23, 2012Applicant: CORNELL UNIVERSITYInventors: Michal Lipson, Kyle Preston
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Publication number: 20120192937Abstract: A thin film structure for photovoltaic applications includes a biaxially textured metal substrate; a seed layer epitaxially disposed on the metal substrate; a barrier layer comprising SrTiO3 epitaxially disposed on the seed layer; a cap layer comprising ?-Al2O3 epitaxially disposed on the SrTiO3 barrier layer; and a crystalline silicon layer epitaxially disposed on the cap layer, where the cap layer comprises a volume fraction of biaxial texture of at least about 80% and the crystalline silicon layer does not include a metal silicide phase.Type: ApplicationFiled: January 28, 2011Publication date: August 2, 2012Inventors: Mariappan Parans Paranthaman, Sung-Hun Wee, Frederick A. List, III, Claudia Cantoni, Lee Heatherly, JR., Kyunghoon Kim, Thomas R. Fanning, Jon Bornstein
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Publication number: 20120180853Abstract: A photovoltaic structure having a semiconductor substrate, and metal particles bonded to the semiconductor substrate. The photovoltaic structure is sufficiently thin to be translucent or semitransparent. The metal particles are produced when a layer of metal is deposited onto the semiconductor substrate and heated. The photovoltaic structure is capable of causing generation of an electrical current upon exposure to electromagnetic radiation within one or more of the infrared spectrum, the visible light spectrum, or the ultraviolet spectrum.Type: ApplicationFiled: January 11, 2012Publication date: July 19, 2012Applicant: SI-NANO, INC.Inventor: José BRICEÑO
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Patent number: 8134179Abstract: A photodiode in which a pn junction is formed between the doped region (DG) formed in the surface of a crystalline semiconductor substrate and a semiconductor layer (HS) deposited above said doped region. An additional doping (GD) is provided in the edge region of the doped zone, by means of which additional doping the pn junction is shifted deeper into the substrate (SU). With the greater distance of the pn junction from defects at phase boundaries that is achieved in this way, the dark current within the photodiode is reduced.Type: GrantFiled: April 28, 2006Date of Patent: March 13, 2012Assignee: austriamicrosystems AGInventors: Jochen Kraft, Bernhard Löffler, Gerald Meinhardt
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Patent number: 7999250Abstract: In accordance with one or more embodiments, a semiconductor structure includes a semiconductor substrate, a first semiconductor material over the semiconductor substrate, and a second semiconductor material over a portion the first semiconductor material, wherein the second semiconductor material comprises silicon-germanium-carbon (SiGeC) and wherein the first semiconductor material is a silicon epitaxial layer. The semiconductor structure further includes an active device, wherein a portion of the active device is formed in the second semiconductor material and a dielectric structure extending from the first surface of the first semiconductor material into the semiconductor substrate through the first semiconductor material.Type: GrantFiled: February 27, 2009Date of Patent: August 16, 2011Assignee: HVVi Semiconductors, Inc.Inventors: Bishnu Prasanna Gogoi, Robert Bruce Davies
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Publication number: 20100200062Abstract: A solar cell and a method for manufacturing the same is disclosed, wherein the solar cell comprises a first cell comprised of a semiconductor wafer with a PN structure; a second cell comprised of a thin film semiconductor layer with a PIN structure, formed on one surface of the first cell; a first electrode layer formed on one surface of the second cell; and a second electrode layer formed on the other surface of the first cell. Unlike the related art solar cell, the solar cell according to the present invention can absorb the light of long-wavelength range in the first cell, and the light of short-wavelength range in the second cell. As a result, it is possible for the solar cell according to the present invention to absorb the light of all ranges, thereby realizing the high efficiency of 20% or above. Also, the entire process time becomes shortened since there is no requirement for the procedure of forming the silicon thin film for a long period of time.Type: ApplicationFiled: September 16, 2008Publication date: August 12, 2010Applicant: JUSUNG ENGINEERING CO., LTD.Inventors: Jin Hong, Joung Sik Kim
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Publication number: 20100171122Abstract: The photoelectric conversion device includes: a photoelectric conversion element in which a first electrode, a photoelectric conversion layer, and a second electrode are stacked in this order; and a thin film transistor (TFT) connected to the first electrode of the photoelectric conversion element via a contact hole, wherein the photoelectric conversion layer including a first photoelectric conversion layer disposed at a location which does not overlap with the contact hole and a second photoelectric conversion layer disposed at a location which overlaps with the contact hole, the first photoelectric conversion layer and the second photoelectric conversion layer are separated from each other by a separation groove, and the second electrode is selectively formed on the first photoelectric conversion layer, and the photoelectric conversion element is formed by the first electrode, the first photoelectric conversion layer, and the second electrode.Type: ApplicationFiled: December 10, 2009Publication date: July 8, 2010Applicant: SEIKO EPSON CORPORATIONInventor: Tsukasa EGUCHI
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Publication number: 20100139764Abstract: A solar cell includes abutting P-type and N-type doped regions in a contiguous portion of a polysilicon layer. The polysilicon layer may be formed on a thin dielectric layer, which is formed on a backside of a solar cell substrate (e.g., silicon wafer). The polysilicon layer has a relatively large average grain size to reduce or eliminate recombination in a space charge region between the P-type and N-type doped regions, thereby increasing efficiency.Type: ApplicationFiled: November 25, 2009Publication date: June 10, 2010Inventor: David D. SMITH
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Patent number: 7719031Abstract: A bipolar transistor 120 comprises a substrate 1, a intrinsic base region 11 and an extrinsic base region 12. The intrinsic base region 11 comprises a silicon buffer layer 109 comprised of silicon which is formed on the substrate 1, and a composition-ratio graded base layer 111 which is formed on the silicon buffer layer and comprises silicon and at least germanium and where a composition ratio of the germanium to the silicon varies in a thickness direction of the composition-ratio graded base layer 111. The extrinsic base region 12 comprises an extrinsic base formation layer 113 comprised of silicon which is formed on the substrate and adjacent to the silicon buffer layer. And the thickness of the extrinsic base formation layer 113 is not less than 40 nm.Type: GrantFiled: July 6, 2004Date of Patent: May 18, 2010Assignee: Panasonic CorporationInventors: Tohru Saitoh, Takahiro Kawashima, Ken Idota, Yoshihiko Kanzawa, Teruhito Ohnishi
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Publication number: 20100116328Abstract: A process for producing a photovoltaic device having a high conversion efficiency with improved productivity. The process for producing a photovoltaic device includes an n-layer formation step of depositing an n-layer composed of crystalline silicon on a substrate disposed inside a deposition chamber under reduced pressure conditions by heating the substrate with a heating device to convert the substrate to a heated state, supplying a raw material gas to the inside of the deposition chamber, and then supplying power to a discharge electrode positioned opposing the substrate, wherein the n-layer formation step comprises depositing the n-layer with the pressure inside the deposition chamber set to not less than 500 Pa and not more than 1,000 Pa, and the distance between the substrate and the discharge electrode set to not less than 6 mm and not more than 12 mm.Type: ApplicationFiled: December 19, 2008Publication date: May 13, 2010Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventor: Youji Nakano
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Publication number: 20100029038Abstract: There is manufactured a solar cell having a high energy conversion efficiency. A surface layer of a polycrystalline silicon layer serving as a n-type layer formed on a polycrystalline silicon substrate serving as a p-type layer is oxidized by using plasma and then a silicon nitride film is deposited by a CVD process, whereby a passivation film is formed on the surface layer of the polycrystalline silicon layer. The plasma oxidation process is performed by using plasma having a sheath potential equal to or less than about 10 eV at a pressure ranging from about 6.67 Pa to about 6.67×102 Pa and at a temperature ranging from about 200° C. to about 600° C. A microwave for exciting plasma is supplied into a processing chamber through a slot antenna, and plasma is generated by a surface wave of the microwave.Type: ApplicationFiled: November 6, 2007Publication date: February 4, 2010Applicant: TOKYO ELECTRON LIMITEDInventor: Shigemi Murakawa
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Publication number: 20090183772Abstract: Disclosed herein is a method of forming a light-absorbing layer of a polycrystalline silicon solar cell, including: forming a polycrystalline silicon layer on a back electrode; forming an intrinsic amorphous silicon layer on the polycrystalline silicon layer; and heat-treating the transparent insulating substrate to vertically crystallize the intrinsic amorphous silicon layer using the polycrystalline silicon layer as a seed for crystallization through a metal induced vertical crystallization (MIVC) process to form the intrinsic amorphous silicon layer into a light-absorbing layer made of polycrystalline silicon, and is a method of fabricating a high-efficiency polycrystalline silicon solar cell using the light-absorbing layer.Type: ApplicationFiled: January 16, 2009Publication date: July 23, 2009Applicant: SNU R&DB FOUNDATIONInventors: SEUNG KI JOO, HYEONG SUK YOO, YOUNG SU KIM
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Publication number: 20090038682Abstract: A semiconductor substrate for a solar cell, comprising the semiconductor substrate having a surface which constitutes a light incident face of the solar cell and having a surface irregularities structure, wherein the surface has an surface area from 1.2 to 2.2 times that of an imaginary smooth face and the standard deviation of the heights of the irregularities is 1.0 ?m or less.Type: ApplicationFiled: May 26, 2005Publication date: February 12, 2009Inventors: Yuji Komatsu, Hiroyuki Fukumura, Yoshiroh Takaba, Ryoh Ozaki, Tohru Nunoi
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Publication number: 20080311697Abstract: The invention relates to a method for simultaneous recrystallisation and doping of semiconductor layers, in particular for the production of crystalline silicon thin layer solar cells. In this method, in a first step a substrate base layer 1 is produced, in a step subsequent thereto, on the latter an intermediate layer system 2 which has at least one doped partial layer is deposited, in a step subsequent thereto, an absorber layer 3 which is undoped or likewise doped is deposited on the intermediate layer system 2, and in a recrystallisation step, the absorber layer 3 is heated, melted, cooled and tempered. In an advantageous method modification, instead of an undoped capping layer, a capping layer system 4 which has at least one partial layer can also be applied applied on the absorber layer 3.Type: ApplicationFiled: September 14, 2005Publication date: December 18, 2008Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDInventor: Stefan Reber
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Publication number: 20080128698Abstract: A CMOS image sensor with a many million pixel count. Applicants have developed techniques for combining its continuous layer photodiode CMOS sensor technology with CMOS integrated circuit lithography stitching techniques to provide digital cameras with an almost unlimited number of pixels. A preferred CMOS stitching technique exploits the precise alignment accuracy of CMOS stepper processes by using specialized mask sets to repeatedly produce a single pixel array pattern many times on a single silicon wafer with no pixel array discontinuities. The single array patterns are stitched together lithographically to form a pixel array of many million pixels. A continuous multilayer photodiode layer is deposited over the top of the many million pixel array to provide a many million pixel sensor with a fill factor of 100 percent or substantially 100 percent.Type: ApplicationFiled: September 28, 2007Publication date: June 5, 2008Inventors: Peter Martin, Paul Johnson, Chris Sexton
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Patent number: 7279764Abstract: An imager with pixels having a resonant-cavity photodiode. The resonant cavity photodiode increases absorption of light having long wavelengths. A trench is formed for the photodiode and reflective film is grown on the bottom of the trench. The reflective film reflects light that is not initially absorbed back to the active region of the photodiode.Type: GrantFiled: June 1, 2004Date of Patent: October 9, 2007Assignee: Micron Technology, Inc.Inventor: Chandra Mouli