Including Only Group Iv Element (epo) Patents (Class 257/E31.048)
  • Patent number: 8759670
    Abstract: A photovoltaic converter device includes a photovoltaic conversion layer containing a plurality of nanoparticles in a first material in a dispersed state, wherein the nanoparticles include a second material in particles and a third material that coats the second material, the third material having a band gap E3 that is greater than a band gap E1 of the first material, and greater than a band gap E2 of the second material.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: June 24, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Masahiro Furusawa
  • Patent number: 8704083
    Abstract: In a thin film photoelectric conversion deice fabricated by addition of a catalyst element with the use of a solid phase growth method, defects such as a short circuit or leakage of current are suppressed. A catalyst material which promotes crystallization of silicon is selectively added to a second silicon semiconductor layer formed over a first silicon semiconductor layer having one conductivity type, the second silicon semiconductor layer is partly crystallized by a heat treatment, a third silicon semiconductor layer having a conductivity type opposite to the one conductivity type is stacked, and element isolation is performed at a region in the second silicon semiconductor layer to which a catalyst material is not added, so that a left catalyst material is prevented from being diffused again, and defects such as a short circuit or leakage of current are suppressed.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: April 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kazuo Nishi
  • Publication number: 20140087513
    Abstract: A photovoltaic device and method include a crystalline substrate and an emitter contact portion formed in contact with the substrate. A back-surface-field junction includes a homogeneous junction layer formed in contact with the crystalline substrate and having a same conductivity type and a higher active doping density than that of the substrate. The homogeneous junction layer includes a thickness less than a diffusion length of minority carriers in the homogeneous junction layer. A passivation layer is formed in contact with the homogeneous junction layer opposite the substrate, which is either undoped or has the same conductivity type as that of the substrate.
    Type: Application
    Filed: October 22, 2012
    Publication date: March 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: TZE-CHIANG CHEN, BAHMAN HEKMATSHOARTABARI, DEVENDRA K. SADANA, DAVOOD SHAHRJERDI
  • Publication number: 20140007933
    Abstract: Disclosed are a thin film solar cell and a method of manufacturing the thin film solar cell. The thin film solar cell according to an exemplary embodiment of the present invention thin film solar cell includes a substrate: a front electrode layer formed on the substrate; an oxide layer formed on the front electrode layer: a light absorbing layer (intrinsic layer) formed on the oxide layer; and a back electrode layer formed on the light absorbing layer, wherein the oxide layer is formed of a material selected from MoO2, WO2, V2O5, NiO and CrO3.
    Type: Application
    Filed: August 10, 2012
    Publication date: January 9, 2014
    Applicant: KOREA INSTITUTE OF MACHINERY & MATERIALS
    Inventors: Seoung Yoon RYU, Dong Ho KIM, Kee Seok NAM, Yong Soo JEONG, Jung Dae KWON, Sung Hun LEE, Jung Heum YUN, Gun Hwan LEE, Hyung Hwan JUNG, Sung Gyu PARK, Chang Su KIM, Jae Wook KANG, Keong Su LIM, Sang II PARK
  • Patent number: 8592230
    Abstract: A method of patterning a substrate includes providing a focusing plate adjacent to a plasma chamber containing a plasma, the focusing plate configured to extract ions from the plasma through at least one aperture that provides focused ions towards the substrate. The method further includes directing first ions through the at least one aperture to one or more first regions of the substrate so as to condense first gaseous species provided in ambient of the substrate on the one or more first regions of the substrate.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: November 26, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Deepak A. Ramappa, Ludovic Godet
  • Patent number: 8541775
    Abstract: A schottky diode, a resistive memory device including the schottky diode and a method of manufacturing the same. The resistive memory device includes a semiconductor substrate including a word line, a schottky diode formed on the word line, and a storage layer formed on the schottky diode. The schottky diode includes a first semiconductor layer, a conductive layer formed on the first semiconductor layer and having a lower work function than the first semiconductor layer, and a second semiconductor layer formed on the to conductive layer.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: September 24, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seung Beom Baek, Young Ho Lee, Jin Ku Lee, Mi Ri Lee
  • Patent number: 8421074
    Abstract: A Semiconductor device including, on at least one surface of a layer made of a crystalline semiconductor material of a certain type of conductivity, a layer made of an amorphous semiconductor material, doped with a type of conductivity opposite to the type of conductivity of the crystalline semiconductor material layer, characterized in that the concentration of the doping elements in the amorphous semiconductor layer varies gradually.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: April 16, 2013
    Assignees: Centre National de la Recherche Scientifique (CNRS), Ecole Polytechnique
    Inventors: Pere Roca I. Cabarrocas, Jerome Damon-Lacoste
  • Publication number: 20130056732
    Abstract: A display device includes: a substrate; an infrared sensing transistor on the substrate; a readout transistor connected to the infrared sensing transistor; a power source line; and a light blocking member on the infrared sensing transistor, where the infrared sensing transistor includes a light blocking film on the substrate, a first gate electrode contacting and overlapping the light blocking film and connected to a power source line, a first semiconductor layer on the first gate electrode overlapping the light blocking film, and first source and drain electrodes on the first semiconductor layer, where the readout transistor includes a second gate electrode on the substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and second source and drain electrodes the second semiconductor layer, and where the power source line and the first gate electrode are at a same layer.
    Type: Application
    Filed: February 6, 2012
    Publication date: March 7, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Suk Won JUNG, Sung Hoon YANG, Sang-Youn HAN, Seung Mi SEO, Mi-Seon SEO
  • Publication number: 20130048071
    Abstract: A thin film amorphous silicon solar cell may have front contact between a hydrogenated amorphous silicon layer and a transparent conductive oxide layer. The cell may include a layer of a refractory metal, chosen among the group composed of molybdenum, tungsten, tantalum and titanium, of thickness adapted to ensure a light transmittance of at least 80%, interposed therebetween, before growing by PECVD a hydrogenated amorphous silicon p-i-n light absorption layer over it. A refractory metal layer of just about 1 nm thickness may effectively shield the oxide from the reactive plasma, thereby preventing a diffused defect when forming the p.i.n. layer that would favor recombination of light-generated charge carriers.
    Type: Application
    Filed: August 29, 2012
    Publication date: February 28, 2013
    Applicant: STMicroelectronics S.r.I.
    Inventors: Salvatore LOMBARDO, Cosimo GERARDI, Sebastiano RAVESI, Marina FOTI, Cristina TRINGALI, Stella LOVERSO, Nicola COSTA
  • Publication number: 20130019944
    Abstract: A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoar-Tabari, Marinus Hopstaken, Dae-Gyu Park, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 8349644
    Abstract: A method for producing a backside contact of a single p-n junction photovoltaic solar cell is provided. The method includes the steps of: providing a p-type substrate having a back surface; providing a plurality of p+ diffusion regions at the back surface of the substrate; providing a plurality of n+ diffusion regions at the back surface of the substrate in an alternate pattern with the p+ diffusion regions; providing an oxide layer over the p+ and n+ regions; providing an insulating layer over the back surface of the substrate; providing at least one first metal contact at the back surface for the p+ diffusion regions; and providing at least one second metal contact at the back surface for the n+ diffusion regions.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: January 8, 2013
    Assignee: e-Cube Energy Technologies, Ltd.
    Inventors: Wei Shan, Xiao-Dong Xiang
  • Publication number: 20120319111
    Abstract: A thin-film photoelectric conversion device includes a crystalline germanium photoelectric conversion layer having improved open circuit voltage, fill factor, and photoelectric conversion efficiency for light having a longer wavelength. The photoelectric conversion device comprises a first electrode layer, one or more photoelectric conversion units, and a second electrode layer sequentially stacked on a substrate, wherein each of the photoelectric conversion units comprises a photoelectric conversion layer arranged between a p-type semiconductor layer and an n-type semiconductor layer. At least one of the photoelectric conversion units includes a crystalline germanium photoelectric conversion layer comprising a crystalline germanium semiconductor that is substantially intrinsic or weak n-type and is essentially free of silicon.
    Type: Application
    Filed: January 27, 2011
    Publication date: December 20, 2012
    Applicant: KANEKA CORPORATION
    Inventors: Naoki Kadota, Toshiaki Sasaki
  • Publication number: 20120318340
    Abstract: One embodiment of the present invention provides a back junction solar cell. The solar cell includes a base layer, a quantum-tunneling-barrier (QTB) layer situated below the base layer facing away from incident light, an emitter layer situated below the QTB layer, a front surface field (FSF) layer situated above the base layer, a front-side electrode situated above the FSF layer, and a back-side electrode situated below the emitter layer.
    Type: Application
    Filed: August 31, 2012
    Publication date: December 20, 2012
    Applicant: SILEVO, INC.
    Inventors: Jiunn Benjamin Heng, Jianming Fu, Zheng Xu, Zhigang Xie
  • Publication number: 20120291861
    Abstract: A heterojunction photovoltaic cell includes at least one crystalline silicon oxide film directly placed onto one of the front or rear faces of a crystalline silicon substrate, between said substrate and a layer of amorphous or microcrystalline silicon. The thin film is intended to enable the passivation of said face of the substrate. The thin film is more particularly obtained by radically oxidizing a surface portion of the substrate, before depositing the layer of amorphous silicon. Moreover, a thin layer of intrinsic or microdoped amorphous silicon can be placed between said think film and the layer of amorphous or microcrystalline silicon.
    Type: Application
    Filed: January 26, 2011
    Publication date: November 22, 2012
    Applicant: Commissariat A L'Energie Atomique Et Aux Energies Alternatives
    Inventors: Pierre Mur, Hubert Moriceau, Pierre-Jean Ribeyron
  • Publication number: 20120280232
    Abstract: A photoelectric conversion device includes a first photoelectric conversion unit on a substrate and having a first energy bandgap, a second photoelectric conversion unit having a second energy bandgap that is different from the first energy bandgap, the second photoelectric conversion unit being on the first photoelectric conversion unit, and an intermediate unit between the first and second photoelectric conversion units, the intermediate unit including a stack of a first intermediate layer and a second intermediate layer, each of the first intermediate layer and the second intermediate layer having a refractive index that is smaller than that of the first photoelectric conversion unit, the first intermediate layer having a first refractive index, and the second intermediate layer having a second refractive index that is smaller than the first refractive index.
    Type: Application
    Filed: March 5, 2012
    Publication date: November 8, 2012
    Inventors: Seung-Jae JUNG, Yuk-Hyun NAM, Ki-Won Jeon
  • Publication number: 20120199832
    Abstract: The present invention relates to a process for producing a doped silicon layer on a substrate, comprising the steps of (a) providing a liquid silane formulation and a substrate, (b) applying the liquid silane formulation to the substrate, (c) introducing electromagnetic and/or thermal energy to obtain an at least partly polymorphic silicon layer, (d) providing a liquid formulation which comprises at least one aluminium-containing metal complex, (e) applying this formulation to the silicon layer obtained after step (c) and then (f) heating the coating obtained after step (e) by introducing electromagnetic and/or thermal energy, which decomposes the formulation obtained after step (d) at least to metal and hydrogen, and then (g) cooling the coating obtained after step (f) to obtain an Al-doped or Al- and metal-doped silicon layer, to doped silicon layers obtainable by the process and to the use thereof for production of light-sensitive elements and electronic components.
    Type: Application
    Filed: November 10, 2010
    Publication date: August 9, 2012
    Applicant: Evonik Degussa GmbH
    Inventors: Bernhard Stuetzel, Wolfgang Fahrner
  • Publication number: 20120180853
    Abstract: A photovoltaic structure having a semiconductor substrate, and metal particles bonded to the semiconductor substrate. The photovoltaic structure is sufficiently thin to be translucent or semitransparent. The metal particles are produced when a layer of metal is deposited onto the semiconductor substrate and heated. The photovoltaic structure is capable of causing generation of an electrical current upon exposure to electromagnetic radiation within one or more of the infrared spectrum, the visible light spectrum, or the ultraviolet spectrum.
    Type: Application
    Filed: January 11, 2012
    Publication date: July 19, 2012
    Applicant: SI-NANO, INC.
    Inventor: José BRICEÑO
  • Publication number: 20120171809
    Abstract: A method for producing a lamina from a donor body includes implanting the donor body with an ion dosage and heating the donor body to an implant temperature during implanting. The donor body is separably contacted with a susceptor assembly, where the donor body and the susceptor assembly are in direct contact. A lamina is exfoliated from the donor body by applying a thermal profile to the donor body. Implantation and exfoliation conditions may be adjusted in order to maximize the defect-free area of the lamina.
    Type: Application
    Filed: December 20, 2011
    Publication date: July 5, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Adam Kell, Robert Clark-Phelps, Joseph D. Gillespie, Gopal Prabhu, Takao Sakase, Theodore H. Smick, Steve Zuniga, Steve Bababyan
  • Publication number: 20120167966
    Abstract: A solar cell includes a semiconductor base, a first doped semiconductor layer, an insulating layer, a second doped semiconductor layer and a first electrode layer. The semiconductor base has a first doped type. The first doped semiconductor layer, disposed on the semiconductor base, has a doped contact region. The insulating layer is disposed on the first doped semiconductor layer, exposing the doped contact region. The second doped semiconductor layer is disposed on the insulating layer and the doped contact region. The first doped semiconductor layer, the doped contact region and the second doped semiconductor layer have a second doped type, and a dopant concentration of the second doped semiconductor layer is between that of the first doped semiconductor layer and that of the doped contact region. The first electrode layer is disposed corresponding to the doped contact region.
    Type: Application
    Filed: May 5, 2011
    Publication date: July 5, 2012
    Inventors: Yen-Cheng Hu, Hsin-Feng Li, Zhen-Cheng Wu
  • Publication number: 20120171806
    Abstract: A thin silicon solar cell is described. An example solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a third region that creates heterojunction surface passivation. Amorphous silicon layers are deposited on both sides of the silicon wafer. A final layer of transparent conductive oxide is formed on both sides Metal contacts are applied to the transparent conductive oxide.
    Type: Application
    Filed: November 30, 2011
    Publication date: July 5, 2012
    Applicant: SUNIVA, INC.
    Inventors: DANIEL L. MEIER, AJEET ROHATGI
  • Publication number: 20120161130
    Abstract: A minute electrode, a photoelectric conversion device including the minute electrode, and manufacturing methods thereof are provided. A plurality of parallel groove portions and a region sandwiched between the groove portions are formed in a substrate, and a conductive resin is supplied to the groove portions and the region and is fixed, whereby the groove portions are filled with the conductive resin and the region is covered with the conductive resin. The supplied conductive resin is not expanded outward, and the electrode with a designed width can be formed. Part of the electrode is formed over the region sandwiched between the groove portions, thus, the area of a cross section in the short axis direction can be large, and a low resistance in the long axis direction can be obtained.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 28, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuji ODA, Takashi Hirose, Koichiro Tanaka, Sho Kato, Emi Koezuka
  • Publication number: 20120122269
    Abstract: A method of manufacturing a photovoltaic element (710) capable of inhibiting the thicknesses and the qualities of formed films from being nonuniform includes steps of forming a substrate-side electrode (712), forming a photoelectric conversion layer (713, 714) with a plasma processing apparatus (1) including a first electrode (3) and a second electrode (4) provided on a portion opposed to the first electrode with a plurality of gas supply ports (4a) formed along concentric circles so that the quantities of gas supplied through the gas supply ports are different from each other on an inner peripheral side and an outer peripheral side, and forming a rear electrode (715).
    Type: Application
    Filed: March 18, 2010
    Publication date: May 17, 2012
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Akihiro Kuroda
  • Publication number: 20120108002
    Abstract: The apparatus for thin film deposition for solar cells includes multiple unit chambers divided by a substrate as a boundary, a deposition gas injecting unit injecting deposition gases independently to each of the multiple unit chambers, and a decomposition unit in each of the multiple unit chambers to decompose the deposition gases, wherein both surfaces of the substrate each are exposed to the multiple unit chambers. The apparatus and the method for producing solar cells allow deposition on both surfaces of a substrate while the substrate is fixed without any rotation. Therefore, the number of processing units required for carrying out deposition is decreased, thereby providing high cost efficiency. Further, it results in a decrease in time during which the substrate is exposed to the exterior, thereby minimizing contamination of the surfaces of the substrate. As a result, it is possible to provide solar cells having excellent reliability.
    Type: Application
    Filed: September 25, 2011
    Publication date: May 3, 2012
    Applicant: Korea Institute of Energy Research
    Inventors: Jeongchul LEE, Jinsoo SONG, Junsik CHO, Sanghyun PARK
  • Publication number: 20120086005
    Abstract: A photoelectric conversion device including a single crystal silicon substrate; a first amorphous silicon layer in contact with a surface (a light-receiving surface) of the single crystal silicon substrate; a first polarity (p-type) impurity diffusion layer in contact with the first amorphous silicon layer; a second amorphous silicon layer in contact with a back surface of the single crystal silicon substrate; and a second polarity (n-type) impurity diffusion layer in contact with the second amorphous silicon layer, in which the first and second polarity impurity diffusion layers are microcrystalline silicon layers formed under a deposition condition where a pressure in a reaction chamber is adjusted to be greater than or equal to 450 Pa and less than or equal to 10000 Pa is provided.
    Type: Application
    Filed: October 4, 2011
    Publication date: April 12, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshikazu HIURA, Fumito Isaka
  • Publication number: 20120086010
    Abstract: The instant disclosure relates to an electronic image detection device comprising: a plurality of metal electrodes on a first face of an insulating layer; and amorphous silicon regions extending over the insulating layer between the metal electrodes.
    Type: Application
    Filed: April 1, 2010
    Publication date: April 12, 2012
    Applicant: Commissariat a l'Energie Atomique et Aux Energies
    Inventors: Benoît Giffard, Yvon Cazaux
  • Publication number: 20120037912
    Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.
    Type: Application
    Filed: August 11, 2011
    Publication date: February 16, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Cheol KIM, Sung-Ryul KIM, Yun-Jong YEO, Hong-Kee CHIN, Ki-Hun JEONG
  • Publication number: 20110318869
    Abstract: A photovoltaic element comprising a transparent conductive film capable of improving weather resistance is obtained. This photovoltaic element includes a photoelectric conversion layer, and a transparent conductive film formed on a surface of the photoelectric conversion layer and including an indium oxide layer having (222) orientation and two X-ray diffraction peaks, in which the two X-ray diffraction peaks of the indium oxide layer is constituted by a first peak on a low angle side and a second peak on a high angle side having a peak intensity level lower than the first peak.
    Type: Application
    Filed: September 2, 2011
    Publication date: December 29, 2011
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Takeshi NAKASHIMA, Eiji MARUYAMA
  • Patent number: 8080825
    Abstract: An image sensor may include a first substrate having circuitry including wires and a silicon layer formed on and/or over the first substrate to selectively contact the wires. The image sensor may include photodiodes bonded to the first substrate while contacting the silicon layer and electrically connected to the wires. Each unit pixel may be implemented having complicated circuitry without a reduction in photosensitivity. Additional on-chip circuitry may also be implanted in the design.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: December 20, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Chang-Hun Han
  • Publication number: 20110277825
    Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure. The metal grid includes at least one of: Cu and Ni.
    Type: Application
    Filed: July 13, 2010
    Publication date: November 17, 2011
    Applicant: SIERRA SOLAR POWER, INC.
    Inventors: Jianming Fu, Zheng Xu, Chentao Yu, Jiunn Benjamin Heng
  • Publication number: 20110259408
    Abstract: A method of patterning a substrate includes providing a focusing plate adjacent to a plasma chamber containing a plasma, the focusing plate configured to extract ions from the plasma through at least one aperture that provides focused ions towards the substrate. The method further includes directing first ions through the at least one aperture to one or more first regions of the substrate so as to condense first gaseous species provided in ambient of the substrate on the one or more first regions of the substrate.
    Type: Application
    Filed: April 21, 2011
    Publication date: October 27, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Deepak A. Ramappa, Ludovic Godet
  • Publication number: 20110240121
    Abstract: A nanocrystalline superlattice solar cell utilizing a superlattice constructed from alternating amorphous and nanocrystalline layers is provided. The amorphous layers of the superlattice include Germanium. In one embodiment the Germanium content is homogeneous across the amorphous layer. Alternatively, the Germanium content is graded across the amorphous layer from a lower content to a greater content as the amorphous layer is grown. The grading of Germanium content can vary from 0% or greater at a boundary with the preceding layer to 100% or less at a boundary with a subsequent layer. The grading may be continuous or may occur in discreet step increases in Germanium content.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 6, 2011
    Applicant: IOWA STATE UNIVERSITY RESEARCH FOUNDATION, INC.
    Inventor: Vikram L. Dalal
  • Publication number: 20110226330
    Abstract: The present invention provides novel strategies for mitigating the Staebler-Wronski Effect (SWE), that is, the light induced degradation in performance of photoconductivity in amorphous silicon. Materials according to the present invention include alloys or composites of amorphous silicon which affect the elasticity of the materials, amorphous silicon that has been grown on a flexed substrate, compression sandwiched comprising amorphous silicon, and amorphous silicon containing nanoscale features that allow stress to be relieved. The composites are formed with nanoparticles such as nanocrystals and nanotubes. Preferred are boron nitride nanotubes (BNNT) including those that have been surface modified.
    Type: Application
    Filed: August 11, 2009
    Publication date: September 22, 2011
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Jeffrey C. Grossman, Alexander K. Zettl, Lucas Wagner
  • Patent number: 7999250
    Abstract: In accordance with one or more embodiments, a semiconductor structure includes a semiconductor substrate, a first semiconductor material over the semiconductor substrate, and a second semiconductor material over a portion the first semiconductor material, wherein the second semiconductor material comprises silicon-germanium-carbon (SiGeC) and wherein the first semiconductor material is a silicon epitaxial layer. The semiconductor structure further includes an active device, wherein a portion of the active device is formed in the second semiconductor material and a dielectric structure extending from the first surface of the first semiconductor material into the semiconductor substrate through the first semiconductor material.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: August 16, 2011
    Assignee: HVVi Semiconductors, Inc.
    Inventors: Bishnu Prasanna Gogoi, Robert Bruce Davies
  • Publication number: 20110192452
    Abstract: In a thin film photoelectric conversion deice fabricated by addition of a catalyst element with the use of a solid phase growth method, defects such as a short circuit or leakage of current are suppressed. A catalyst material which promotes crystallization of silicon is selectively added to a second silicon semiconductor layer formed over a first silicon semiconductor layer having one conductivity type, the second silicon semiconductor layer is partly crystallized by a heat treatment, a third silicon semiconductor layer having a conductivity type opposite to the one conductivity type is stacked, and element isolation is performed at a region in the second silicon semiconductor layer to which a catalyst material is not added, so that a left catalyst material is prevented from being diffused again, and defects such as a short circuit or leakage of current are suppressed.
    Type: Application
    Filed: February 8, 2011
    Publication date: August 11, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Kazuo NISHI
  • Publication number: 20110175086
    Abstract: A photodiode (7) formed in a polycrystalline silicon layer or a continuous grain silicon layer on a base substrate (5) of a display device includes a semiconductor region of a first conductivity-type (n layer (21)), an intrinsic semiconductor region (i layer (22)), and a semiconductor region of a second conductivity-type (p layer (23)) that is opposite from the first conductivity-type. At least a portion of the intrinsic semiconductor region (i layer (22)) is amorphous silicon.
    Type: Application
    Filed: May 14, 2009
    Publication date: July 21, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiromi Katoh, Christopher Brown, Tomohiro Kimura
  • Publication number: 20110174371
    Abstract: A method for limiting epitaxial growth in a photoelectric device with heterojunctions including a crystalline silicon substrate and at least one layer of amorphous or microcrystalline silicon, wherein the method is characterised in that it includes the step of texturing the crystalline silicon surface.
    Type: Application
    Filed: August 31, 2009
    Publication date: July 21, 2011
    Applicant: UNIVERSITÉ DE NEUCHÂTEL
    Inventors: Sara Olibet, Christian Monachon, Jérôme Damon-Lacoste, Christophe Ballif
  • Patent number: 7955890
    Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: June 7, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Jriyan Jerry Chen, Tae Kyung Won, Dong-Kil Yim
  • Publication number: 20110120541
    Abstract: A Semiconductor device including, on at least one surface of a layer made of a crystalline semiconductor material of a certain type of conductivity, a layer made of an amorphous semiconductor material, doped with a type of conductivity opposite to the type of conductivity of the crystalline semiconductor material layer, characterized in that the concentration of the doping elements in the amorphous semiconductor layer varies gradually.
    Type: Application
    Filed: January 31, 2011
    Publication date: May 26, 2011
    Inventors: Pere ROCA I. CABARROCAS, Jerome Damon-Lacoste
  • Publication number: 20110114177
    Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a first p-i-n junction cell formed on a substrate, wherein the p-i-n junction cell comprises a p-type silicon containing layer, an intrinsic type silicon containing layer formed over the p-type silicon containing layer, and a n-type silicon containing layer formed over the intrinsic type silicon containing layer, wherein the intrinsic type silicon containing layer comprises a first pair of microcrystalline layer and amorphous silicon layer.
    Type: Application
    Filed: July 19, 2010
    Publication date: May 19, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Fan Yang, Lin Zhang, Yi Zheng, Francimar Schmitt, Zheng Yuan
  • Publication number: 20110108728
    Abstract: An ambit light sensor with a function of IR sensing and a method of fabricating the same are provided. The ambit light sensor includes a substrate, an ambit light sensing structure, an infrared ray (IR) sensing structure, and a dielectric layer. The ambit light sensing structure is located over the substrate for sensing and filtering visible light. The IR sensing structure is located in the substrate under the ambit light sensing structure for sensing IR. The dielectric layer is located between the ambit light sensing structure and the IR sensing structure.
    Type: Application
    Filed: January 28, 2010
    Publication date: May 12, 2011
    Applicant: MAXCHIP ELECTRONICS CORP.
    Inventors: Jin-Wei Chang, Jen-Yao Hsu, Hong-Xian Wang, Yu-Hsien Chen
  • Patent number: 7927907
    Abstract: The invention relates to a method for producing solar cells comprising at least one p-i-n layer sequence containing micro-crystalline layers with the aid of a PECVD method. Said method is characterised in that all layers of the p-i-n layer sequence are deposited in a single-chamber process. The electrodes are interspaced at a distance of between 5 and 15 mm and the gas is distributed by means of a shower-head gas inlet, which guarantees a homogeneous distribution of the gas over the substrate. SiH4 gas streams with values of between 0.01 and 3 sccm/cm2 are added with a process pressure of between 8 and 50 hPa. The heater temperature is set at between 50 and 280° C. and the HF output is between 0.2 and 2 watt/cm2. The H2 gas streams have values of between 0.3 and 30 sccm/cm2, in particular between 0.3 and 10 sccm/cm2.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: April 19, 2011
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Tobias Repmann, Bernd Rech
  • Publication number: 20110083728
    Abstract: A disordered nanowire solar cell includes doped silicon nanowires disposed in a disordered nanowire mat, a thin (e.g., 50 nm) p-i-n coating layer formed on the surface of the silicon nanowires, and a conformal conductive layer disposed on the upper (e.g., n-doped) layer of the p-i-n coating layer. The disordered nanowire mat is grown from a seed layer using VLS processing at a high temperature (e.g., 450° C.), whereby the crystalline silicon nanowires assume a random interwoven pattern that enhances light scattering. Light scattered by the nanowires is absorbed by p-i-n layer, causing, e.g., electrons to pass along the nanowires to the first electrode layer, and holes to pass through the conformal conductive layer to an optional upper electrode layer. Fabrication of the disordered nanowire solar cell is large-area compatible.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 14, 2011
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Robert A. Street, William S. Wong
  • Patent number: 7863157
    Abstract: A photovoltaic cell device, e.g., solar cell, solar panel, and method of manufacture. The device has an optically transparent substrate comprises a first surface and a second surface. A first thickness of material (e.g., semiconductor material, single crystal material) having a first surface region and a second surface region is included. In a preferred embodiment, the surface region is overlying the first surface of the optically transparent substrate. The device has an optical coupling material provided between the first surface region of the thickness of material and the first surface of the optically transparent material. A second thickness of semiconductor material is overlying the second surface region to form a resulting thickness of semiconductor material.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: January 4, 2011
    Assignee: Silicon Genesis Corporation
    Inventors: Francois J. Henley, Philip James Ong
  • Patent number: 7863075
    Abstract: A manufacturing method of a polycrystalline solar cell is disclosed. A polycrystalline silicon solar cell in accordance with the present invention performs crystallization-annealing amorphous silicon with a metal catalyst so as to reduce a crystallization temperature. The manufacturing method of a solar cell in accordance with the present invention includes the steps of (a) forming a first amorphous silicon layer on a substrate; (b) forming a second amorphous silicon layer on the first amorphous silicon layer; (c) forming a metal layer on the second amorphous silicon layer; (d) performing crystallization-annealing the second amorphous silicon layer; and (e) forming a third amorphous silicon layer on a resulting crystalline silicon layer of the step (d).
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: January 4, 2011
    Assignee: TG Solar Corporation
    Inventors: Taek Yong Jang, Byung Il Lee
  • Patent number: 7855089
    Abstract: A method for manufacture of application specific solar cells includes providing and processing custom design information to determine at least a cell size and a cell shape. The method includes providing a transparent substrate having a back surface region, a front surface region, and one or more grid-line regions overlying the front side surface region. The one or more grid regions provide one or more unit cells having the cell size and the cell shape. The method further includes forming a layered structure including photovoltaic materials overlying the front surface region.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: December 21, 2010
    Assignee: Stion Corporation
    Inventors: Chester A. Farris, III, Albert S. Brown
  • Publication number: 20100221867
    Abstract: A lost cost method for fabricating SOI substrates is provided. The method includes forming a stack of p-type doped amorphous Si-containing layers on a semiconductor region of a substrate by utilizing an evaporation deposition process. A solid phase recrystallization step is then performed to convert the amorphous Si-containing layers within the stack into a stack of p-type doped single crystalline Si-containing layers. After recrystallization, the single crystalline Si-containing layers are subjected to anodization and at least an oxidation step to form an SOI substrate. Solar cells and/or other semiconductor devices can be formed on the upper surface of the inventive SOI substrate.
    Type: Application
    Filed: May 6, 2009
    Publication date: September 2, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Joel P. de Souza, Keith E. Fogel, Harold J. Hovel, Daniel A. Inns, Jeehwan Kim, Devendra K. Sadana, Katherine L. Saenger, Ghavam G. Shahidi
  • Publication number: 20100212721
    Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, wherein the thin film type solar cell is comprised of a substrate with lower and upper surfaces; a first solar cell on the upper surface of the substrate; and a second solar cell on the lower surface of the substrate, wherein a wavelength range of light absorbed into the first solar cell is different from a wave-length range of light absorbed into the second solar cell. In this case, there is no requirement for the tunneling between a first semiconductor layer of the first solar cell and a second semiconductor layer of the second solar cell, whereby the current matching is unnecessary.
    Type: Application
    Filed: August 13, 2008
    Publication date: August 26, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventor: Jin Hong
  • Publication number: 20100200062
    Abstract: A solar cell and a method for manufacturing the same is disclosed, wherein the solar cell comprises a first cell comprised of a semiconductor wafer with a PN structure; a second cell comprised of a thin film semiconductor layer with a PIN structure, formed on one surface of the first cell; a first electrode layer formed on one surface of the second cell; and a second electrode layer formed on the other surface of the first cell. Unlike the related art solar cell, the solar cell according to the present invention can absorb the light of long-wavelength range in the first cell, and the light of short-wavelength range in the second cell. As a result, it is possible for the solar cell according to the present invention to absorb the light of all ranges, thereby realizing the high efficiency of 20% or above. Also, the entire process time becomes shortened since there is no requirement for the procedure of forming the silicon thin film for a long period of time.
    Type: Application
    Filed: September 16, 2008
    Publication date: August 12, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Jin Hong, Joung Sik Kim
  • Publication number: 20100186802
    Abstract: The present invention relates to improved HIT type or polysilicon emitter solar cells. According to certain aspects, the invention includes forming a masking oxide layer on the front and back of the cell and then patterning holes in the masking oxide. A HIT cell structure or polysilicon emitter solar cell structure is then formed over the patterned oxide, creating the cell junction only in the areas where holes have been cut. Benefits of the invention include that it provides a controlled interface for the HIT cell through insertion of a thin tunnel oxide. Moreover, the tunnel oxide prevents epitaxial growth of amorphous silicon, allowing it to remain amorphous for the optimum band structure. Still further, it provides a layer to protect the surface from plasma damage during deposition of the a-Si layer. Further, it may be used in conjunction with a point contact structure to further increase efficiency.
    Type: Application
    Filed: January 27, 2009
    Publication date: July 29, 2010
    Inventor: Peter BORDEN
  • Patent number: RE42157
    Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: February 22, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Noriyuki Kaifu, Hidemasa Mizutani, Shinichi Takeda, Isao Kobayashi, Satoshi Itabashi