Including Amorphous Semiconductor (epo) Patents (Class 257/E31.047)
  • Patent number: 9786658
    Abstract: This method comprises the following steps: a) providing a first structure successively comprising a first substrate, a first electronic device, and a first dielectric layer; a second structure successively comprising a second substrate, an active layer, a second dielectric layer, and a polycrystalline semiconductor layer, the active layer being designed to form a second electronic device; b) bombarding the polycrystalline semiconductor layer by a beam of species configured to form an amorphous part and to preserve a superficial polycrystalline part; c) bonding the first and second structures; d) removing the second substrate of the second structure; e) introducing dopants into the amorphous part, through the exposed active layer; f) thermally activating the dopants by recrystallization of the amorphous part.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: October 10, 2017
    Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Benoit Mathieu, Claire Fenouillet-Beranger
  • Patent number: 9018626
    Abstract: Disclosed herein are a ZnO film structure and a method of forming the same. Dislocation density of a ZnO film grown through epitaxial lateral overgrowth (ELOG) is minimized. In order to block a chemical reaction between the ZnO film and a mask layer at the time of performing the ELOG, a material of the mask layer is AlF3, NaF2, SrF, or MgF2. Therefore, the chemical reaction between ZnO and the mask layer is blocked and a transfer of dislocation from a substrate is also blocked.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: April 28, 2015
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Seong-Ju Park, Yong Seok Choi, Jang-Won Kang, Byeong Hyeok Kim
  • Patent number: 8921856
    Abstract: A TFT-PIN array substrate and an assembly structure for a flat-panel x-ray detector are provided to overcome the problem that the conventional scintillator substrate and TFT-PIN array substrate are neither penetrated by UV-light nor assembled by UV curable LOCA. The metal layer of the PIN photodiode of the TFT-PIN array substrate is perforated to have at least one hole, whereby UV-light can pass through the TFT-PIN array substrate to cure UV curable LOCA. Therefore, UV curable LOCA can be used as an adhesive layer in the assembly structure of a scintillator substrate and a TFT-PIN array substrate to promote the detective quantum efficiency and image quality of a flat-panel X-Ray detector.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: December 30, 2014
    Assignee: National Chiao Tung University
    Inventors: Pao-Yun Tang, Shu-Lin Ho, Kei-Hsiung Yang
  • Patent number: 8835924
    Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.
    Type: Grant
    Filed: July 5, 2010
    Date of Patent: September 16, 2014
    Assignee: Commissariat a l'energie atomique et aux energies Alternatives
    Inventors: Pierre Gidon, Benoit Giffard, Norbert Moussy
  • Patent number: 8785233
    Abstract: Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: July 22, 2014
    Assignee: SunPower Corporation
    Inventors: Paul Loscutoff, David D. Smith, Michael Morse, Ann Waldhauer, Taeseok Kim, Steven Edward Molesa
  • Patent number: 8765581
    Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: July 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Jong Won Lee, Gianpaolo Spadini, Derchang Kau
  • Patent number: 8679892
    Abstract: The present invention relates to a method for manufacturing silicon thin-film solar cells, including: providing a substrate; forming a first electrode on the substrate; forming a first doped semiconductor layer on the first electrode by chemical vapor deposition; forming an intrinsic layer on the first doped semiconductor layer by chemical vapor deposition, where the intrinsic layer includes a plurality of amorphous/nanocrystalline silicon layers, and the intrinsic layer has various energy bandgaps formed by varying average grain sizes of the amorphous/nanocrystalline silicon layers; forming a second doped semiconductor layer on the intrinsic layer by chemical vapor deposition, where one of the first doped semiconductor layer and the second doped semiconductor layer is a p-type amorphous silicon layer and the other is an n-type amorphous/nano-microcrystalline silicon layer; and forming a second electrode on the second doped semiconductor layer.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: March 25, 2014
    Assignee: National Central University
    Inventors: Tomi T. Li, Jeng-Yang Chang, Sheng-Hui Chen, Cheng-Chung Lee
  • Publication number: 20140077210
    Abstract: A p-i-n photodetector includes at least one multilayer contact structure including wide gap and narrow gap layers to reduce dark current. The multilayer contact structure includes one or more wide band gap semiconductor layers in alternating sequence with one or more narrow band gap contact layers. A fabrication method of the photodetector includes transfer-doping of the narrow band gap contact layers, which are deposited in alternating sequence with wide band gap semiconductor layers.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20140027775
    Abstract: Accordingly, a method of forming a metal chalcogenide material may comprise introducing at least one metal precursor and at least one chalcogen precursor into a chamber comprising a substrate, the at least one metal precursor comprising an amine or imine compound of an alkali metal, an alkaline earth metal, a transition metal, a post-transition metal, or a metalloid, and the at least one chalcogen precursor comprising a hydride, alkyl, or aryl compound of sulfur, selenium, or tellurium. The at least one metal precursor and the at least one chalcogen precursor may be reacted to form a metal chalcogenide material over the substrate. A method of forming a metal telluride material, a method of forming a semiconductor device structure, and a semiconductor device structure are also described.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 30, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Timothy A. Quick, Stefan Uhlenbrock, Eugene P. Marsh
  • Patent number: 8628996
    Abstract: A method for fabricating a photovoltaic device includes applying a diblock copolymer layer on a substrate and removing a first polymer material from the diblock copolymer layer to form a plurality of distributed pores. A pattern forming layer is deposited on a remaining surface of the diblock copolymer layer and in the pores in contact with the substrate. The diblock copolymer layer is lifted off and portions of the pattern forming layer are left in contact with the substrate. The substrate is etched using the pattern forming layer to protect portions of the substrate to form pillars in the substrate such that the pillars provide a radiation absorbing structure in the photovoltaic device.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: January 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Christos Dimitrakopoulos, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana, Kuen-Ting Shiu
  • Publication number: 20130298971
    Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tze-Chiang Chen, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Publication number: 20130298975
    Abstract: A solar cell according to an embodiment includes a semiconductor substrate; a first dopant layer formed at one surface of the semiconductor substrate; and a first electrode electrically connected to the first dopant layer. At least a part of the first dopant layer includes a pre-amorphization element, and a concentration of the pre-amorphization element in one portion of the first dopant layer is different from a concentration of the pre-amorphization element in another portion of the first dopant layer.
    Type: Application
    Filed: October 4, 2012
    Publication date: November 14, 2013
    Applicant: LG ELECTRONICS INC.
    Inventors: Youngsung YANG, Yongduk JIN, Manhyo HA, Juhwa CHEONG
  • Patent number: 8575713
    Abstract: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Naoki Makita, Masahiro Fujiwara
  • Publication number: 20130240022
    Abstract: The present invention relates to cost effective production methods of high efficiency silicon based back-contacted back-junction solar panels and solar panels thereof having a multiplicity of alternating rectangular emitter- and base regions on the back-side of each cell, each with rectangular metallic electric finger conductor above and running in parallel with the corresponding emitter- and base region, a first insulation layer in-between the wafer and finger conductors, and a second insulation layer in between the finger conductors and cell interconnections.
    Type: Application
    Filed: September 28, 2012
    Publication date: September 19, 2013
    Applicant: RENEWABLE ENERGY CORPORATION ASA
    Inventors: Richard Hamilton SEWELL, Andreas BENTZEN, Lawrence Frederick SCHLOSS, Young Seen LEE, Hiroaki HAYASHIGATANI, Toshio ITOH, Alan Francis LYON, Roger THOMPSON, Nemia GRUBISICH
  • Publication number: 20130199611
    Abstract: The invention provides for a semiconductor wafer with a metal support element suitable for the formation of a flexible or sag tolerant photovoltaic cell. A method for forming a photovoltaic cell may comprise providing a semiconductor wafer have a thickness greater than 150 ?m, the wafer having a first surface and a second surface opposite the first and etching the semiconductor wafer a first time so that the first etching reduces the thickness of the semiconductor wafer to less than 150 ?m. After the wafer has been etched a first time, a metal support element may be constructed on or over the first surface; and a photovoltaic cell may be fabricated, wherein the semiconductor wafer comprises the base of the photovoltaic cell.
    Type: Application
    Filed: February 5, 2012
    Publication date: August 8, 2013
    Applicant: Twin Creeks Technologies, Inc.
    Inventors: Venkatesan Murali, Gopal Prabhu, Thomas Edward Dinan, JR., Orion Leland
  • Publication number: 20130186455
    Abstract: A method for forming single crystal or large-crystal-grain thin-film layers deposits a thin-film amorphous, nanocrystalline, microcrystalline, or polycrystalline layer, and laser-heats a seed spot having size on the order of a critical nucleation size of the thin-film layer. The single-crystal seed spot is extended into a single-crystal seed line by laser-heating one or more crystallization zones adjacent to the seed spot and drawing the zone across the thin-film layer. The single-crystal seed line is extended across the thin-film material layer into a single-crystal layer by laser-heating an adjacent linear crystallization zone and drawing the crystallization zone across the thin-film layer. Photovoltaic cells may be formed in or on the single-crystal layer. Tandem photovoltaic devices may be formed using one or several iterations of the method. The method may also be used to form single-crystal semiconductor thin-film transistors, such as for display devices, or to form single-crystal superconductor layers.
    Type: Application
    Filed: February 21, 2012
    Publication date: July 25, 2013
    Inventors: Jifeng Liu, Xiaoxin Wang
  • Publication number: 20130139884
    Abstract: A method for manufacturing a solar cell according to an embodiment of the present invention includes preparing a semiconductor substrate having a first conductive type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductive type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductive type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductive type dopant.
    Type: Application
    Filed: May 11, 2012
    Publication date: June 6, 2013
    Applicant: LG ELECTRONICS INC.
    Inventors: Kyoungsoo LEE, Seongeun LEE
  • Publication number: 20130112256
    Abstract: A photovoltaic device operable to convert light to electricity, comprising a substrate, one or more structures essentially perpendicular to the substrate, and a wavelength-selective layer disposed on the substrate, wherein the structures comprise a crystalline semiconductor material.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 9, 2013
    Inventors: Young-June YU, Munib WOBER
  • Publication number: 20130112264
    Abstract: Embodiments of the present invention relate to methods for forming a doped amorphous silicon oxide layer utilized in thin film solar cells. In one embodiment, a method for forming a doped p-type amorphous silicon containing layer on a substrate includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and a carbon and oxygen containing gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas between about 5 and about 15, wherein a volumetric flow ratio of the carbon and oxygen containing gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 10 percent and about 50 percent; and maintaining a process pressure of the gas mixture within the processing chamber at between about 1 Torr and about 10 Torr while forming a doped p-type amorphous silicon containing layer.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 9, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Dapeng Wang, Yong Kee Chae
  • Publication number: 20130113059
    Abstract: A photovoltaic device includes a semiconductor substrate; an amorphous first conductive semiconductor layer on a first region of a first surface of the semiconductor substrate and containing a first impurity; an amorphous second conductive semiconductor layer on a second region of the first surface of the semiconductor substrate and containing a second impurity; and a gap passivation layer located between the first region and the second region on the semiconductor substrate, wherein the first conductive semiconductor layer is also on the gap passivation layer.
    Type: Application
    Filed: August 7, 2012
    Publication date: May 9, 2013
    Inventors: Nam-Kyu Song, Min-Seok Oh, Yun-Seok Lee, Cho-Young Lee
  • Publication number: 20130087190
    Abstract: This disclosure provides photovoltaic apparatus and methods of forming the same. In one implementation, a photovoltaic device includes an anode contact structure, a cathode contact structure, and an inorganic solar cell disposed between the anode and cathode contact structures. The inorganic solar cell includes a p-type photovoltaic layer, an n-type photovoltaic layer, and one or more minority carrier blocking layers for improving the efficiency of the solar cell by preventing minority carriers within the solar cell from reaching interface recombination surfaces associated with the anode and cathode contact structures.
    Type: Application
    Filed: October 11, 2011
    Publication date: April 11, 2013
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventors: Sijin Han, Fan Yang
  • Publication number: 20130087789
    Abstract: A photoelectric conversion device with improved electric characteristics is provided. The photoelectric conversion device has a structure in which a window layer is formed by a stack of a first silicon semiconductor layer and a second silicon semiconductor layer, and the second silicon semiconductor layer has high carrier concentration than the first silicon semiconductor layer and has an opening. Light irradiation is performed on the first silicon semiconductor layer through the opening without passing through the second silicon semiconductor layer; thus, light absorption loss in the window layer can be reduced.
    Type: Application
    Filed: September 27, 2012
    Publication date: April 11, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
  • Patent number: 8415787
    Abstract: The present invention relates to a heat dissipator that includes a conductive substrate and a plurality of nanostructures supported by the conductive substrate. The nanostructures are at least partly embedded in an insulator. Each of the nanostructures includes a plurality of intermediate layers on the conductive substrate. At least two of the plurality of intermediate layers are interdiffused, and material of the at least two of the plurality of intermediate layers that are interdiffused is present in the nanostructure.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: April 9, 2013
    Assignee: Smoltek AB
    Inventor: Mohammad Shafiqul Kabir
  • Patent number: 8410354
    Abstract: Higher conversion efficiency and productivity of photoelectric conversion devices. A semiconductor layer including a first and second crystal regions grown in the layer-deposition direction is provided between an impurity semiconductor layer containing an impurity element imparting one conductivity type and an impurity semiconductor layer containing an impurity element imparting a conductivity type opposite to the one conductivity type. The first crystal region is grown from the interface between one of the impurity semiconductor layers and the semiconductor layer. The second crystal region is grown toward the interface between the semiconductor layer and the other of the impurity semiconductor layers from a position which is away from the interface between the one of the impurity semiconductor layers and the semiconductor layer. The semiconductor layer including the first and second crystal regions which exist in an amorphous structure forms the main part of a region for photoelectric conversion.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: April 2, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20130056733
    Abstract: A sensor includes a substrate, a membrane, first and second spacers arranged on the substrate, a first support structure which is supported, laterally next to the membrane, by the first spacer and contacts a first electrode of a first main side of the membrane which faces the substrate, and a second support structure which is supported, laterally next to the membrane, by the second spacer and contacts a second electrode on a second main side of the membrane which is opposite the first main side, so that the membrane is suspended via the first and second spacers and is electrically connected to contact areas of the substrate.
    Type: Application
    Filed: August 24, 2012
    Publication date: March 7, 2013
    Inventors: Holger Vogt, Dirk Weiler, Piotr Kropelnicki
  • Patent number: 8389388
    Abstract: A photonic device (200) and method (100) of making the photonic device (200) employs preferential etching of grain boundaries of a polycrystalline semiconductor material layer (210). The method (100) includes growing (110) the polycrystalline layer (210) on a substrate (201). The polycrystalline layer includes a transition region (212) of variously oriented grains and a region (214) of columnar grain boundaries (215) adjacent to the transition region. The method further includes preferentially etching (120) the columnar grain boundaries to provide tapered structures (220) of the semiconductor material that are continuous (217) with respective aligned grains (213) of the transition region. The tapered structures are predominantly single crystal. The method further includes forming (140) a conformal semiconductor junction (240) on the tapered structures and providing (160) first and second electrodes.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hans S. Cho, Theodore I. Kamins, Nathaniel J. Quitoriano
  • Publication number: 20130019945
    Abstract: A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.
    Type: Application
    Filed: September 6, 2012
    Publication date: January 24, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoar-Tabari, Marinus Hopstaken, Dae-Gyu Park, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20130011958
    Abstract: Photovoltaic devices, such as solar cells, and methods for their manufacture are disclosed. A device may be characterized by an architecture having a nanostructured template made from an n-type first charge transfer material with template elements between about 1 nm and about 500 nm in diameter with about 1012 to 1016 elements/m2. A p-type second charge-transfer material optionally coats the walls of the template elements leaving behind additional space. A p-type third charge-transfer material fills the additional space volumetrically interdigitating with the second charge transfer material.
    Type: Application
    Filed: January 10, 2012
    Publication date: January 10, 2013
    Inventors: Martin R. Roscheisen, Brian M. Sager, Karl Pichler
  • Patent number: 8349644
    Abstract: A method for producing a backside contact of a single p-n junction photovoltaic solar cell is provided. The method includes the steps of: providing a p-type substrate having a back surface; providing a plurality of p+ diffusion regions at the back surface of the substrate; providing a plurality of n+ diffusion regions at the back surface of the substrate in an alternate pattern with the p+ diffusion regions; providing an oxide layer over the p+ and n+ regions; providing an insulating layer over the back surface of the substrate; providing at least one first metal contact at the back surface for the p+ diffusion regions; and providing at least one second metal contact at the back surface for the n+ diffusion regions.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: January 8, 2013
    Assignee: e-Cube Energy Technologies, Ltd.
    Inventors: Wei Shan, Xiao-Dong Xiang
  • Patent number: 8344422
    Abstract: A semiconductor device includes a lower barrier layer 12 composed of a layer of AlxGa1-xN (0?x?1) in a state of strain relaxation, and a channel layer 13, which is composed of a layer of InyGa1-yN (0?y?1) disposed on the lower barrier layer 12, has band gap that is smaller than band gap of the lower barrier layer 12, and exhibits compressive strain. A gate electrode 1G is formed over the channel layer 13 via an insulating film 15 and a source electrode 1S and a drain electrode 1D serving as ohmic electrodes are formed over the channel layer 13. The insulating film 15 is constituted of polycrystalline or amorphous member.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: January 1, 2013
    Assignee: NEC Corporation
    Inventors: Yuji Ando, Yasuhiro Okamoto, Kazuki Ota, Takashi Inoue, Tatsuo Nakayama, Hironobu Miyamoto
  • Patent number: 8330161
    Abstract: Disclosed is an electrophotographic photoreceptor which comprises a base material and a photoconductive layer. The photoconductive layer is formed on the base material, and comprises a non-single-crystal material mainly composed of silicon. In the photoconductive layer, with regard to a characteristic energy E (eV) which has the relationship with a light absorption coefficient ?(cm?1) represented by the following formula (1), the characteristic energy E1 (eV) for an exposure wavelength in larger than the characteristic energy E2 (eV) for a neutralization wavelength. [Formula (1) a=C exp(h?/E) C: a constant h?: a photon energy h: a rationalized Planck's ?: the number of frequency.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: December 11, 2012
    Assignee: Kyocera Corporation
    Inventor: Yoshinobu Ishii
  • Publication number: 20120292619
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 22, 2012
    Inventor: Leonard Forbes
  • Publication number: 20120291844
    Abstract: The present invention is to grant a margin in the control of a depth of a groove when removing a transparent insulation layer after the transparent insulation layer is formed on the entire surface of the transparent conductive layer, thereby provide a solar cell which has superior productivity in mass manufacturing. A solar cell includes an n-type amorphous silicon layer formed on a front-surface side of an n-type monocrystalline silicon the substrate; a front-surface side transparent conductive layer formed on the n-type amorphous silicon layer; a p-type amorphous silicon layer formed on a rear-surface-side of the substrate; and a rear-surface-side transparent conductive layer formed on the p-type amorphous silicon layer. A front-surface side collector electrode is formed by plating on the front-surface side transparent conductive layer whereas a rear-surface-side collector electrode is formed on the rear-surface-side transparent conductive layer by printing.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 22, 2012
    Applicant: C/O SANYO ELECTRIC CO., LTD.
    Inventor: Sadaji TSUGE
  • Publication number: 20120288985
    Abstract: A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way.
    Type: Application
    Filed: January 26, 2011
    Publication date: November 15, 2012
    Applicant: Commissariat A L'Energie Atomique Et Aux Energies Alternatives
    Inventors: Hubert Moriceau, Pierre Mur, Pierre-Jean Ribeyron
  • Publication number: 20120279562
    Abstract: The back-surface-field type of heterojunction solar cell according to the present invention comprises a crystalline silicon substrate of a first conductivity type, a semiconductor layer of the first conductivity type provided in the upper stratum of the substrate, an anti-reflective film provided on the front surface of the substrate, an intrinsic layer provided on the rear surface of the substrate, amorphous semiconductor layers of the first conductivity type and amorphous semiconductor layers of the second conductivity type repeatedly disposed alternately on the intrinsic layer, and first-conductivity-type electrodes and second-conductivity-type electrodes which are respectively provided on the amorphous semiconductor layers of the first conductivity type and the amorphous semiconductor layers of the second conductivity type.
    Type: Application
    Filed: December 17, 2010
    Publication date: November 8, 2012
    Applicant: HYUNDAI HEAVY INDUSTRIES CO., LTD.
    Inventors: Su Mi Yang, Sung Bong Roh, Seok Hyun Song
  • Publication number: 20120261670
    Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Roy, Jens Prima
  • Publication number: 20120258561
    Abstract: In embodiments of the present invention an undoped amorphous, nanocrystalline or microcrystalline semiconductor layer and a heavily doped amorphous, nanocrystalline, or microcrystalline semiconductor layer are formed on a monocrystalline silicon lamina. The lamina is the base region of a photovoltaic cell, while the amorphous, nanocrystalline or monocrystalline layers serve to passivate the surface of the lamina, reducing recombination at this surface. In embodiments, the heavily doped layer additionally serves as either the emitter of the cell or to provide electrical contact to the base layer. The undoped and heavily doped layers are deposited at low temperature, for example about 150 degrees C. or less with hydrogen dilution. This low temperature allows use of low-temperature materials and methods, while increased hydrogen dilution improves film quality and/or conductivity.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 11, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Jian Li, Venkatesan Murali, Yonghua Liu, Dong Xu
  • Publication number: 20120247539
    Abstract: The invention relates to a semiconductor device comprising: a crystalline semiconductor substrate (1) having a front face (1a) and a rear face (1b); a front passivation layer (3) placed on the front face (1a) of the substrate (1); a rear passivation layer (2) placed on the rear face (1b) of the substrate (1); a first metallization zone (10) placed on the rear passivation layer (2) and designed for collecting electrons; a second metallization zone designed for collecting holes, comprising: a surface portion (11) placed on the rear passivation layer (2); and an internal portion (12) passing through the rear passivation layer (2) and forming, in the substrate (1), a region in which the concentration of electron acceptors is greater than the rest of the substrate (1). The invention also relates to a module of photovoltaic cells using this device and to a process for manufacturing this device.
    Type: Application
    Filed: December 10, 2010
    Publication date: October 4, 2012
    Applicants: TOTAL SA, ECOLE POLYTECHNIQUE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventor: Pére Roca i Cabarrocas
  • Patent number: 8258596
    Abstract: To provide a stacked photoelectric conversion device and a method for producing the same, in which an interlayer is provided between photoelectric conversion layers to obtain an effect of controlling the amount of incidence light, and carrier recombination at an interface between the interlayer and a semiconductor layer is decreased to enhance photoelectric conversion efficiency. The stacked photoelectric conversion device of the present invention comprises a plurality of silicon-based photoelectric conversion layers having a p-i-n structure stacked, wherein at least a pair of adjacent photoelectric conversion layers have an interlayer of a silicon nitride therebetween, the pair of the photoelectric conversion layers are electrically connected with each other, and a p-type silicon-based semiconductor layer constituting a part of the photoelectric conversion layer and contacting the interlayer contains a nitrogen atom.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: September 4, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Takanori Nakano
  • Publication number: 20120220068
    Abstract: A semiconductor assembly is described in which a support element is constructed on a surface of a semiconductor lamina. Following formation of the thin lamina, which may have a thickness about 50 microns or less, the support element is formed, for example by plating, or by application of a precursor and curing in situ, resulting in a support element which may be, for example, metal, ceramic, polymer, etc. This is in contrast to pre-formed support element which is affixed to the lamina following its formation, or to a donor wafer from which the lamina is subsequently cleaved. Fabricating the support element in situ may avoid the use of adhesives to attach the lamina to a permanent support element. In some embodiments, this process flow allows the lamina to be annealed at high temperature, then to have an amorphous silicon layer formed on each face of the lamina following that anneal.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 30, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Christopher J. Petti, Mohamed M. Hilali, Theodore Smick, Venkatesan Murali, Kathy J. Jackson, Zhiyong Li, Gopalakrishna Prabhu
  • Publication number: 20120211069
    Abstract: Provided are thin-film solar cells and methods of fabricating the same. The solar cell may include a substrate and a cell comprising an amorphous layer with a continuously graded hydrogen content disposed on the substrate, a n-type semiconductor, an p-type semiconductor layer, a metal electrode adjacent to the n-type semiconductor and a transparent electrode adjacent to p-type semiconductor layers. The hydrogen content of the amorphous intrinsic semiconductor layer decreases in a continuous manner from a first interface, to which a light is incident, toward a second interface opposite to the first interface, and the first and second interfaces are two opposite surfaces of the amorphous intrinsic semiconductor layer being in contact with the p-type and n-type semiconductor layers, respectively.
    Type: Application
    Filed: February 22, 2012
    Publication date: August 23, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sun Jin YUN, JungWook Lim
  • Publication number: 20120211749
    Abstract: To improve the performance of a protection circuit including a diode formed using a semiconductor film. A protection circuit is inserted between two input/output terminals. The protection circuit includes a diode which is formed over an insulating surface and is formed using a semiconductor film. Contact holes for connecting an n-type impurity region and a p-type impurity region of the diode to a first conductive film in the protection circuit are distributed over the entire impurity regions. Further, contact holes for connecting the first conductive film and a second conductive film in the protection circuit are dispersively formed over the semiconductor film. By forming the contact holes in this manner, wiring resistance between the diode and a terminal can be reduced and the entire semiconductor film of the diode can be effectively serve as a rectifier element.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Osamu FUKUOKA, Masahiko HAYAKAWA, Hideaki SHISHIDO
  • Publication number: 20120205649
    Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.
    Type: Application
    Filed: February 7, 2012
    Publication date: August 16, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Yasunori HATTORI, Tomotaka MATSUMOTO, Tsukasa EGUCHI
  • Publication number: 20120205655
    Abstract: It is advantageous to create texture at the surface of a photovoltaic cell to reduce reflection and increase travel length of light within the cell. A method is disclosed to create texture at the surface of a silicon body by reacting a silicide-forming metal at the surface, where the silicide-silicon interface is non-planar, then stripping the silicide, leaving behind a textured surface. Depending on the metal and the conditions of silicide formation, the resulting surface may be faceted. The peak-to-valley height of this texturing will generally be between about 300 and about 5000 angstroms, which is well-suited for use in photovoltaic cells comprising a thin silicon lamina.
    Type: Application
    Filed: April 13, 2012
    Publication date: August 16, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventor: S. Brad Herner
  • Patent number: 8241942
    Abstract: A method of fabricating a back-illuminated image sensor that includes the steps of providing a first substrate of a semiconductor layer, in particular a silicon layer, forming electronic device structures over the semiconductor layer and, only then, doping the semiconductor layer. By doing so, improved dopant profiles and electrical properties of photodiodes can be achieved such that the final product, namely an image sensor, has a better quality.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: August 14, 2012
    Assignee: Soitec
    Inventors: Konstantin Bourdelle, Carlos Mazure
  • Patent number: 8237166
    Abstract: An active matrix display comprising a light control device and a field effect transistor for driving the light control device. The active layer of the field effect transistor comprises an amorphous.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: August 7, 2012
    Assignees: Canon Kabushiki Kaisha, Tokyo Institute of Technology
    Inventors: Hideya Kumomi, Hideo Hosono, Toshio Kamiya, Kenji Nomura
  • Publication number: 20120184064
    Abstract: A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.
    Type: Application
    Filed: March 22, 2012
    Publication date: July 19, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Fumito ISAKA, Sho KATO, Koji DAIRIKI
  • Publication number: 20120167984
    Abstract: Device structure that facilitates high rate plasma deposition of thin film photovoltaic materials at microwave frequencies. The device structure includes a primer layer that shields the substrate and underlying layers of the device structure during deposition of layers requiring aggressive, highly reactive deposition conditions. The primer layer prevents or inhibits etching or other modification of the substrate or underlying layers by highly reactive deposition conditions. The primer layer also reduces contamination of subsequent layers of the device structure by preventing or inhibiting release of elements from the substrate or underlying layers into the deposition environment. The presence of the primer layer extends the range of deposition conditions available for forming photovoltaic or semiconducting materials without compromising performance. The invention allows for the ultrafast formation of silicon-containing amorphous semiconductors from fluorinated precursors in a microwave plasma process.
    Type: Application
    Filed: December 31, 2010
    Publication date: July 5, 2012
    Inventor: Stanford R. Ovshinsky
  • Publication number: 20120168836
    Abstract: In a multilayered photodiode and a method of manufacturing the same, the multilayered photodiode comprises: a transparent substrate; a gate insulating film formed on the transparent substrate; a first metal layer formed on the gate insulating film; a semiconductor layer formed on the first metal layer so as to be in contact with the first metal layer; and a second metal layer formed on the semiconductor layer so as to be in contact with the semiconductor layer. The photodiode is vertically multilayered, and has a metal-insulator-metal (MIM) structure in which a P-N region is replaced by a metal, and in which a light-receiving region does not block incident light.
    Type: Application
    Filed: September 2, 2011
    Publication date: July 5, 2012
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Dong-Beom Lee, Deok-Young Choi, Dae-Hyun Noh, Yong-Sung Park, Won-Kyu Lee
  • Publication number: 20120154335
    Abstract: A photoelectric element including a transparent bottom electrode, a photosensitive layer, a first electrode, a second electrode and a transparent top electrode is provided. The photosensitive layer is located above the transparent bottom electrode. The first electrode and the second electrode are disposed on the photosensitive layer. The transparent top electrode is located above the photosensitive layer.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 21, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Isaac Wing-Tak Chan