Abstract: A terahertz gas spectrometer detection system is provided. The system includes: a terahertz generation module, a gas module, a terahertz detection module and a program-control and acquisition module. terahertz generation module is configured for generating and transmitting terahertz signals with different frequencies; gas module is configured for setting and storing to-be-detected gas, so that terahertz signals with different frequencies pass through the to-be-detected gas; terahertz detection module is configured for detecting amplitude signals of terahertz signals after passing through the to-be-detected gas through field effect transistor detector; program-control and acquisition module is configured for controlling the terahertz generation module to generate and transmit frequency of terahertz signal, and is further configured for acquiring amplitude detection signals of terahertz signals after passing through the to-be-detected gas, and generating spectrogram of to-be-detected gas.

Abstract: A low noise infrared photo detector with a vertically integrated field effect transistor (FET) structure is formed without thermal diffusion. The FET structure includes a high sensitivity photo detector layer, a charge well layer, a transfer well layer, a charge transfer gate, and a drain electrode. In an embodiment, the photo detector layer and charge well are InGaAs and the other layers are InP layers.

Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.

Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.

Abstract: In accordance with the invention, an improved image sensor includes an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: The objective of this invention is to provide a photodiode which has high sensitivity even to light with a wavelength in the blue region while maintaining the high-frequency characterstics. The n type second semiconductor layer (13) containing an n type electroconductive impurity at a low concentration is formed directly or via an intrinsic semiconductor layer (11) on the p type first semiconductor layer (10). The third semiconductor layer (20) containing an n type electroconductive impurity at a medium concentration is formed shallower than said second semiconductor layer (13) in its main plane. The fourth semiconductor layer (21) containing an n type electroconductive impurity at a high concentration is formed shallower than said third semiconductor layer (20) in the main plane of the third semiconductor layer (20).

Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.

Abstract: An embodiment of a Geiger-mode avalanche photodiode, having: a body made of semiconductor material of a first type of conductivity, provided with a first surface and a second surface and forming a cathode region; and an anode region of a second type of conductivity, extending inside the body on top of the cathode region and facing the first surface. The photodiode moreover has: a buried region of the second type of conductivity, extending inside the body and surrounding an internal region of the body, which extends underneath the anode region and includes the internal region and defines a vertical quenching resistor; a sinker region extending through the body starting from the first surface and in direct contact with the buried region; and a contact region made of conductive material, overlying the first surface and in direct contact with the sinker region.

Abstract: Disclosed is a solid-state image sensor including a photoelectric converter, a charge detector, and a transfer transistor. The photoelectric converter stores a signal charge that is subjected to photoelectric conversion. The charge detector detects the signal charge. The transfer transistor transfers the signal charge from the photoelectric converter to the charge detector. In the solid-state image sensor, the transfer transistor includes a gate insulating film, a gate electrode formed on the gate insulating film, a first spacer formed on a sidewall of the gate electrode on a side of the photoelectric converter, and a second spacer formed on another sidewall of the gate electrode on a side of the charge detector. The first spacer is longer than the second spacer.

Abstract: This invention provides a photo-FET, in which a FET part and photodiode part are stacked, and the FET part and photodiode part are optimized independently in design and operational bias conditions. The semiconductor layer serving as a photo-absorption layer (41) is formed on the cathode semiconductor layer (10) of a photodiode part (50). An electron barrier layer (40) with a wider bandgap semiconductor than a photo-absorption layer (41), which also serves as an anode layer of a photodiode part (50), is formed on a photo-absorption layer (41). The channel layer (15) which constitutes the channel regions of the FET part is formed with a narrower bandgap semiconductor than an electron barrier layer (40) on an electron barrier layer (40). The hole barrier layer (16) with a bandgap wider than the semiconductor which constitutes a channel layer (15) is formed on a channel layer (15). The source electrode (30) and drain electrode (32) which are separated each others, are formed on a hole barrier layer (16).

Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.

Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.

Abstract: Provision of a solid-state imaging device of a planarized structure with reduced dark currents, allowing for high sensitivities over a wide wavelength band ranging from visible wavelengths to near-infrared wavelengths, and a fabrication method of the same.

Abstract: A solid state imaging device includes: a light receiving section performing photoelectric conversion; a transfer register formed in a semiconductor base; a transfer electrode formed of a semiconductor layer on the transfer register; a charge transfer section which formed of the transfer register and the transfer electrode and transferring a signal charge accumulated in the light receiving section; a bus line electrically connected to a portion of the transfer electrode to supply a driving pulse to the transfer electrode and formed of a metal layer; and a barrier metal layer formed near an interface between the transfer electrode and the bus line in a contact section that connects the transfer electrode and the bus line with each other and having a work function of the size between a work function of the semiconductor layer of the transfer electrode and a work function of the metal layer of the bus line.

Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.

Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

Abstract: A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 ? to 90 ?; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 ? to 40 ?.

Abstract: In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.

Abstract: An image sensor includes a plurality of pixels disposed in an array, each pixel comprising a first region and a second region, the first region and the second region separated from each other in a semiconductor layer, and doped with impurities having different conductivities from each other, a photoelectric conversion region formed between the first and second regions, and at least one metal nanodot that focuses an incident light onto the photoelectric conversion region.

Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.

Abstract: An image sensor is provided. The image sensor comprises a semiconductor substrate, a dielectric interlayer, an interconnection, an image sensing unit, a via hole piercing the image sensing unit and the dielectric layer, and a bottom electrode. The semiconductor substrate includes a readout circuit. The dielectric interlayer is disposed on the semiconductor substrate. The interconnection is disposed in the dielectric interlayer and connected electrically to the readout circuit. The image sensing unit is disposed on the dielectric interlayer and includes a stack of a first impurity region and a second impurity region. The via hole pierces the image sensing unit and the dielectric interlayer to expose the interconnection. The bottom electrode is disposed in the via hole to electrically connect the interconnection and the first impurity region of the image sensing unit.

Abstract: A CMOS-implementable TOF detector promptly collects charge whose creation time can be precisely known, while rejecting collection of potentially late arriving charge whose creation time may not be precisely known. Charges created in upper regions of the detector structure are ensured to be rapidly collected, while charges created in the lower regions of the detector structure, potentially late arriving charges, are inhibiting from being collected.

Abstract: A thin film transistor comprises: a first transistor region and a second transistor region defined on a substrate; and a first transistor and a second transistor respectively disposed on the first and second transistor regions, the first transistor comprising: a first semiconductor layer having source, channel, and drain regions defined on the substrate; a first insulating film disposed on the first semiconductor layer; a first transparent electrode disposed on the first insulating film and formed corresponding to the channel region of the first semiconductor layer; and a second insulating film disposed on the first transparent electrode, and the second transistor comprising: a second semiconductor layer having source, channel, and drain regions defined on the substrate; the first insulating film disposed on the second semiconductor layer; a second transparent electrode disposed on the first insulating film and formed corresponding to the channel region of the second semiconductor layer; a second gate dispose

Abstract: A method of forming a CMOS image sensor device, the method includes providing a semiconductor substrate having a P-type impurity characteristic including a surface region. The method forma first thickness of silicon dioxide in a first region of the surface region, a second thickness of silicon dioxide in a second region of the surface region, and a third thickness of silicon dioxide in a third region of the surface region. The method includes forming a first gate layer overlying the second region and a second gate layer overlying the third region, while exposing a portion of the first thickness of silicon dioxide. An N-type impurity characteristic is formed within a region within a vicinity underlying the first thickness of silicon dioxide in the first region of the surface region to cause formation of a photo diode device characterized by the N-type impurity region and the P-type substrate.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) includes a semiconductor substrate including a photodiode therein as a light sensing unit. A floating diffusion region of a first conductivity type is provided in the semiconductor substrate, and is configured to receive charges generated in the photodiode. A power supply voltage region of the first conductivity type is also provided in the semiconductor substrate. A reset transistor including a reset gate electrode on a surface of the substrate between the floating diffusion region and a power supply voltage region is configured to discharge charges stored in the floating diffusion region in response to a reset control signal. The reset transistor includes a channel region in the substrate extending between the floating diffusion region and the power supply voltage region such that the floating diffusion region and the power supply voltage regions define source/drain regions for the reset transistor.

Abstract: An image sensor can be formed of a first substrate having a readout circuitry, an interlayer dielectric, and lower lines, and a second substrate having a photodiode. The first substrate comprises a pixel portion and a peripheral portion. The readout circuitry is formed on the pixel portion. The interlayer dielectric is formed on the pixel portion and the peripheral portion. The lower lines pass through the interlayer dielectric to electrically connect with the readout circuitry and the peripheral portion. The photodiode is bonded to the first substrate and etched to correspond to the pixel portion. A transparent electrode is formed on the interlayer dielectric on which the photodiode is formed such that the transparent electrode can be connected with the photodiode and the lower line in the peripheral portion. A first passivation layer can be formed on the transparent electrode. In one embodiment, the first passivation layer includes a trench exposing a portion of the transparent electrode.

Abstract: Provided is a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A plurality of image sensor elements are formed on the front surface of the semiconductor substrate. At least one of the image sensor elements includes a transfer transistor and a photodetector. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. In one embodiment, the gate overlies the photodetector by at least 5%.

Abstract: An image sensor includes a substrate, an anti-reflection board and a light shielding film. The substrate includes first pixels to receive a light, and second pixels to provide a black level compensation. The first pixels are formed in an active region and the second pixels are formed in a first region spaced apart from the active region in a row direction. The anti-reflection board is formed in a second region above the substrate, and the second region is between the active region and the first region. The light shielding film is formed above the anti-reflection board, and the light shielding film covers an optical black region including the first and second regions. Therefore, the image sensor may be used in a CCD type image sensor and a CMOS type image sensor to provide a stabilized black level, thereby improving a quality of a displayed image.

Abstract: A photosensor structure includes a pixel metal layer disposed in physical and electrical contact with a pixel thin film transistor and a lower sensor layer of a p-i-n photosensor. The pixel metal layer extends laterally to an extent less that the lower sensor layer such that an overhang region is defined below the lower sensor layer and the adjacent the lateral edge of the pixel metal layer. When the relatively thick intrinsic sensor layer is formed over the lower sensor layer, it attaches to the upper surface and, due to the presence of the overhang region, the lateral edge of the lower sensor layer, forming a discrete intrinsic sensor layer structure over the pixel which is physically isolated from adjacent corresponding structures. This isolation allows for thermal expansion and contraction during formation of the intrinsic sensor layer without cracking the intrinsic sensor layer structure.

Abstract: A radiation imaging apparatus comprises a pixel region, on an insulating substrate 100, including a plurality of pixels arranged in a matrix, each pixel having a conversion element 101 that converts radiation into electric charges and a switching element 102 connected to the conversion element 101. The conversion element 101 has an upper electrode layer 119, a lower electrode layer 115, a semiconductor layer 117 arranged between the upper electrode layer 119 and the lower electrode layer 115. The upper electrode layer 119 or the lower electrode layer 115 has an opening 200 at least within a region where the semiconductor layer 117 is arranged.

Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.

Abstract: A pixel structure for an image sensor includes a semiconductor material portion having a coplanar and contiguous semiconductor surface and including four photodiodes, four channel regions, and a common floating diffusion region. Each of the four channel regions is directly adjoined to one of the four photodiodes and the common floating diffusion region. The four photodiodes are located within four different quadrants as defined employing a vertical line passing through a point within the common floating diffusion region as a center axis. The common floating diffusion region, a reset gate transistor, a source follower transistor, and a row select transistor are located within four different quadrants as defined employing a vertical line passing through a point within one of the photodiodes as an axis.

Abstract: A semiconductor device includes a supporting substrate; a semiconductor film on the supporting substrate; a gate insulating film on the semiconductor film; a gate electrode on the gate insulating film; and a source region and a drain region formed by introducing impurity elements to the semiconductor film. The thickness of the semiconductor film is within the range of 20 nm to 40 nm. Low-concentration regions are provided between the source region and a channel forming region, and between the drain region and the channel forming region, respectively. The low-concentration regions each have an impurity concentration smaller than that of the source region and that of the drain region, and the impurity concentration in a lower surface side region on the side of the supporting substrate is smaller than that of an upper surface side region on the opposite side.

Abstract: A carbon-containing semiconductor layer is formed on exposed surfaces of a p? doped semiconductor layer abutting sidewalls of a shallow trench. Following formation of a dielectric layer on the carbon-containing semiconductor layer, a surface pinning layer having a p-type doping is formed underneath the carbon-containing semiconductor layer. A shallow trench isolation structure and a photodiode are subsequently formed. Diffusion of defects directly beneath the shallow trench isolation structure, now contained in the carbon-containing semiconductor layer, is suppressed. Further, boron diffusion into the shallow trench isolation structure and into the photodiode is also suppressed by the carbon-containing semiconductor layer, providing reduction in dark current and enhancement of performance of the photodiode.

Abstract: The present invention relates to a device for detecting millimeter waves, having at least one field effect transistor with a source, a drain, a gate, a gate-source contact, a source-drain channel, and a gate-drain contact. Compared to a similar such device, the problem addressed by the present invention, among others, is that of providing a device which enables the provision of a field effect transistor for detecting the power and/or phase of electromagnetic radiation in the Thz frequency range. In order to create such a device, it is suggested according to the invention, that a device be provided which has an antenna structure wherein the field effect transistor is connected to the antenna structure in such a manner that an electromagnetic signal received by the antenna structure in the THz range is fed into the field effect transistor via the gate-source contact, and wherein the field effect transistor and the antenna structure are arranged together on a single substrate.

Abstract: An image sensor includes a metal interconnection and readout circuitry over a first substrate, an image sensing device, and an ion implantation isolation layer. The image sensing device is over the metal interconnection, and an ion implantation isolation layer is in the image sensing device. The image sensing device includes first, second and third color image sensing units, and ion implantation contact layers. The first, second and third color image sensing units are stacked in or on a second substrate. The ion implantation contact layers are electrically connected to the first, second and third color image sensing units, respectively.

Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.

Abstract: A CMOS image sensor and fabricating method can reduce leakage current of a photodiode reduced by configuring a triangular shape of a photodiode area to minimize an interface contacting the STI or performing deuterium annealing to remove dangling bonds from an interface contacting with oxide. The CMOS image sensor includes a semiconductor substrate, a device isolation layer on the semiconductor substrate, and a plurality of diodes, each having a shape minimizing an area of a boundary contacting with the device isolation layer.

Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.

Abstract: CMOS image sensors and methods of manufacturing the same are provided, the CMOS image sensors include an epitaxial layer, a photodiode, a transfer transistor, CMOS transistors, first metal wirings and a second metal wiring formed on a substrate. The substrate may have a photodiode region, a floating diffusion region, an active pixel sensor (APS) array circuit region and a peripheral circuit region. The photodiode may be formed on the epitaxial layer in the photodiode region. The transfer transistor may be formed on the epitaxial layer in the floating diffusion region. The CMOS transistors may be formed on the epitaxial layer in the APS array circuit region and the peripheral circuit region. The first metal wirings may be formed over the photodiode region. The second metal wiring may be formed on one of the first metal wirings. The second metal wiring may be located higher than the first metal wirings.

Abstract: An apparatus and method for fabricating an array of backside illuminated (“BSI”) image sensors is disclosed. Front side components of the BSI image sensors are formed into a front side of the array. A dopant layer is implanted into a backside of the array. The dopant layer establishes a dopant gradient to encourage photo-generated charge carriers to migrate towards the front side of the array. At least a portion of the dopant layer is annealed. A surface treatment is formed on the backside of the dopant layer to cure surface defects.

Abstract: Disclosed herein is a semiconductor device, including: a gate electrode formed on a semiconductor substrate through a gate insulating film; an extension region formed in the semiconductor substrate on a source side of the gate electrode; a source region formed in the semiconductor substrate on the source side of the gate electrode through the extension region; an LDD region formed in the semiconductor substrate on a drain side of the gate electrode; and a drain region formed in the semiconductor substrate on the drain side of the gate electrode through the LDD region; wherein the extension region is formed at a higher concentration than that of the LDD region so as to be shallower than the LDD region.

Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<Cl.

Abstract: An optical sensor element has a gate electrode opposed to a semiconductor layer made of an oxide semiconductor via a gate insulating film, source and drain electrodes being connected to the semiconductor layer, wherein the amount of light received by the semiconductor layer is read out as a drain current which changes in a non-volatile manner relative to a gate voltage.

Abstract: A CMOS image sensor and a method of fabricating the same. The CMOS image sensor may minimize disappearance of electrons generated by light without transmission of electrons to a transfer gate. A method of manufacturing a CMOS image sensor may include forming a trench over an isolation region of a semiconductor substrate to define an active region including a photodiode region and a transistor region. The method may include forming first conductivity-type ion implanted regions over a trench side wall of a photodiode region and over a region adjacent to the transistor region. The method may include forming second conductivity-type ion implanted regions between a first conductivity-type ion implanted region and a trench, and between a lower part of a transistor region and a first conductivity-type ion implanted region. The method may include forming an isolation layer, forming a gate electrode and a spacer, and/or forming a photodiode.

Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

Abstract: An image sensor includes a semiconductor layer, and first and second photoelectric converting units including first and second impurity regions in the semiconductor layer that are spaced apart from each other and that are at about an equal depth in the semiconductor layer, each of the impurity regions including an upper region and a lower region. A width of the lower region of the first impurity region may be larger than a width of the lower region of the second impurity region, and widths of upper regions of the first and second impurity regions are equal.

Abstract: A pixel cell includes a substrate, an epitaxial layer, and a photo converting device in the epitaxial layer. The epitaxial layer has a doping concentration profile of embossing shape, and includes a plurality of layers that are stacked on the substrate. The photo converting device does not include a neutral region that has a constant potential in the vertical direction. Therefore, the image sensor including the pixel cell has high quantization efficiency, and a crosstalk between photo-converting devices is decreased.

Abstract: A photoelectric conversion device includes a thin film transistor that is placed on a substrate, a photodiode that is connected to a drain electrode of the thin film transistor and includes an upper electrode, a lower electrode and a photoelectric conversion layer placed between the upper and lower electrodes, a first interlayer insulating film that covers at least the upper electrode, a second interlayer insulating film that is placed in an upper layer of the first interlayer insulating film and covers the thin film transistor and the photodiode, and a line that is connected to the upper electrode through a contact hole disposed in the first interlayer insulating film and the second interlayer insulating film.

Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.