Conductor-insulator-semiconductor Type (epo) Patents (Class 257/E31.083)
  • Patent number: 11695023
    Abstract: An apparatus includes a plurality of pixels and a plurality of microlenses. Each of the pixels has a first conversion unit and a second conversion unit surrounding the first conversion unit. The first conversion unit and the second conversion unit each have a light portion to receive light from a corresponding microlens. The first conversion unit and the second conversion unit are under the corresponding microlens. The pixels includes two or more pixels varying in an area ratio between an area of the light *portion of the first conversion unit and an area of the light portion of the second conversion unit.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: July 4, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Shoji Kono
  • Patent number: 11640088
    Abstract: A high definition display device is provided. The display device includes an array substrate, and an opposing substrate. The array substrate has a substrate, and on the substrate, a first pixel having a first color filter and a second pixel having a second color filter disposed adjacent to the first pixel. Each of the first color filter and the second color filter has a first dielectric layer, a transmissive layer disposed on the first dielectric layer, and a second dielectric layer disposed on the transmissive layer. The transmissive layer of the first color filter has a first film thickness, and the transmissive layer of the second color filter has a second film thickness larger than the first film thickness. On the transmissive layer of the second color filter, a first layer different from the transmissive layer is disposed on a side of the transmissive layer of the first color filter. A height of a bottom face of the first layer is equal to the first film thickness.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: May 2, 2023
    Assignee: JAPAN DISPLAY INC.
    Inventors: Ryo Onodera, Hajime Watakabe, Akihiro Hanada
  • Patent number: 8809922
    Abstract: Disclosed is a solid-state image sensing device including: a first photoelectric conversion element having a first semiconductor region of a first conductivity type formed inside a semiconductor substrate; a second photoelectric conversion element having a second semiconductor region of a first conductivity type formed at a deeper position of the semiconductor substrate than the first photoelectric conversion element; a gate electrode laminated on the semiconductor substrate and to which a predetermined voltage is applied at a charge transfer time; a floating diffusion region to which the charges accumulated in the first photoelectric conversion element and the second photoelectric conversion element are transferred at the charge transfer time; and a third semiconductor region of a first conductivity type arranged between the first semiconductor region and the second semiconductor region in a depth direction of the semiconductor.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Hitoshi Moriya, Hiroaki Ishiwata, Kazuyoshi Yamashita, Hiroyuki Mori
  • Patent number: 8735952
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged on a semiconductor substrate, in which each of the pixels includes a photoelectric converting portion and a charge converting portion for converting a charge generated by photoelectric conversion into a pixel signal and blooming is suppressed by controlling a substrate voltage of the semiconductor substrate.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: May 27, 2014
    Assignee: Sony Corporation
    Inventors: Maki Sato, Yoshiharu Kudoh
  • Patent number: 8704282
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) thinning the substrate from its rear surface; b) depositing, on the rear surface of the thinned substrate, an amorphous silicon layer of same conductivity type as the substrate but of higher doping level; and c) annealing at a temperature enabling to recrystallized the amorphous silicon to stabilize it.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: April 22, 2014
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Michel Marty, François Roy, Jens Prima
  • Patent number: 8633524
    Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: January 21, 2014
    Assignee: Sony Corporation
    Inventors: Kazuki Nomoto, Kaneyoshi Takeshita, Hiroyuki Ohri
  • Publication number: 20130320418
    Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.
    Type: Application
    Filed: August 17, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Hsien Tseng, Shou-Gwo Wuu, Chia-Chan Chen, Kuo-Yu Wu, Dao-Hong Yang, Ming-Hao Chung
  • Publication number: 20130320194
    Abstract: A device includes a first chip including an image sensor therein, and a second chip bonded to the first chip. The second chip includes a logic device selected from the group consisting essentially of a reset transistor, a selector, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit.
    Type: Application
    Filed: June 1, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Szu-Ying Chen, Meng-Hsun Wan, Tzu-Jui Wang, Dun-Nian Yaung, Jen-Cheng Liu
  • Publication number: 20130320419
    Abstract: A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric.
    Type: Application
    Filed: September 14, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Chih-Cherng Jeng
  • Publication number: 20130292751
    Abstract: An apparatus includes a semiconductor layer having an array of pixels arranged therein. A passivation layer is disposed proximate to the semiconductor layer over the array of pixels. A segmented etch stop layer including a plurality of etch stop layer segments is disposed proximate to the passivation layer over the array of pixels. Boundaries between each one of the plurality of etch stop layer segments are aligned with boundaries between pixels in the array of pixels.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 7, 2013
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai
  • Publication number: 20130193496
    Abstract: In image sensors and methods of manufacturing the same, a substrate has a photoelectric conversion area, a floating diffusion area and a recess between the photoelectric conversion area and the floating diffusion area. A plurality of photodiodes is vertically arranged inside the substrate in the photoelectric conversion area. A transfer transistor is arranged along a surface profile of the substrate having the recess and configured to transfer electric charges generated from the plurality of photodiodes to the floating diffusion area. The transfer transistor includes a gate insulation pattern on a sidewall and a bottom of the recess and on a surface of the substrate around the recess, and a gate conductive pattern including polysilicon doped with impurities and positioned on the gate insulation pattern along the surface profile of the substrate having the recess, wherein a cavity is in an upper surface of the gate conductive pattern.
    Type: Application
    Filed: September 13, 2012
    Publication date: August 1, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Ihara HISANORI
  • Publication number: 20130083225
    Abstract: An image sensor includes a semiconductor substrate having first and second faces. The sensor includes a plurality of pixel groups each including pixels, each pixel having a photoelectric converter and a wiring pattern, the converter including a region whose major carriers are the same with charges to be accumulated in the photoelectric converter. The sensor also includes a microlenses which are located so that one microlens is arranged for each pixel group. The wiring patterns are located at a side of the first face, and the plurality of microlenses are located at a side of the second face. Light-incidence faces of the regions of the photoelectric converters of each pixel group are arranged along the second face such that the light-incidence faces are apart from each other in a direction along the second face.
    Type: Application
    Filed: September 26, 2012
    Publication date: April 4, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: CANON KABUSHIKI KAISHA
  • Publication number: 20130069130
    Abstract: According to one embodiment, a solid state imaging device includes a semiconductor substrate having a first surface on a light incident side and a second surface on a side opposite to the light incident side, a photodiode in the semiconductor substrate, a functional layer which covers the entire photodiode on the side of the first surface of the semiconductor substrate, and has a function of transmitting the light traveling from an exterior to an interior of the semiconductor substrate, and reflecting the light traveling from the interior to the exterior of the semiconductor substrate, and a reflecting layer which covers the entire second surface of the semiconductor substrate, and has a function of reflecting the light traveling from the interior to the exterior of the semiconductor substrate.
    Type: Application
    Filed: March 22, 2012
    Publication date: March 21, 2013
    Inventor: Kazunori Kakehi
  • Publication number: 20130049084
    Abstract: A solid-state imaging device includes an element forming region formed on the surface of a substrate, element isolating parts that isolate pixels formed on the substrate, each of which is formed with a trench and a buried film, an opto-electric conversion element, and a buried-channel MOS transistor. The buried-channel MOS transistor includes a source region and a drain region, formed in the element forming region, that have a conductivity type opposite to that of the element forming region, a channel region having first impurity diffusion regions and a second impurity diffusion region, which have a conductivity type opposite to that of the element forming region, and a gate electrode. Each first impurity diffusion region is formed between the source region and drain region on a side adjacent to one element isolating part. The second impurity diffusion region is formed across the region between the source region and drain region.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 28, 2013
    Applicant: SONY CORPORATION
    Inventor: Naoki Saka
  • Publication number: 20130049081
    Abstract: Disclosed is a solid-state image sensing device including: a first photoelectric conversion element having a first semiconductor region of a first conductivity type formed inside a semiconductor substrate; a second photoelectric conversion element having a second semiconductor region of a first conductivity type formed at a deeper position of the semiconductor substrate than the first photoelectric conversion element; a gate electrode laminated on the semiconductor substrate and to which a predetermined voltage is applied at a charge transfer time; a floating diffusion region to which the charges accumulated in the first photoelectric conversion element and the second photoelectric conversion element are transferred at the charge transfer time; and a third semiconductor region of a first conductivity type arranged between the first semiconductor region and the second semiconductor region in a depth direction of the semiconductor.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 28, 2013
    Applicant: SONY CORPORATION
    Inventors: Hitoshi Moriya, Hiroaki Ishiwata, Kazuyoshi Yamashita, Hiroyuki Mori
  • Publication number: 20120307232
    Abstract: Two charge quantities (Q1,Q2) are output from respective pixels P (m,n) of the back-illuminated distance measuring sensor 1 as signals d?(m,n) having the distance information. Since the respective pixels P (m,n) output signals d?(m,n) responsive to the distance to an object H as micro distance measuring sensors, a distance image of the object can be obtained as an aggregate of distance information to respective points on the object H if reflection light from the object H is imaged on the pickup area 1B. If carriers generated at a deep portion in the semiconductor in response to incidence of near-infrared light for projection are led in a potential well provided in the vicinity of the carrier-generated position opposed to the light incident surface side, high-speed and accurate distance measurement is enabled.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 6, 2012
    Inventors: Mitsuhito MASE, Takashi Suzuki, Seiichiro Mizuno, Mitsutaka Takemura
  • Publication number: 20120307231
    Abstract: Two charge quantities (Q1,Q2) are output from respective pixels P (m,n) of the back-illuminated distance measuring sensor 1 as signals d?(m,n) having the distance information. Since the respective pixels P (m,n) output signals d?(m,n) responsive to the distance to an object H as micro distance measuring sensors, a distance image of the object can be obtained as an aggregate of distance information to respective points on the object H if reflection light from the object H is imaged on the pickup area 1B. If carriers generated at a deep portion in the semiconductor in response to incidence of near-infrared light for projection are led in a potential well provided in the vicinity of the carrier-generated position opposed to the light incident surface side, high-speed and accurate distance measurement is enabled.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 6, 2012
    Inventors: Mitsuhito MASE, Takashi Suzuki, Seiichiro Mizuno, Mitsutaka Takemura
  • Publication number: 20120267694
    Abstract: An integrated circuit arrangement is provided, including a transistor including a gate region; and a wavelength conversion element, wherein the wavelength conversion element may include the same material or same materials as the gate region of the transistor.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 25, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Dieter Kaiser, Dirk Meinhold, Thoralf Kautzsch, Georg Holfeld
  • Publication number: 20120261732
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) thinning the substrate from its rear surface; b) depositing, on the rear surface of the thinned substrate, an amorphous silicon layer of same conductivity type as the substrate but of higher doping level; and c) annealing at a temperature enabling to recrystallized the amorphous silicon to stabilize it.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Roy, Jens Prima
  • Publication number: 20120248516
    Abstract: The invention relates to linear time-delay and integration sensors (or TDI sensors). According to the invention, adjacent pixels of the same rank comprise, alternately, at least one photodiode and one transfer gate adjacent to the photodiode, the photodiodes comprising a common reference region of a first conductivity type, in which an individual region of opposite conductivity type is formed, itself covered by a individual surface region of the first conductivity type, characterized in that the surface regions of two photodiodes located on either side of a transfer gate are electrically separated so as to be able to be brought to different potentials in order to create potential wells and potential barriers allowing accumulation and transfer of charges as desired.
    Type: Application
    Filed: December 2, 2010
    Publication date: October 4, 2012
    Applicant: E2V SEMICONDUCTORS
    Inventor: Frederic Mayer
  • Publication number: 20120241768
    Abstract: An optical sensor circuit (20) includes a transistor (20c) and a transistor (20d). The transistor (20c) is connected in series with the transistor (20d). The transistor (20d) is configured to receive light. A black matrix is provided so as to face the transistor (20c). A voltage generated at a connecting point (i.e., node (netB)) of the transistor (20d) and the transistor (20c) varies depending on intensity of light received via the transistor (20d).
    Type: Application
    Filed: June 25, 2010
    Publication date: September 27, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Atsuhito Murai, Kazunori Morimoto, Yukihiko Nishiyama, Hajime Imai, Hideki Kitagawa
  • Publication number: 20120241825
    Abstract: A first thin film diode (100A) has a first semiconductor layer (10A) and a first light blocking layer (12A) disposed on the substrate side of the first semiconductor layer. A second thin film diode (100B) has a second semiconductor layer (10B) and a second light blocking layer (12B) disposed on the substrate side of the second semiconductor layer. An insulating film (14) is formed between the first semiconductor layer (10A) and the first light blocking layer (12A) and between the second semiconductor layer (10B) and the second light blocking layer (12B). A thickness D1 of a portion of the insulating film (14) positioned between the first semiconductor layer (10A) and the first light blocking layer (12A) is different from a thickness D2 of a portion of the insulating film (14) positioned between the second semiconductor layer (10B) and the second light blocking layer (12B).
    Type: Application
    Filed: November 24, 2010
    Publication date: September 27, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Hiroshi Aichi
  • Publication number: 20120218451
    Abstract: An imaging system may include imaging pixels. Each imaging pixel may include a reset transistor and a dummy transistor coupled to a floating diffusion storage node. When reset signals control are deasserted, capacitive coupling between the gate terminal of the reset transistor and the source-drain terminals of the reset transistor may lead to reset charge injection. The dummy transistor may have both of its source-drain terminals shorted together and shorted to the floating diffusion region. Dummy control signals, which may be provided by separate dummy control lines or may be provided using row-select signals, may be asserted on the dummy transistors at approximately the same time that the reset signals are deasserted. With arrangements of this type, the dummy control signals may inject an approximately equal and opposite charge onto the floating diffusion region, thereby reducing the reset charge injection caused by deasserting the reset control signals.
    Type: Application
    Filed: March 1, 2011
    Publication date: August 30, 2012
    Inventor: Vijay Rajasekaran
  • Publication number: 20120205730
    Abstract: The present disclosure provides an image sensor device and a method of forming the image sensor device. In an example, an image sensor device includes a substrate having a front surface and a back surface; a sensor element disposed at the front surface of the substrate, the sensor element being operable to sense radiation projected toward the back surface of the substrate; and a transparent conductive layer disposed over the back surface of the substrate, the transparent conductive layer at least partially overlying the sensor element. The transparent conductive layer is configured for being electrically coupled to a bottom portion of the sensor element.
    Type: Application
    Filed: February 14, 2011
    Publication date: August 16, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Szu-Ying Chen, Pao-Tung Chen, Dun-Nian Yaung, Jen-Cheng Liu
  • Publication number: 20120199893
    Abstract: A method for manufacturing a solid-state image pickup device is provided. The image pickup apparatus includes a photoelectric conversion portion disposed on the semiconductor substrate, a first insulating film over the photoelectric conversion portion, functioning as an antireflection film, a second insulating film on the first insulating film, disposed corresponding to the photoelectric conversion portion, and a waveguide having a clad and a core whose bottom is disposed on the second insulating film. The method includes forming an opening by anisotropically etching part of a member disposed over the photoelectric conversion portion, thereby forming the clad, and forming the core in the opening. In the method, the etching is performed under conditions where the etching rate of the second insulating film is lower than the etching rate of the member.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takehito Okabe, Kentarou Suzuki, Takashi Usui, Taro Kato, Mineo Shimotsusa, Shunsuke Takimoto
  • Publication number: 20120199894
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Inventors: Shogo FURUYA, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Publication number: 20120193689
    Abstract: Provided is a pixel of a multi-stacked complementary metal-oxide semiconductor (CMOS) image sensor and a method of manufacturing the image sensor including a light-receiving unit that may include first through third photodiode layers that are sequentially stacked, an integrated circuit (IC) that is formed below the light-receiving unit, electrode layers that are formed on and below each of the first through third photodiode layers, and a contact plug that connects the electrode layer formed below each of the first through third photodiode layers with a transistor of the IC.
    Type: Application
    Filed: August 8, 2011
    Publication date: August 2, 2012
    Inventors: Kyung-bae Park, Kyu-sik Kim, Yong-wan Jin, Woong Choi, Kwang-hee Lee, Do-hwan Kim
  • Publication number: 20120187461
    Abstract: A window opening in a semiconductor component is produced on the basis of a gate structure which serves as an efficient etch resist layer in order to reliably etch an insulation layer stack without exposing the photosensitive semiconductor area. The polysilicon in the gate structure is then removed on the basis of an established gate etching process, with the gate insulation layer preserving the integrity of the photosensitive semiconductor material.
    Type: Application
    Filed: September 30, 2009
    Publication date: July 26, 2012
    Applicant: X-FAB SEMICONDUCTOR FOUNDRIES AG
    Inventors: Wolfgang Einbrodt, Daniel Gaebler
  • Publication number: 20120175691
    Abstract: A hole-based ultra-deep photodiode in a CMOS image sensor and an associated process are disclosed. A p-type substrate is grounded or connected to a negative power supply. An n-type epitaxial layer is grown on the p-type substrate, and is connected to a positive power supply. An ultra-deep p-type photodiode implant region is formed in the n-type epitaxial layer. Thermal steps are added to insure a smooth and deep doping profile.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 12, 2012
    Inventors: Yang Wu, Feixia Yu
  • Publication number: 20120112253
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 10, 2012
    Inventor: Hidetoshi KOIKE
  • Publication number: 20120098044
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Application
    Filed: December 29, 2011
    Publication date: April 26, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: MOTONARI KATSUNO, RYOUHEI MIYAGAWA, MASAYUKI MATSUNAGA
  • Publication number: 20120085999
    Abstract: Example embodiments disclose transistors, methods of manufacturing the same, and electronic devices including transistors. An active layer of a transistor may include a plurality of material layers (oxide layers) with different energy band gaps. The active layer may include a channel layer and a photo sensing layer. The photo sensing layer may have a single-layered or multi-layered structure. When the photo sensing layer has a multi-layered structure, the photo sensing layer may include a first material layer and a second material layer that are sequentially stacked on a surface of the channel layer. The first layer and the second layer may be alternately stacked one or more times.
    Type: Application
    Filed: May 3, 2011
    Publication date: April 12, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: I-hun Song, Yin Huaxiang, Sang-hun Jeon, Sung-ho Park
  • Publication number: 20120018619
    Abstract: A method of resetting a photosite is disclosed. Photogenerated charges accumulated in the photosite are reset by recombining the photogenerated charges with charges of opposite polarity.
    Type: Application
    Filed: July 18, 2011
    Publication date: January 26, 2012
    Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Julien Michelot
  • Patent number: 8093595
    Abstract: A method of manufacturing a thin film array panel is provided, which includes: forming a gate line formed on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line and a drain electrode disposed at least on the ohmic contact layer, forming an oxide on the data line; etching the ohmic contact layer using the data line and the drain electrode as an etch mask; and forming a pixel electrode connected to the drain electrode.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: January 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Gab Kim, Sung-Chul Kang, Ho-Min Kang, In-Ho Song, Hee-Hwan Choe
  • Publication number: 20110310381
    Abstract: An object is to provide a photosensor utilizing an oxide semiconductor in which a refreshing operation is unnecessary, a semiconductor device provided with the photosensor, and a light measurement method utilizing the photosensor. It is found that a constant gate current can be obtained by applying a gate voltage in a pulsed manner to a transistor including a channel formed using an oxide semiconductor, and this is applied to a photosensor. Since a refreshing operation of the photosensor is unnecessary, it is possible to measure the illuminance of light with small power consumption through a high-speed and easy measurement procedure. A transistor utilizing an oxide semiconductor having a relatively high mobility, a small S value, and a small off-state current can form a photosensor; therefore, a multifunction semiconductor device can be obtained through a small number of steps.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Patent number: 8053801
    Abstract: A photodetector including a photodiode formed in a semiconductor substrate and a waveguide element formed of a block of a high-index material extending above the photodiode in a thick layer of a dielectric superposed to the substrate, the thick layer being at least as a majority formed of silicon oxide and the block being formed of a polymer of the general formula R1R2R3SiOSiR1R2R3 where R1, R2, and R3 are any carbonaceous or metal substituents and where one of R1, R2, or R3 is a carbonaceous substituent having at least four carbon atoms and/or at least one oxygen atom.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 8, 2011
    Assignee: STMicroelectronics SA
    Inventors: Cyril Fellous, Nicolas Hotellier, Christophe Aumont, Francois Roy
  • Patent number: 8026114
    Abstract: An emitter has a plurality of types of light-emitting units with different changes in emission characteristics over time. In addition, the emitter includes a deterioration adjustment device which adjusts the deterioration of the emission characteristics over time in a predetermined type of light-emitting unit. The light-emitting units respectively include a light-emitting layer and a hole donor which supplies positive holes to the light-emitting layer, and the deterioration adjustment device may be the hole donor in which the thickness is adjusted based on the deterioration in emission characteristics over time in the predetermined type of light-emitting unit.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: September 27, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Hirofumi Sakai
  • Publication number: 20110210381
    Abstract: Provided is an image sensor including a drive transistor as a voltage buffer, which can suppress generation of secondary electrons from a channel of the drive transistor to prevent generation of image defects caused by dark current. The transistor includes a gate electrode formed on a substrate, source and drain regions formed in the substrate exposed to both sides of the gate electrode, respectively, and an electric field attenuation region formed on the drain region and partially overlapping the gate electrode.
    Type: Application
    Filed: September 29, 2009
    Publication date: September 1, 2011
    Applicant: CROSSTEK CAPITAL, LLC
    Inventor: Man Lyun Ha
  • Publication number: 20110163364
    Abstract: Image sensor, fabricating method thereof, and device comprising the image sensor are provided, which comprises a substrate in which a photoelectric transformation device is formed, an interconnection structure formed on the substrate and including multiple intermetal dielectric layers and multiple metal interconnections placed in the multiple intermetal dielectric layers, the interconnection structure defining a cavity aligned corresponding to the photoelectric transformation device, a moisture absorption barrier layer conformally formed on a top of the interconnection structure and in the cavity; and a light guide unit formed on the moisture absorption barrier layer and including light transmittance material filling the cavity, wherein the moisture absorption barrier layer is formed with a uniform thickness on both sides and a bottom of the cavity and on a top surface of the multiple intermetal dielectric layer.
    Type: Application
    Filed: December 23, 2010
    Publication date: July 7, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Ki Kim, Ho-Kyu Kang, June-Taeg Lee, Jae-Hee Choi
  • Publication number: 20110156112
    Abstract: An image sensor includes an array of pixels, with at least one pixel including a photodetector formed in a substrate layer and a transfer gate disposed adjacent to the photodetector. The substrate layer further includes multiple charge-to-voltage conversion regions. A single photodetector can transfer collected charge to a single charge-to-voltage conversion region, or alternatively multiple photodetectors can transfer collected charge to a common charge-to-voltage conversion region shared by the photodetectors. An implant region formed when dopants are implanted into the substrate layer to form source/drain implant regions is disposed in only a portion of each transfer gate while each charge-to-voltage conversion region is substantially devoid of the implant region.
    Type: Application
    Filed: November 9, 2010
    Publication date: June 30, 2011
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Patent number: 7964451
    Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: June 21, 2011
    Assignee: Panasonic Corporation
    Inventors: Naoto Niisoe, Kazuhisa Hirata, Tohru Yamada
  • Publication number: 20110133260
    Abstract: A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel area and a logic area, forming a light sensing element in the pixel area, and forming a first transistor in the pixel area and a second transistor in the logic area. The step of forming the first transistor in the pixel area and the second transistor in the logic area includes performing a first implant process in the pixel area and the logic area, performing a second implant process in the pixel area and the logic area, and performing a third implant process only in the logic area.
    Type: Application
    Filed: December 14, 2010
    Publication date: June 9, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Yao Ko, Chung-Wei Chang, Han-Chi Liu, Shou-Gwo Wuu
  • Patent number: 7928439
    Abstract: A thin film transistor (TFT) may include a substrate, a gate electrode on the substrate, a gate insulating layer on the gate electrode, and a semiconductor layer on the gate insulating layer. The semiconductor layer may include a top surface, a channel area aligned in a vertical direction with the gate electrode, a plurality of doped areas proximate to the channel area, and a plurality of non-doped areas. Source and drain electrodes may be on the top surface of the semiconductor layer aligned above respective ones of the plurality of non-doped areas of the semiconductor layer. A planarization layer may be on the gate insulating layer, the source and drain electrodes and the semiconductor layer channel area, and may include a plurality of openings respectively exposing the plurality of doped areas of the semiconductor layer and a portion of the source electrode and the drain electrode.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: April 19, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Hee-Chul Jeon, Chul-Kyu Kang, Woo-Sik Jun, Jong-Hyun Choi
  • Publication number: 20110068382
    Abstract: A two dimensional time delay integration CMOS image sensor having a plurality of pinned photodiodes, each pinned photodiode collects a charge when light strikes the pinned photodiode, a plurality of electrodes separating the plurality of pinned photodiodes, the plurality of electrodes are configured for two dimensional charge transport between two adjacent pinned photodiodes, and a plurality of readout nodes connected to the plurality of pinned photodiodes via address lines.
    Type: Application
    Filed: December 2, 2010
    Publication date: March 24, 2011
    Inventor: Stefan Lauxtermann
  • Patent number: 7901961
    Abstract: An organic light emitting display device capable of hermetically sealing a space between a deposition substrate and an encapsulation substrate with inorganic sealing materials is disclosed. One embodiment of the organic light emitting display device includes a first substrate including power supply lines formed on an array, and a circumference of the array, of an organic light emitting diode, and connected to a pad unit through the power pad line to supply a power source to each of the organic light emitting diodes; a second substrate arranged on at least the array of the first substrate; and an inorganic sealing material for sealing an inner space between the first substrate and the second substrate while forming a closed boundary, wherein the inorganic sealing material is not overlapped with a region in which the power supply line is formed.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: March 8, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Dong Young Sung, Keun Soo Lee
  • Patent number: 7883912
    Abstract: According to one aspect of the present invention, at least one or more of patterns required for manufacturing a display device, such as a conductive layer which forms a wiring or an electrode and a mask, is formed by a droplet discharging method. At that time, a portion of the gate insulating film where is not located under the semiconductor layer is removed during manufacturing steps of the present invention.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: February 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kunihiko Fukuchi, Gen Fujii, Osamu Nakamura, Shinji Maekawa
  • Publication number: 20110012009
    Abstract: An image sensor includes a light-sensing element, a first transistor, and a second transistor. The light-sensing element has a first end and a second end electrically connected to a select line. The first transistor has a first end electrically connected to a first control line, a control end electrically connected to the first end, and a second end electrically connected to the first end of the light-sensing element. The second transistor has a first end electrically connected to a voltage source, a control end electrically connected to the first end of the light-sensing element, and a second end electrically connected to an output line. The light-sensing element uses the material of silicon rich oxide so that the light-sensing element can sense the luminance variance and have the characteristic of the capacitor for the level boost.
    Type: Application
    Filed: September 17, 2009
    Publication date: January 20, 2011
    Inventor: Ming-Hung Chuang
  • Patent number: 7838955
    Abstract: An image sensor includes a metal interconnection and readout circuitry over a first substrate, an image sensing device, and an ion implantation isolation layer. The image sensing device is over the metal interconnection, and an ion implantation isolation layer is in the image sensing device. The image sensing device includes first, second and third color image sensing units, and ion implantation contact layers. The first, second and third color image sensing units are stacked in or on a second substrate. The ion implantation contact layers are electrically connected to the first, second and third color image sensing units, respectively.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: November 23, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hee Sung Shim
  • Patent number: 7838319
    Abstract: There are provided a MOS transistor and a manufacturing method thereof. The MOS transistor includes a substrate on which an insulating layer is formed, a gate embedded in the insulating layer, wherein the top surface of the gate is exposed, a gate oxide layer formed on the insulating layer and the gate, a silicon layer formed on the gate oxide layer, and a source region and a drain region formed in the silicon layer to be in contact with the gate oxide layer.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: November 23, 2010
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yun Hyung Sun
  • Patent number: 7821093
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 26, 2010
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun