Abstract: An optoelectronic integrated substrate, a preparation method thereof and an optoelectronic integrated circuit. The electronic integrated substrate includes a base substrate and an electronic device and a photo-diode disposed on the base substrate, wherein the photo-diode includes an ohmic contact layer and an intrinsic amorphous silicon layer, and the ohmic contact layer and the intrinsic amorphous silicon layer are sequentially arranged along a direction parallel to the plane of the base substrate and are connected.

Abstract: An interlayer interconnect for an integrated circuit includes a first line in a first wiring layer, a first via portion integral to and extending from the first line, and a second line in a second wiring layer that is adjacent to the first wiring layer. The interlayer interconnect also includes a third line in the second wiring layer that is a first distance from the second line, wherein the first distance is a pitch of the second wiring layer, and a second via portion integral to and extending from the second line and in electrical contact with the first via portion at an interface to form a via. The via extends a second distance that is at least one-and-a-quarter times the pitch.

Abstract: A photo detector including a transistor and a charge storing component is provided. The transistor includes a gate, a source and a drain. The charge storing component is electrically connected with the transistor, and includes a top electrode and a bottom electrode. The source of the transistor, the drain of the transistor and the bottom electrode of the charge storing component are formed of a semiconductor layer.

Abstract: An exemplary imaging device according to the present disclosure includes: an imaging region including a plurality of pixels; a peripheral region located outside of the imaging region; and a blockade region located between the imaging region and the peripheral region Each of the plurality of pixels includes a photoelectric conversion layer, a pixel electrode to collect a charge generated in the photoelectric conversion layer, and a first doped region electrically connected to the pixel electrode. In the peripheral region, a circuit to drive the plurality of pixels is provided. The blockade region includes a second doped region of a first conductivity type located between the imaging region and the peripheral region and a plurality of first contact plugs connected to the second doped region.

Abstract: A display device, includes: a pixel connected to a scan line and a data line crossing the scan line, wherein the pixel includes a light emitting element, a driving transistor configured to control a driving current supplied to the light emitting element according to a data voltage received from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal applied to the scan line; wherein the driving transistor includes a first active layer including an oxide semiconductor and a first oxide layer on the first active layer and including an oxide semiconductor; and wherein the first switching transistor includes a second active layer on the first active layer and including the same oxide semiconductor as the first oxide layer.

Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.

Abstract: In image sensors and methods of manufacturing the same, a substrate has a photoelectric conversion area, a floating diffusion area and a recess between the photoelectric conversion area and the floating diffusion area. A plurality of photodiodes is vertically arranged inside the substrate in the photoelectric conversion area. A transfer transistor is arranged along a surface profile of the substrate having the recess and configured to transfer electric charges generated from the plurality of photodiodes to the floating diffusion area. The transfer transistor includes a gate insulation pattern on a sidewall and a bottom of the recess and on a surface of the substrate around the recess, and a gate conductive pattern including polysilicon doped with impurities and positioned on the gate insulation pattern along the surface profile of the substrate having the recess, wherein a cavity is in an upper surface of the gate conductive pattern.

Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.

Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.

Abstract: A device includes a transistor including a source and a drain disposed in a substrate and a gate disposed above the substrate. The gate includes a first longitudinal member disposed above the source and the drain and running substantially parallel to a channel of the transistor. The first longitudinal member is disposed over a first junction isolation area. The gate also includes a second longitudinal member disposed above the source and the drain and running substantially parallel to the channel of the transistor. The second longitudinal member is disposed over a second junction isolation region. The gate also includes a cross member running substantially perpendicular to the channel of the transistor and connecting the first longitudinal member to the second longitudinal member. The cross member is disposed above and between the source and the drain.

Abstract: A CIS and a method of manufacturing the same, the CIS including a substrate having a first surface and second surface opposite thereto, the substrate including an APS array region including a photoelectric transformation element and a peripheral circuit region; an insulating interlayer on the first surface of the substrate and including metal wirings electrically connected to the photoelectric transformation element; a light blocking layer on the peripheral circuit region of the second surface of the substrate, exposing the APS array region, and including a plurality of metal wiring patterns spaced apart from one another to form at least one drainage path along a boundary region between the APS array region and the peripheral circuit region; a color filter layer on the second surface of the substrate covering the APS array region and the light blocking layer; and a microlens on the color filter layer on the APS array region.

Abstract: There has been such a problem that radiation detecting elements using semiconductor elements have a low radiation detection efficiency, since the radiation detecting elements easily transmit radiation, even though the radiation detecting elements have merits, such as small dimensions and light weight. Disclosed are a radiation detecting element and a radiation detecting device, wherein a film formed of a metal, such as tungsten, is formed on the radiation incident surface of the radiation detecting element, and the incident energy of the radiation is attenuated. The efficiency of generating carriers by way of radiation incidence is improved by attenuating the incident energy, the thickness of the metal film is optimized, and the radiation detection efficiency is improved.

Abstract: An image sensor includes an active region including a photoelectric conversion region and a floating diffusion region, which are separated from each other, defined by a device isolation region on a semiconductor substrate, and a transfer transistor including a first sub-gate provided on an upper surface of the semiconductor substrate and a second sub-gate extending within a recessed portion of the semiconductor substrate on the active region between the photoelectric conversion region and the floating diffusion region, wherein the photoelectric conversion region includes a plurality of photoelectric conversion elements, which vertically overlap each other within the semiconductor substrate and are spaced apart from the recessed portion.

Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.

Abstract: Embodiments of radiographic imaging systems; radiography detectors and methods for using the same; and/or fabrication methods therefore can include radiographic imaging array that can include a plurality of pixels that each include a photoelectric conversion element coupled to a thin-film switching element. In certain exemplary embodiments, thin-film switching element is a metal oxide (e.g., a-IGZO) TFT manufactured using a reduce photolithography mask counts. In certain exemplary embodiments, the thin-film switching element is a metal oxide (e.g., a-IGZO) TFT that includes reduced lower alignment tolerances between TFT electrodes. In certain exemplary embodiments, the thin-film switching element is a metal oxide (e.g., a-IGZO) TFT including a reduced thickness active layer.

Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.

Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

Abstract: A device includes a transistor including a source and a drain disposed in a substrate and a gate disposed above the substrate. The gate includes a first longitudinal member disposed above the source and the drain and running substantially parallel to a channel of the transistor. The first longitudinal member is disposed over a first junction isolation area. The gate also includes a second longitudinal member disposed above the source and the drain and running substantially parallel to the channel of the transistor. The second longitudinal member is disposed over a second junction isolation region. The gate also includes a cross member running substantially perpendicular to the channel of the transistor and connecting the first longitudinal member to the second longitudinal member. The cross member is disposed above and between the source and the drain.

Abstract: A detector module, in particular for super-resolution satellites, contains a multi-chip carrier. At least one TDI-CCD detector and at least one CMOS chip are arranged on the multi-chip carrier, and are electrically connected to one another. The CMOS chip contains at least the digital output electronics for the TDI-CCD detector.

Abstract: A unit pixel of an image sensor and a photo detector are disclosed. The photo detector of the present invention can include: a light-absorbing part configured to absorb light by being formed in a floated structure; an oxide film having one surface thereof being in contact with the light-absorbing part; a source being in contact with one side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; a drain facing the source so as to be in contact with the other side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; and a channel formed between the source and the drain and configured to form flow of an electric current between the source and drain.

Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, a method includes forming a first and second gate oxide layer over a substrate, forming a layer of photoresist over the first gate oxide layer, applying nitridation to the photoresist and the second gate oxide layer such that the first gate oxide layer is protected from the nitridation by the photoresist, and forming a polysilicon gate over the first and second gate oxide layers.

Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, an imaging pixel of an image sensor includes a photodiode region to accumulate an image charge in response to incident light, a first transistor having a gate oxide layer, the gate oxide layer having a first level of nitridation, and a second transistor having a gate oxide layer, the gate oxide layer having a second level of nitridation that is higher than the first level of nitridation.

Abstract: System and method for providing a light shield for a CMOS imager is provided. The light shield comprises a structure formed above a point between a photo-sensitive element and adjacent circuitry. The structure is formed of a light-blocking material, such as a metal, metal alloy, metal compound, or the like, formed in dielectric layers over the photo-sensitive elements.

Abstract: An image sensor includes a pixel array, a bit line, a supplemental capacitance node line, and a control circuit. The pixel array includes a plurality of pixel cells each including a floating diffusion (“FD”) node and a photosensitive element coupled to selectively transfer image charge to the FD node. The bit line is coupled to selectively conduct image data output from a first group of the pixel cells. The supplemental capacitance node line is coupled to the FD node of a second group of the pixel cells different from the first group. The control circuit is coupled to the supplemental capacitance node line to selectively increase the potential at the FD node of each of the pixel cells of the second group by selectively asserting a FD boost signal on the supplemental capacitance node line.

Abstract: Light-sensing apparatuses may include a light sensor transistor and a switching transistor in a light-sensing pixel, the transistors being oxide semiconductor transistors. In the light-sensing apparatus, the light sensor transistor and the switching transistor in the light-sensing pixel may be adjacently formed on one substrate, the switching transistor including a channel material that is relatively less light-sensitive than the light sensor transistor and is stable, and the light sensor transistor includes a channel material that is relatively light-sensitive. The light sensor transistor may include a transparent upper electrode on a surface of a channel, and a negative voltage may be applied to the transparent upper electrode, whereby a threshold voltage shift in a negative voltage direction may be prevented or reduced.

Abstract: According to the present invention, a highly sensitive photo-sensing element and a sensor driver circuit are prepared by planer process on an insulating substrate by using only polycrystalline material. Both the photo-sensing element and the sensor driver circuit are made of polycrystalline silicon film. As the photo-sensing element, a photo transistor is formed by using TFT, which comprises a first electrode 11 prepared on an insulating substrate 10, a photoelectric conversion region 14 and a second electrode 12, and a third electrode 13 disposed above the photoelectric conversion region 14. An impurity layer positioned closer to an intrinsic layer (density of active impurities is 1017 cm?3 or lower) is provided on the regions 15 and 16 on both sides under the third electrode 13 or on one of the regions 15 or 16 on one side.

Abstract: The present invention is for a fast optic nonvolatile memory cell (FONM) that operates with a speed >1000000 times faster than the commercially available FLASH memory. The information (or charges) can be entered into the FONM cell by switching on a built-in laser or LED (Light Emitting Diode). Excited by the lights, and driven by electric fields, the regions of low carrier lifetimes thermally generate excess electrons or positive charges to fill the storage gaps or interfaces. To detect the stored information, two BJTs (Bipolar Junction Transistors) are arranged in a mirrored configuration—with alternative regions of high or low carrier lifetimes and bandgap energies. By comparing the BJT “fly-back” characteristics a voltage difference can be detected as a signal of whether the information is stored or not stored.

Abstract: A pixel is provided, comprising at least one transistor, the pixel being arranged for cycling the at least one transistor between two or more bias states, e.g. inversion and accumulation, during a readout phase. Due to the cycling between the at least two bias states, the correlation over time of the 1/f noise of the readout signals is broken, thus taking multiple samples and applying an operator onto the samples can reduce the effect of the 1/f noise to arbitrary low levels.

Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.

Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.

Abstract: An object of the present invention is to provide a thin film transistor fabricating method including a simplified step of forming contact holes. This method involves previously removing a gate insulating film (115) on a gate electrode (110) which is not covered with a channel layer (120) in a TFT (100). Hence, an insulating film formed on the gate electrode (110) which is not covered with the channel layer (120) becomes equal in thickness to an insulating film formed on a source region (120a) and a drain region (120b). Therefore, a contact hole (155) reaching a surface of the gate electrode (110) can be formed simultaneously with a contact hole (135a) reaching a surface of the source region (120a) and a contact hole (135b) reaching a surface of the drain region (120b).

Abstract: A method of manufacturing image sensor includes the following steps. A substrate having a first region and a second region is provided. A plurality of image sensing components and a periphery circuit are formed on the substrate in the first region and the second region respectively. A first conductive layer and a first dielectric layer are formed on the substrate. An etch stop layer is formed on the first dielectric layer. A second conductive layer is formed on the etch stop layer in the second region. A second dielectric layer is formed on the substrate. The second dielectric layer on the etch stop layer in the first region is etched to be removed. The etch stop layer in the first region is removed to form a space. A color filter array is disposed in the space.

Abstract: Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. A transistor in the pixel sensor cell has a gate structure that includes a gate dielectric with a thick region and a thin region. A gate electrode of the gate structure is formed on the thick region of the gate dielectric and the thin region of the gate dielectric. The thick region of the gate dielectric and the thin region of the gate dielectric provide the transistor with an asymmetric threshold voltage.

Abstract: The present invention uses an image pickup device comprising a plurality of pixels respectively including a photoelectric conversion unit for converting incoming light into a signal charge, an amplifying unit for amplifying the signal charge generated by the photoelectric conversion unit and a transfer unit for transferring the signal charge from the photoelectric conversion unit to the amplifying unit, in which the photoelectric conversion unit is formed of a first-conductivity-type first semiconductor region and a second-conductivity-type second semiconductor region and a second-conductivity-type third semiconductor region is formed on at least a part of the gap between a photoelectric conversion unit of a first pixel and a photoelectric conversion unit of a second pixel adjacent to the first pixel, a first-conductivity-type fourth semiconductor region having an impurity concentration higher than that of the first semiconductor region is formed between the photoelectric conversion unit and the third semicon

Abstract: In a display apparatus, a light sensor of a display includes a light sensing layer, a source electrode, a drain electrode, an insulating layer, and a gate electrode to sense light from an external source. The light sensing layer is disposed on the substrate to sense light, and the source and drain electrodes are disposed on the light sensing layer and are covered by the insulating layer. The gate electrode is disposed on the insulating layer. An edge of the gate electrode is disposed on the light sensing layer at least in an area where the light sensing layer is overlapped with the source and drain electrodes.

Abstract: A semiconductor structure having a transistor region and an optical device region includes a transistor in a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second semiconductor layer, and the second semiconductor layer is over a second insulating layer. A gate dielectric of the transistor is in physical contact with a top surface of the first semiconductor layer, and the transistor is formed in the transistor region of the semiconductor structure. A waveguide device in the optical device region and a third semiconductor layer over a portion of the second semiconductor layer.

Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

Abstract: Disclosed herein is a semiconductor device including an element isolation region configured to be formed on a semiconductor substrate, wherein the element isolation region is formed of a multistep trench in which trenches having different diameters are stacked and diameter of an opening part of the lower trench is smaller than diameter of a bottom of the upper trench.

Abstract: A solid-state image sensor having a pixel array area where a plurality of pixels are arranged, and a peripheral circuit area, each pixel including a photoelectric converter, and a transfer gate electrode which forms a channel for transferring charges generated by the photoelectric converter to a floating diffusion portion, comprises a first insulating film arranged to cover an upper surface of the photoelectric converter, at least part of an upper surface of the transfer gate electrode, and a side surface of the transfer gate electrode, a second insulating film arranged on a gate electrode of a MOS transistor arranged in the peripheral circuit area, and an interlayer insulating film arranged in contact with the first insulating film and the second insulating film.

Abstract: A detector module, in particular for super-resolution satellites, contains a multi-chip carrier. At least one TDI-CCD detector and at least one CMOS chip are arranged on the multi-chip carrier, and are electrically connected to one another. The CMOS chip contains at least the digital output electronics for the TDI-CCD detector.

Abstract: Disclosed herein is a solid-state imaging device including: a semiconductor region of a second conductivity type which is formed on a face side of a semiconductor substrate; a photoelectric conversion element which has an impurity region of a first conductivity type and which is operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof; an electric-charge holding region which has an impurity region of the first conductivity type and in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out; an intermediate transfer path through which only the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined electric charge amount is transferred into the electric-charge holding region; and an impurity layer.

Abstract: A photoelectric conversion apparatus includes a semiconductor substrate on which a photoelectric conversion element and a transistor are arranged and a plurality of wiring layers including a first wiring layer and a second wiring layer above the first wiring layer, in which a connection between the semiconductor substrate and any of the plurality of wiring layers, between a gate electrode of the transistor and any of the plurality of wiring layers, or between the first wiring layer and the second wiring layer, has a stacked contact structure.

Abstract: Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor substrate having multiple doped regions forming at least one junction, a textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation, and an electrical transfer element coupled to the semiconductor substrate and operable to transfer an electrical signal from the at least one junction. In one aspect, the textured region is operable to facilitate generation of an electrical signal from the detection of infrared electromagnetic radiation. In another aspect, interacting with electromagnetic radiation further includes increasing the semiconductor substrate's effective absorption wavelength as compared to a semiconductor substrate lacking a textured region.

Abstract: A semiconductor device includes a photodiode, a first transistor, a second transistor, and a third transistor. The second transistor and the third transistor have a function of retaining a charge accumulated in a gate of the first transistor. In a period during which the second transistor and the third transistor are off, a voltage level of a voltage applied to a gate of the second transistor is set to be lower than a voltage level of a source of the second transistor and a voltage level of a drain of the second transistor, and a voltage level of a voltage applied to a gate of the third transistor is set to be lower than a voltage level of a source of the third transistor and a voltage level of a drain of the third transistor.

Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion element provided on the light incidence side of the substrate and including a photoelectric conversion film sandwiched between a first electrode provided separately for each of pixels, and a second electrode provided opposite the first electrode, the photoelectric conversion film being made of an organic material or an inorganic material and generating a signal charge according to the quantity of incident light, an amplifier transistor having an amplifier gate electrode connected to the first electrode, and a voltage control circuit that is connected to the second electrode, and supplies a desired voltage to the second electrode.

Abstract: An image sensor according to an example embodiment may include a plurality of photoelectric transformation active regions, a plurality of read active regions, and/or at least one read gate. The plurality of photoelectric transformation active regions may be formed on a substrate. Each read active region may be formed adjacent to one of the plurality of photoelectric transformation active regions. Each read gate may be formed on one of the read active regions and partially overlap at least one of the adjacent photoelectric transformation active regions. Each read gate may be electrically isolated from the overlapping portion of the photoelectric transformation active region.

Abstract: System and method for providing a light shield for a CMOS imager is provided. The light shield comprises a structure formed above a point between a photo-sensitive element and adjacent circuitry. The structure is formed of a light-blocking material, such as a metal, metal alloy, metal compound, or the like, formed in dielectric layers over the photo-sensitive elements.

Abstract: An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.

Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.

Abstract: The present invention uses an image pickup device comprising a plurality of pixels respectively including a photoelectric conversion unit for converting incoming light into a signal charge, an amplifying unit for amplifying the signal charge generated by the photoelectric conversion unit and a transfer unit for transferring the signal charge from the photoelectric conversion unit to the amplifying unit, in which the photoelectric conversion unit is formed of a first-conductivity-type first semiconductor region and a second-conductivity-type second semiconductor region and a second-conductivity-type third semiconductor region is formed on at least a part of the gap between a photoelectric conversion unit of a first pixel and a photoelectric conversion unit of a second pixel adjacent to the first pixel, a first-conductivity-type fourth semiconductor region having an impurity concentration higher than that of the first semiconductor region is formed between the photoelectric conversion unit and the third semicon