Abstract: A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drai

Abstract: A liquid crystal display device includes a semiconductor layer which is formed of a poly-Si layer and an a-Si layer and formed above a gate electrode with a gate insulating film interposed therebetween. A source electrode or a drain electrode is formed above the semiconductor layer. An n+Si layer is formed between the source electrode or the drain electrode and the semiconductor layer. Since ends of the source electrode or the drain electrode are formed inside ends of the semiconductor layer, leak current at the ends of the semiconductor layer can be reduced.

Abstract: A semiconductor device can easily reduce a leak current which flows when a reversely-staggered-type TFT element in which an active layer is made of polycrystalline semiconductor is turned off. The semiconductor device includes a reversely-staggered-type TFT element in which a semiconductor layer, a source electrode and a drain electrode are arranged on a surface of an insulation film, and a portion of the source electrode and a portion of the drain electrode respectively get over the semiconductor layer.

Abstract: At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.

Abstract: An array substrate includes first and second gate electrodes on a substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers on the gate insulating layer; an interlayer insulating layer on the first and second active layers; first to fourth ohmic contact layers respectively contacting both sides of the first active layer and both sides of the second active layer; first and second source electrodes and first and second drain electrodes respectively on the first, third, second and fourth ohmic contact layers; a data line connected to the first source electrode; a first passivation layer connected to the first gate electrode; a power line; one end and the other end of a connection electrode respectively connected to the first drain electrode and the second gate electrode; a second passivation layer; and a pixel electrode-connected to the second drain electrode.

Abstract: An electronic device comprises at least one static induction transistor (14; 114; 214) and at least one thin film transistor (16; 116). The static induction transistor (14; 114; 214) has a first channel (14.4; 114.4; 214.4) of a semi conducting material extending between a first main electrode (14.2; 114.2; 214.2) and a second main electrode (14.3; 114.3) through a first and a second insulating layer (11, 13; 111, 113), and has a first control electrode (14.1; 114.1) surrounding the first channel and extending between the first and the second insulating layer. The thin film transistor (16; 116) has a third main electrode (16.2; 116.2) and a fourth main electrode (16.3; 116.3) coupled by a second channel (16.4; 116.4) of a semi conducting material and a second control electrode (16.1; 116.1). At least one of the first and the second insulating layer functions as a dielectric layer between the second control electrode and the second channel.

Abstract: A light emitting element includes: a first electrode and a second electrode provided as being opposed each other, at least one of the first electrode and the second electrode being transparent or translucent; and a phosphor layer sandwiched between the first electrode and the second electrode, from a direction that is perpendicular to main surfaces of the first and second electrodes. In this structure, the phosphor layer includes: a plurality of phosphor particles that are disposed within a plane of the phosphor layer; and a first and second insulating guides that sandwich two sides of each of the phosphor particles from a direction that is in parallel with the surface of the phosphor layer.

Abstract: To provide a display device having a thin film transistor with high electric characteristics and excellent reliability and a manufacturing method thereof. A gate electrode, a gate insulating film provided over the gate electrode, a first semiconductor layer provided over the gate insulating film and having a microcrystalline semiconductor, a second semiconductor layer provided over the first semiconductor layer and having an amorphous semiconductor, and a source region and a drain region provided over the second semiconductor layer are provided. The first semiconductor layer has high crystallinity than the second semiconductor layer. The second semiconductor layer includes an impurity region having a conductivity type different from a conductivity type of the source region and the drain region between the source region and the drain region.

Abstract: A voltage-operated layered arrangement comprising a substrate (1), a layered structure (2, 3, 4, 5) that is applied to the substrate and that comprises at least one electrically conductive functional layer (3) arranged between a first electrode (2) and a second electrode (4), and a field-degrading layer (5) that is less electrically conductive than the functional layer (3) and that is applied to the second electrode (4) arranged on the side of the layered structure remote from the substrate in such a way that it covers the second electrode (4) at least in the region of an edge (4a) and connects the second electrode (4) to the first electrode (2) electrically.

Abstract: The present invention is a liquid crystal panel substrate that comprises: pixel units each having a pixel electrode, to be used as a reflective electrode and arranged in a matrix pattern on a substrate, and a switching element controlling a voltage applied to the pixel electrode; wherein between the pixel electrode and a conductive layer forming a terminal electrode of the switching element, a contact hole is provided for connecting the pixel electrode and the terminal electrode. A light-shielding layer, having an opening surrounding the portion in which the contact hole is formed, and having no opening in regions between a plurality of adjacent pixel electrodes, is formed between the pixel electrode and the conductive layer. Harmful effects due to light leaking through a space between the pixel electrodes can thereby be prevented.

Abstract: A diode (130) whose anode is connected to a conductive plate (140) formed so as to cover a TFT (120) of a pixel formation portion (110) and whose cathode is connected to a video signal line is provided. With the configuration, when potential of a video signal applied to the video signal line is lower than that of the conductive plate (140), a current is passed to the diode (130), and the potential of the conductive plate (140) becomes equal to that of the video signal line. On the other hand, when the potential of the video signal is higher than that of the conductive plate (140), no current flows, so that the potential of the diode (130) is held as it is. As a result, the potential of the conductive plate (140) is clamped to the lowest potential among potentials of video signals. Consequently, a leak current which flows from the pixel electrode Ep of the pixel formation portion (110) to the video signal line when the TFT (120) is in the off state is suppressed.

Abstract: To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

Abstract: A method for manufacturing a transflective liquid crystal display panel includes providing an array substrate having a plurality of pixel regions, each of the pixel regions includes a device region, a transmission region and a reflection region defined therein; forming a first metal layer on the array substrate; patterning the first metal layer to simultaneously form a gate electrode in the device region and a plurality of metal bumps in the reflection region; forming a first insulating layer having a rough surface and covering the gate electrode and the metal bumps on the array substrate; forming a patterned semiconductor layer on the gate electrode; forming a reflective layer covering the first insulating layer and having a rough surface in the reflection region; and sequentially forming a patterned second insulating layer and a transparent pixel electrode on the array substrate.

Abstract: A flat panel display device including a substrate including first and second regions; an active layer on the first region of the substrate including a semiconductor material; a lower electrode on the second region of the substrate including the semiconductor material; a first insulating layer on the substrate including the active layer and the lower electrode thereon; a gate electrode on the first insulating layer overlying the active layer and including a first conductive layer pattern and a second conductive layer pattern; an upper electrode on the first insulating layer overlying the lower electrode and including the first conductive layer pattern and the second conductive layer pattern; a second insulating layer on the gate electrode and the upper electrode exposing portions of the active layer and portions of the upper electrode; and a source electrode and a drain electrode connected to the exposed portions of the active layer.

Abstract: The present invention provides a motherboard having panel substrates efficiently arranged thereon and a reduced wasted substrate region, a method for producing the motherboard, and a device substrate comprising the panel substrates formed on the motherboard. The motherboard of the present invention comprises a plurality of panel substrates, wherein the motherboard has a silicon thin film formed on a principal surface thereof, each of the panel substrates has a transistor forming region and a marginal region, the transistor forming region is formed by polycrystallizing the silicon thin film, the marginal region is provided on an outer edge of each of the panel substrates, and at least one of the panel substrates has the marginal region including a region with a silicon thin film which has a crystal profile different from a crystal profile of a silicon thin film in the transistor forming region.

Abstract: A display device comprises: a wiring layer (2) connected to a power source and formed between a substrate (1) and semiconductor elements (21, 22) and between the substrate (1) and an organic EL element (24) such that a region in which the organic EL element (24) is disposed is within the wiring layer (2) as viewed in the thickness direction of the substrate; an interlayer insulating film (3) disposed between the wiring layer and the semiconductor elements (21, 22) and between the wiring layer and the organic EL element, the interlayer insulating film comprising a contact hole (4a) formed therein; and a contact hole wiring (4) that is formed in the contact hole and electrically connects the wiring layer to at least one of source electrodes (8a, 8d), drain electrodes (8b, 8c), and the anode electrode (12) of the organic EL element.

Abstract: An object is to provide a display device whose frame can be narrowed and whose display characteristics are excellent. The display device includes a driver circuit and a pixel portion. The driver circuit and the pixel portion are formed using a dual-gate thin film transistor and a single-gate thin film transistor, respectively. In the dual-gate thin film transistor in the display device, a semiconductor layer is formed using a microcrystalline semiconductor region and a pair of amorphous semiconductor regions, and a gate insulating layer and an insulating layer are in contact with the microcrystalline semiconductor region of the semiconductor layer.

Abstract: An active matrix substrate of a display device of the present invention includes a glass substrate (30), a plurality of connection terminals (41) formed on the surface of the glass substrate and arranged in parallel with one another at an equal interval, and an interlayer insulating film (38) covering the plurality of connection terminals. The edge of the interlayer insulating film is so formed that tips of the plurality of connection terminals are exposed. A plurality of openings (58) are formed along the edge of the interlayer insulating film between two adjacent connection terminals. Each opening extends from a region between two adjacent connection terminals towards and over one of the two adjacent connection terminals.

Abstract: A thin film transistor (TFT) and an organic light emitting display apparatus are provided. The TFT includes: a substrate; a gate electrode on the substrate; an active layer insulated from the gate electrode; source/drain electrodes electrically connected to the active layer; a first insulating film on the source/drain electrodes; a light blocking layer on the first insulating film; and a second insulating film on the light blocking layer.

Abstract: An array substrate for a liquid crystal display device includes first and second lines on a substrate and spaced apart from each other, the first and second lines formed of a first metallic material; a gate electrode connected to the first line; a gate insulating layer on the first and second lines and the gate electrode and including a groove, the groove exposing the substrate and positioned between the first and second lines; a semiconductor layer on the gate insulating layer and corresponding to the gate electrode; a data line crossing the first and second lines and on the gate insulating layer; a source electrode on the semiconductor layer and connected to the data line; a drain electrode on the semiconductor layer and spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode and including an opening, the opening exposing a portion of the gate insulating layer and an end of the drain electrode; and a pixel electrode positioned on the gate in

Abstract: A thin film transistor includes: a substrate; a thin film transistor formed on the substrate; a first color filter and a second color filter formed on the thin film transistor and each having a through hole; a capping layer formed on the first color filter and the second color filter; and a pixel electrode formed on the capping layer and connected to the thin film transistor through the through hole, wherein the capping layer formed on the first color filter has a first opening exposing the through hole of the first color filter, the size of the first opening is larger than the size of the through hole, the capping layer formed on the second color filter has a second opening disposed inside the through hole of the second color filter, and the size of the second opening is smaller than the size of the through hole. Accordingly, the capping layer completely covers the green color filter which prevents damage to the green color filter in a dry etching process, and also prevents changes of a color coordinate.

Abstract: The present invention relates to a thin film transistor substrate and method for fabricating the same which can secure an alignment margin and reduce the number of mask steps. A thin transistor substrate according to the present invention includes a gate line and a data line crossing each other to define a pixel, a gate metal pattern under the data line, a thin film transistor having a gate electrode, a source electrode and a drain electrode in the pixel, and a pixel electrode connected to the drain electrode of the thin film transistor by a connection electrode, wherein the data line has a plurality of first slits to disconnect the gate metal pattern from the gate line.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: A pixel array including a plurality of pixel structures is provided. At least one of the pixel structures has a scan line, a data line, an active device, a pixel electrode, a readout line, an electro-magnetic interference (EMI) shielding layer and a sensing device. The scan line and the data line are disposed on a substrate. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The readout line is disposed above or below a data line. The EMI shielding layer covers the data line, and is between the readout line and the data line. The sensing device is electrically connected to the scan line and the readout line.

Abstract: The present invention relates to a thin-film transistor in a liquid crystal display device and a method of fabricating the same, and the thin-film transistor may be configured by including a first gate electrode formed on an insulating substrate; a first gate insulation film formed on the insulating substrate including the first gate electrode; an active layer formed on the first gate insulation film; source/drain electrodes formed on the active layer and arranged at both sides of the first gate electrode; a second gate insulation film formed on the active layer and the first gate insulation film including the source/drain electrodes and provided with a contact hole for exposing part of the drain electrode; a second gate electrode overlapped with the first gate electrode on the second gate insulation film; and a pixel electrode electrically connected to the drain electrode through the contact hole.

Abstract: An array substrate for a display device includes: a substrate; first and second gate electrodes of impurity-doped polycrystalline silicon on the substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers of intrinsic polycrystalline silicon on the gate insulating layer, the first and second active layers corresponding to the first and second active layers, respectively; an interlayer insulating layer on the first and second active layers and including first to fourth active contact holes, the first and second active contact holes exposing side portions of the first active layer, the third and fourth active contact holes exposing side portions of the second active layer; first and second ohmic contact layers of impurity-doped amorphous silicon on the interlayer insulating layer, the first ohmic contact layer contacting the first active layer through the first and second active contact holes, the second ohmic contact layer contacting the second active layer throug

Abstract: A method of manufacturing an array substrate comprising: forming a data line and a gate line which are crossed with each other and a gate electrode on a base substrate, and the data line is discontinuously disposed so as to be separated from the gate line or the gate line is discontinuously disposed so as to be separated from the data line; forming an active layer and a gate insulating layer including bridge via holes and a source electrode via hole on the base substrate, and the bridge via holes are located at positions respectively corresponding to adjacent discontinuous sections of the data line or adjacent discontinuous sections of the gate line, and the source electrode via hole is located at a position corresponding to the data line; and forming a pixel electrode, a source electrode, a drain electrode and a bridge line on the base substrate, and the pixel electrode and the drain electrode are formed integrally, and the source electrode is connected to the data line through the source electrode via hole,

Abstract: Provided is a semiconductor device including a semiconductor element including at least a semiconductor as a component characterized by including: a mechanism for irradiating the semiconductor with light having a wavelength longer than an absorption edge wavelength of the semiconductor; and a dimming mechanism, provided in a part of an optical path through which the light passes, for adjusting at least one factor selected from an intensity, irradiation time and the wavelength of the light, wherein a threshold voltage of the semiconductor element is varied by the light adjusted by the dimming mechanism.

Abstract: An object of the invention is to improve the reliability of a light-emitting device. Another object of the invention is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. A light-emitting device has, over one flexible substrate, a driving circuit portion including a thin film transistor for a driving circuit and a pixel portion including a thin film transistor for a pixel. The thin film transistor for a driving circuit and the thin film transistor for a pixel are inverted staggered thin film transistors including an oxide semiconductor layer which is in contact with a part of an oxide insulating layer.

Abstract: A method for fabricating a flexible display device including the steps of preparing a glass substrate, forming a flexible substrate on the glass substrate, the flexible substrate being formed by forming a semiconductor layer on the glass substrate, forming a first flexible layer on the semiconductor layer, forming an adhesive layer on the first flexible layer, and forming a second flexible layer on the adhesive layer, forming a thin film array on the flexible substrate, forming a display device on the thin film array, and separating the glass substrate from the semiconductor layer of the flexible substrate.

Abstract: A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and light transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.

Abstract: A display device includes a lower panel including a lower substrate and a pixel transistor formed on the lower substrate; and an upper panel facing the lower panel, and including an upper substrate, a sensing transistor formed on the upper substrate, and a readout transistor connected to the sensing transistor and transmitting a signal. The readout transistor includes a first lower gate electrode formed on the upper substrate, a first semiconductor layer formed on the first lower gate electrode and overlaps the first gate electrode, and a first source electrode and a first drain electrode disposed on the first semiconductor layer.

Abstract: A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

Abstract: A method of forming a polysilicon film having smooth surface using a lateral growth and a step-and-repeat laser process. Amorphous silicon formed in a first irradiation region of a substrate is crystallized to form a first polysilicon region by a first laser shot. Then, the substrate is moved a predetermined distance, and irradiated by a second laser shot. The polysilicon region is then recrystallized and locally planarized by subsequent laser shots. After multiple repetitions of the irradiation procedure, the amorphous silicon film formed on a substrate is completely transformed into a polysilicon film. The polysilicon film includes lateral growth crystal grains and nano-trenches formed in parallel on the surface of the polysilicon film. A longitudinal direction of the nano-trenches is substantially perpendicular to a lateral growth direction of the crystal grains.

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3)·y(In2O3)·z(ZnO)??Formula 1 wherein, about 0.75?x/z? about 3.15, and about 0.55?y/z? about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract: A semiconductor process is provided. The semiconductor process includes providing a substrate. Then, a surface treatment is performed to the substrate to form a buffer layer on the substrate. Next, a first pre-amorphous implantation is performed to the substrate.

Abstract: A displaying region and a sensing region are defined in each pixel region of the OLED touch panel of the present invention. The readout thin film transistor of the sensing region is formed by the same processes with the drive thin film transistor of the displaying region. The top and bottom electrodes of the optical sensor are formed by the same processes with the top and bottom electrodes of the OLED. Accordingly, the present invention can just add a step of forming the patterned sensing dielectric layer to the processes of forming an OLED panel to integrate the optical sensor into the pixel region of the OLED panel. Thus, an OLED touch panel is formed.

Abstract: A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.

Abstract: A liquid crystal display device with improved productivity and a manufacturing method of the same. A liquid crystal display device according to the invention comprises in a region in which a scan line and a data line intersect with each other a first substrate comprising a first thin film transistor using either an amorphous semiconductor or an organic semiconductor for a channel portion, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, and a third substrate comprising a second thin film transistor using a crystalline semiconductor for a channel portion.

Abstract: A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.

Abstract: An Object of the Present Invention is to provide a new light-emitting device with the use of an amorphous oxide. The light-emitting device has a light-emitting layer existing between first and second electrodes and a field effect transistor, of which the active layer is an amorphous.

Abstract: A TFT includes, in at least one embodiment, a capacitor formed: so as to have a region where a first capacitor electrode connected to a source electrode and a second capacitor electrode connected to a gate electrode are arranged to be stacked in a thickness direction and mutually opposed across a first dielectric layer therebetween; and so as to have a region where the first capacitor electrode and a third capacitor electrode connected to the gate electrode are arranged to be stacked in the thickness direction and mutually opposed across a second dielectric layer therebetween with a coupling between the first capacitor electrode and the third capacitor electrode and a coupling between the first capacitor electrode and the second capacitor electrode formed over mutually opposite faces of the first capacitor electrode. This realizes a TFT which can save a footprint of a capacitor connected to a TFT body section.

Abstract: Disclosed is a method of manufacturing a semiconductor device including: forming a photothermal conversion layer in a second area where a semiconductor layer is formed other than a first area where line is formed; and heating the semiconductor layer with the photothermal conversion layer by irradiating light on the first area and the second area.

Abstract: A thin film transistor structure of a pixel is provided. In the present invention, a first metal layer serves as a gate electrode, and the gate electrode includes an extending gate electrode portion. A second metal layer includes a drain electrode partially and respectively overlapping the gate electrode and the gate electrode portion with the amorphous silicon layer interposed therebetween so as to form a first parasitic capacitor and a second parasitic capacitor. The total capacitance of the first parasitic capacitor and the second parasitic capacitor is invariable to withstand deviation caused by vibration of the machine in the photolithographic process, so that undesired effects in the liquid crystal display panel such as mura and flicker can be reduced.

Abstract: A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate.

Abstract: A display device is provided with a pair of a first electrode and a second electrode at least one of which is transparent or translucent and a phosphor layer formed so as to be sandwiched between the first electrode and the second electrode, and the phosphor layer has a polycrystal structure made of a first semiconductor substance in which a second semiconductor substance different from the first semiconductor substance is segregated on a grain boundary of the polycrystal structure, and the phosphor layer has a plurality of pixel regions that are selectively allowed to emit light in a predetermined range thereof and non-pixel regions that divide at least one portion of the pixel regions.

Abstract: The present invention relates to an OLED display and a manufacturing method thereof, including a substrate, a control electrode formed on the substrate, a polysilicon semiconductor formed on the control electrode, a data line including an input electrode at least partially overlapping the polysilicon semiconductor and an output electrode facing the input electrode, an insulating layer covering the data line and the output electrode and having a contact hole, a gate line connected to the control electrode through the contact hole, and a pixel electrode connected to the output electrode.

Abstract: A display device including a first substrate, a first subpixel electrode, a second subpixel electrode corresponding to the first substrate, a second substrate and a common electrode formed on the second substrate is provided. The first subpixel electrode and the second subpixel electrode are formed on the first substrate. The second subpixel electrode is spaced apart from the first subpixel electrode. The common electrode has a first cutout and a second cutout. The first cutout is disposed over the first subpixel electrode and the second cutout is disposed over the second subpixel electrode. At least a portion of the first cutout has a first width and at least a portion of the second cutout has a second width different from the first width. The first width is larger than the second width in one embodiment. This structure enhances the aperture ratio and the brightness of the display device. Failures such as a residual image, stain or fingerprint may be reduced and the picture quality is improved.

Abstract: A method for forming a group-III metal nitride material film attached to a substrate including subjecting the substrate to an ambient pressure of no greater than 0.01 Pa, and heating the substrate to a temperature of between approximately 500° C.-800° C. The method further includes introducing a group III metal vapor to the surface of the substrate at a base pressure of at least 0.01 Pa, until a plurality of group III metal drops form on the surface, and introducing active nitrogen to the surface at a working pressure of between 0.05 Pa and 2.5 Pa, until group III metal nitride molecules form on the group III metal drops.

Abstract: Disclosed herein is a thin film transistor including: a semiconductor layer including an amorphous oxide, and a source electrode and a drain electrode which are provided in contact with the semiconductor layer. The source electrode and the drain electrode are formed by use of iridium or iridium oxide.