With Heterojunction (epo) Patents (Class 257/E33.027)
  • Patent number: 9000414
    Abstract: An object of the present invention is to provide a light emitting diode having a heterogeneous material structure and a method of manufacturing thereof, in which efficiency of extracting light to outside is improved by forming depressions and prominences configured of heterogeneous materials different from each other before or in the middle of forming a semiconductor material on a substrate in order to improve the light extraction efficiency.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 7, 2015
    Assignee: Korea Photonics Technology Institute
    Inventors: Sang-Mook Kim, Jong-Hyeob Baek
  • Patent number: 8928017
    Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-hee Chae, Young-soo Park, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong
  • Patent number: 8927960
    Abstract: A light emitting device including a substrate, a first conductive type semiconductor layer on the substrate, at least one InxGa1?xN layer (0<x<0.2) on the first conductive type semiconductor layer, at least one GaN layer directly on the at least one InxGa1?N layer (0<x<0.2), an active layer on the at least one GaN layer, a second conductive type semiconductor layer on the active layer, and a transparent ITO (Indium-Tin-Oxide) layer on the second conductive type semiconductor layer.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: January 6, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8901575
    Abstract: The present invention relates to an AC light emitting diode. An object of the present invention is to provide an AC light emitting diode wherein various designs for enhancement of the intensity of light, prevention of flickering of light or the like become possible, while coming out of a unified method of always using only one metal wire with respect to one electrode when electrodes of adjacent light emitting cells are connected through metal wires. To this end, the present invention provides an AC light emitting diode comprising a substrate; bonding pads positioned on the substrate; a plurality of light emitting cells arranged in a matrix form on the substrate; and a wiring means electrically connecting the bonding pads and the plurality of light emitting cells, wherein the wiring means includes a plurality of metal wires connecting an electrode of one of the light emitting cells with electrodes of other electrodes adjacent to the one of the light emitting cells.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: December 2, 2014
    Assignee: Seoul Viosys Co., Ltd.
    Inventor: Jae Ho Lee
  • Patent number: 8890196
    Abstract: A solid-state light source has light emitting diodes embedded in a thermally conductive translucent luminescent element. The thermally conductive translucent luminescent element has optically translucent thermal filler and at least one luminescent element in a matrix material. A leadframe is electrically connected to the light emitting diodes. The leadframe distributes heat from the light emitting diodes to the thermally conductive translucent luminescent element. The thermally conductive translucent luminescent element distributes heat from light emitting diodes and the thermally conductive translucent luminescent element.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 18, 2014
    Assignee: Goldeneye, Inc.
    Inventors: Scott M. Zimmerman, William R. Livesay, Richard L. Ross, Eduardo DeAnda
  • Patent number: 8829544
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: September 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8785904
    Abstract: A light emitting device with reduced forward voltage Vf by utilizing the excellent lateral conduction of two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) structure and, more specifically, by improving the vertical conduction of 2DEG and 2DHG structure by means of vertical conductive passages formed in 2DEG and 2DHG structure. The conductive passages are formed via discontinuities in 2DEG and 2DHG structure. The discontinuities can be in the form of openings by etching 2DEG or 2DHG structure, or in the form of voids by growing 2DEG or 2DHG structure on a rough surface via epitaxy facet control. The discontinuities can be formed by vertical displacement of 2DEG structure. A method is provided for manufacturing a light emitting device with reduced forward voltage same.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: July 22, 2014
    Assignee: InvenLux Corporation
    Inventors: Jianping Zhang, Hongmei Wang, Chunhui Yan
  • Patent number: 8772831
    Abstract: A circuit structure includes a substrate and a patterned dielectric layer over the substrate. The patterned dielectric layer includes a plurality of vias; and a number of group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layers include a first layer in the vias, a second layer over the first layer and the dielectric layer, and a bulk layer over the second layer.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: July 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Ming Chen, Po-Chun Liu, Hung-Ta Lin, Chin-Cheng Chang, Chung-Yi Yu, Chia-Shiung Tsai, Ho-Yung David Hwang
  • Patent number: 8754431
    Abstract: According to one embodiment, a semiconductor light emitting device includes first and second electrode layers, a and second semiconductor layers, a light emitting layer and a first intermediate layer. The first electrode layer has a metal portion having through-holes. The second electrode layer is stacked with the first electrode layer along a stacked direction, and light-reflective. The first semiconductor layer is provided between the first and second electrode layers, and has a first conductivity type. The second semiconductor layer is provided between the first semiconductor layer and the second electrode layer, and has a second conductivity type. The light emitting layer is provided between the first and second semiconductor layers. The first intermediate layer is provided between the second semiconductor layer and the second electrode layer, transmissive to light emitted from the light emitting layer, and includes first contact portions and a first non-contact portion.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Fujimoto, Tsutomu Nakanishi, Ryota Kitagawa, Kenji Nakamura, Shinji Nunotani, Takanobu Kamakura
  • Publication number: 20140097444
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor layer is disposed on the buffer layer. The first type nitride semiconductor layer is doped with a first type dopant, at least one of the buffer layer and the first type nitride semiconductor layer comprises a codopant distributed therein, and an atomic radius of the codopant is larger than an atomic radius of the first type dopant. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer, the second type nitride semiconductor layer comprising a second type dopant.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Patent number: 8680571
    Abstract: A light emitting diode (LED) capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 25, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8669129
    Abstract: One object of the present invention is to provide a method for producing a group III nitride semiconductor light-emitting device which has excellent productivity and produce a group III nitride semiconductor light-emitting device and a lamp, a method for producing a group III nitride semiconductor light-emitting device, in which a buffer layer (12) made of a group III nitride is laminated on a substrate (11), an n-type semiconductor layer (14) comprising a base layer (14a), a light-emitting layer (15), and a p-type semiconductor layer (16) are laminated on the buffer layer (12) in this order, comprising: a pretreatment step in which the substrate (11) is treated with plasma; a buffer layer formation step in which the buffer layer (12) having a composition represented by AlxGa1-xN (0?x<1) is formed on the pretreated substrate (11) by activating with plasma and reacting at least a metal gallium raw material and a gas containing a group V element; and a base layer formation step in which the base layer (14a)
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: March 11, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Yasunori Yokoyama, Takehiko Okabe, Kenzo Hanawa
  • Patent number: 8647907
    Abstract: A method includes the step of preparing a GaN-based substrate 10, the step of forming on the substrate a nitride-based semiconductor multilayer structure including a p-type AldGaeN layer (p-type semiconductor region) 26, the p-type AldGaeN layer 26 being made of an AlxInyGazN semiconductor (x+y+z=1, x?0, y?0, z?0), and a principal surface of the p-type AldGaeN layer 26 being an m-plane, the step of forming a metal layer 28 which contains at least one of Mg and Zn on the principal surface of the p-type AldGaeN layer 26 and performing a heat treatment, the step of removing the metal layer 28, and the step of forming a p-type electrode on the principal surface of the p-type AldGaeN layer 26, wherein the heat treatment causes a N concentration to be higher than a Ga concentration in the p-type AldGaeN layer 26.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: February 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Naomi Anzue, Toshiya Yokogawa
  • Patent number: 8643037
    Abstract: There is provided a nitride semiconductor light emitting device including: n-type and p-type nitride semiconductor layers; an active layer disposed between the n-type and p-type nitride semiconductor layers; and an electron injection layer disposed between the n-type nitride semiconductor layer and the active layer. The electron injection layer has a multilayer structure, in which three or more layers having different energy band gaps are stacked, and the multilayer structure is repetitively stacked at least twice. At least one layer among the three or more layers has a reduced energy band gap in individual multilayer structures in a direction toward the active layer, and the layer having the lowest energy band gap has an increased thickness in individual multilayer structures in a direction toward the active layer.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: February 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun Wook Shim, Suk Ho Yoon, Tan Sakong, Je Won Kim, Ki Sung Kim
  • Publication number: 20130270589
    Abstract: An optoelectronic device is disclosed. The optoelectronic device comprises a semiconductor structure; a plurality of contacts on the front side of the semiconductor structure; and a plurality of non-continuous metal contacts on a back side of the semiconductor structure. In an embodiment, a plurality of non-continuous back contacts on an optoelectronic device improve the reflectivity and reduce the losses associated with the back surface of the device.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 17, 2013
    Applicant: ALTA DEVICES, INC.
    Inventors: Brendan M. KAYES, Sylvia SPRYUTTE, I-Kang DING, Rose TWIST, Gregg HIGASHI
  • Patent number: 8546787
    Abstract: Group III nitride based light emitting devices and methods of fabricating Group III nitride based light emitting devices are provided. The emitting devices include an n-type Group III nitride layer, a Group III nitride based active region on the n-type Group III nitride layer and comprising at least one quantum well structure, a Group III nitride layer including indium on the active region, a p-type Group III nitride layer including aluminum on the Group III nitride layer including indium, a first contact on the n-type Group III nitride layer and a second contact on the p-type Group III nitride layer. The Group III nitride layer including indium may also include aluminum.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 1, 2013
    Assignee: Cree, Inc.
    Inventors: Michael John Bergmann, David Todd Emerson
  • Patent number: 8530257
    Abstract: Methods for improving the temperature performance of AlInGaP based light emitters. Nitrogen is added to the quantum wells in small quantities. Nitrogen is added in a range of about 0.5 percent to 2 percent. The addition of nitrogen increases the conduction band offset and increases the separation of the indirect conduction band. To keep the emission wavelength in a particular range, the concentration of In in the quantum wells may be decreased or the concentration of Al in the quantum wells may be increased. The net result is an increase in the conduction band offset and an increase in the separation of the indirect conduction band.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: September 10, 2013
    Assignee: Finisar Corporation
    Inventor: Ralph Herbert Johnson
  • Patent number: 8530913
    Abstract: According to one embodiment, a light emitting device includes a light emitting layer, a first electrode, a first and second layers, and a cladding layer. The first layer has a first impurity concentration of a first conductivity type, and allows a carrier to be diffused in the light emitting layer. The second layer has a second impurity concentration of the first conductivity type higher than the first impurity concentration, and includes a first and second surfaces. The first surface is with the first layer. The second surface has a formation region and a non-formation region of the first electrode. The non-formation region includes convex structures with an average pitch not more than a wavelength of the emission light. The cladding layer is provided between the first layer and the light emitting layer and has an impurity concentration of the first conductivity type.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: September 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukie Nishikawa, Takashi Kataoka, Hironori Yamasaki, Hisashi Mori, Kazunari Yabe
  • Patent number: 8507925
    Abstract: An optoelectronic device, comprising: a substrate; a plurality of the first semiconductor rods formed on the substrate, contacted with the substrate, and exposed partial of the first surface of the substrate; a first protection layer formed on the sidewall of the plurality of the first semiconductor rods and the exposed partial of the first surface of the substrate; a first buffer layer formed on the plurality of the first semiconductor rods wherein the first buffer layer having a first surface and a second surface opposite to the first surface, and the plurality of the first semiconductor rods directly contacted with the first surface; and at least one first hollow component formed among the first semiconductor rods, the first surface of the substrate, and the first surface of the first buffer layer and the ratio of the height and the width of the first hollow component is 1/5-3.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: August 13, 2013
    Assignee: Epistar Corporation
    Inventors: De-Shan Kuo, Tsun-Kai Ko
  • Patent number: 8502245
    Abstract: Provided is a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The active layer comprises a first active layer, a second active layer, an electron barrier layer on the first conductive type semiconductor layer. The first active layer and the second active layer comprise a quantum well layer and a quantum barrier layer. The electron barrier layer is formed between the first active layer and the second active layer. The second conductive type semiconductor layer is formed on the active layer.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: August 6, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 8502246
    Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: August 6, 2013
    Assignees: The Regents of the University of California, The Japan Science and Technology Agency
    Inventors: Arpan Chakraborty, Benjamin A. Haskell, Stacia Keller, James S. Speck, Steven P. DenBaars, Shuji Nakamura, Umesh K. Mishra
  • Patent number: 8482027
    Abstract: An epitaxial wafer for a light emitting diode, including a GaAs substrate, a light emitting unit provided on the GaAs substrate, and a strain adjustment layer provided on the light emitting unit, wherein the light emitting unit has a strained light emitting layer having a composition formula of (AlXGa1-X)YIn1-YP (wherein X and Y are numerical values that satisfy 0?X?0.1 and 0.39?Y?0.45 respectively), and the strain adjustment layer is transparent to the emission wavelength and has a lattice constant that is smaller than the lattice constant of the GaAs substrate. The invention provides an epitaxial wafer that enables mass production of a high-output and/or high-efficiency LED having an emission wavelength of not less than 655 nm.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: July 9, 2013
    Assignee: Showa Denko K.K.
    Inventors: Noriyoshi Seo, Atsushi Matsumura, Ryouichi Takeuchi
  • Publication number: 20130168636
    Abstract: A semiconductor light emitting diode is provided. The semiconductor light emitting diode comprises a metal electrode; an n-type cladding over the metal electrode, the n-type cladding comprising a pillar support part formed of an n-type semiconductor material, and a pillar part having a plurality of pillars formed of an n-type semiconductor material over the pillar support part; an active part conformally formed over the pillar part so as to enclose the pillar part and over the pillar support part between the pillar parts, the active part having a quantum well layer and a barrier layer stacked alternately; a p-type cladding conformally formed of a p-type semiconductor material over the active part; and a transparent electrode formed over the p-type cladding.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: CHIP TECHNOLOGY INC.
    Inventors: Byoung gu CHO, Se-Hun Kwon, Jae-Sik Min
  • Patent number: 8445302
    Abstract: One object of the present invention is to provide a method for producing a group III nitride semiconductor light-emitting device which has excellent productivity and produce a group III nitride semiconductor light-emitting device and a lamp, a method for producing a group III nitride semiconductor light-emitting device, in which a buffer layer (12) made of a group III nitride is laminated on a substrate (11), an n-type semiconductor layer (14) comprising a base layer (14a), a light-emitting layer (15), and a p-type semiconductor layer (16) are laminated on the buffer layer (12) in this order, comprising: a pretreatment step in which the substrate (11) is treated with plasma; a buffer layer formation step in which the buffer layer (12) having a composition represented by AlxGa1-xN (0?x<1) is formed on the pretreated substrate (11) by activating with plasma and reacting at least a metal gallium raw material and a gas containing a group V element; and a base layer formation step in which the base layer (14a)
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: May 21, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Yasunori Yokoyama, Takehiko Okabe, Kenzo Hanawa
  • Publication number: 20130099198
    Abstract: According to one embodiment, a semiconductor light emitting element, including a first semiconductor layer with a first conductive type, a second semiconductor layer with a second conductive type, a semiconductor light emitting layer provided between the first semiconductor layer and the second semiconductor layer, a first electrode having a mesh-shaped structure with a plurality of mesh shapes provided on the first semiconductor layer opposed to the semiconductor light emitting layer, a plurality of second electrodes provided on the second semiconductor layer opposed to the semiconductor light emitting layer, each of the second electrode having a dot shape and being superimposed with the center of each of the mesh shapes in plain view with parallel to a surface of the second semiconductor layer.
    Type: Application
    Filed: March 13, 2012
    Publication date: April 25, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Akira TANAKA
  • Patent number: 8420425
    Abstract: The present invention provides a method for producing a Group III nitride semiconductor light-emitting device whose driving voltage is reduced. In the production method, a p cladding layer has a superlattice structure in which a p-AlGaN layer having a thickness of 0.5 nm to 10 nm and an InGaN layer are alternately deposited. A growth temperature of the p-AlGaN layer is 800° C. to 950° C. The InGaN layer having a thickness of one to two monolayers is formed on the p-AlGaN layer, by stopping the supply of TMA, introducing TMI, and increasing the supply amount of Ga source gas while maintaining the p-AlGaN layer at the growth temperature. Thus, the thickness of the p cladding layer can be reduced while maintaining good crystal quality, thereby reducing the driving voltage.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: April 16, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Koji Okuno, Atsushi Miyazaki
  • Publication number: 20130082274
    Abstract: A method for forming a light emitting device comprises forming a buffer layer having a plurality of layers comprising a substrate, an aluminum gallium nitride layer adjacent to the substrate, and a gallium nitride layer adjacent to the aluminum gallium nitride layer. During the formation of each of the plurality of layers, one or more process parameters are selected such that an individual layer of the plurality of layers is strained.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 4, 2013
    Inventors: Long Yang, Will Fenwick
  • Publication number: 20130075771
    Abstract: According to one embodiment, a semiconductor light emitting device includes first and second electrode layers, a and second semiconductor layers, a light emitting layer and a first intermediate layer. The first electrode layer has a metal portion having through-holes. The second electrode layer is stacked with the first electrode layer along a stacked direction, and light-reflective. The first semiconductor layer is provided between the first and second electrode layers, and has a first conductivity type. The second semiconductor layer is provided between the first semiconductor layer and the second electrode layer, and has a second conductivity type. The light emitting layer is provided between the first and second semiconductor layers. The first intermediate layer is provided between the second semiconductor layer and the second electrode layer, transmissive to light emitted from the light emitting layer, and includes first contact portions and a first non-contact portion.
    Type: Application
    Filed: March 5, 2012
    Publication date: March 28, 2013
    Inventors: Akira FUJIMOTO, Tsutomu NAKANISHI, Ryota KITAGAWA, Kenji NAKAMURA, Shinji NUNOTANI, Takanobu KAMAKURA
  • Publication number: 20130069033
    Abstract: According to one embodiment, a semiconductor device includes a first layer of n-type including a nitride semiconductor, a second layer of p-type including a nitride semiconductor, a light emitting unit, and a first stacked body. The light emitting unit is provided between the first and second layers. The first stacked body is provided between the first layer and the light emitting unit. The first stacked body includes a plurality of third layers including AlGaInN, and a plurality of fourth layers alternately stacked with the third layers and including GaInN. The first stacked body has a first surface facing the light emitting unit. The first stacked body has a depression provided in the first surface. A part of the light emitting unit is embedded in a part of the depression. A part of the second layer is disposed on the part of the light emitting unit.
    Type: Application
    Filed: February 28, 2012
    Publication date: March 21, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro KUSHIBE, Yasuo OHBA, Hiroshi KATSUNO, Kei KANEKO, Shinji YAMADA
  • Patent number: 8399896
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, barrier layers, and a well layer. The n-type and p-type semiconductor layers and the barrier layers include nitride semiconductor. The barrier layers are provided between the n-type and p-type semiconductor layers. The well layer is provided between the barrier layers, has a smaller band gap energy than the barrier layers, and includes InGaN. At least one of the barrier layers includes first, second, and third layers. The second layer is provided closer to the p-type semiconductor layer than the first layer. The third layer is provided closer to the p-type semiconductor layer than the second layer. The second layer includes AlxGa1?xN (0<x?0.05). A band gap energy of the second layer is larger than the first and third layers. A total thickness of the first and second layers is not larger than the third layer.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: March 19, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Tomonari Shioda, Yoshiyuki Harada, Shinya Nunoue
  • Patent number: 8384098
    Abstract: The present invention relates to an AC light emitting diode. An object of the present invention is to provide an AC light emitting diode wherein various designs for enhancement of the intensity of light, prevention of flickering of light or the like become possible, while coming out of a unified method of always using only one metal wire with respect to one electrode when electrodes of adjacent light emitting cells are connected through metal wires. To this end, the present invention provides an AC light emitting diode comprising a substrate; bonding pads positioned on the substrate; a plurality of light emitting cells arranged in a matrix form on the substrate; and a wiring means electrically connecting the bonding pads and the plurality of light emitting cells, wherein the wiring means includes a plurality of metal wires connecting an electrode of one of the light emitting cells with electrodes of other electrodes adjacent to the one of the light emitting cells.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: February 26, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventor: Jae Ho Lee
  • Publication number: 20130043481
    Abstract: High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can a forward junction voltage less than the output voltage.
    Type: Application
    Filed: August 15, 2011
    Publication date: February 21, 2013
    Applicant: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Publication number: 20130040411
    Abstract: A method includes the step of preparing a GaN-based substrate 10, the step of forming on the substrate a nitride-based semiconductor multilayer structure including a p-type AldGaeN layer (p-type semiconductor region) 26, the p-type AldGaeN layer 26 being made of an AlxInyGazN semiconductor (x+y+z=1, x?0, y?0, z?0), and a principal surface of the p-type AldGaeN layer 26 being an m-plane, the step of forming a metal layer 28 which contains at least one of Mg and Zn on the principal surface of the p-type AldGaeN layer 26 and performing a heat treatment, the step of removing the metal layer 28, and the step of forming a p-type electrode on the principal surface of the p-type AldGaeN layer 26, wherein the heat treatment causes a N concentration to be higher than a Ga concentration in the p-type AldGaeN layer 26.
    Type: Application
    Filed: October 18, 2012
    Publication date: February 14, 2013
    Applicant: PANASONIC CORPORATION
    Inventor: Panasonic Corporation
  • Publication number: 20130032820
    Abstract: The invention concerns an optoelectronic component (1) for mixing electromagnetic radiation having different wavelengths, more particularly in the far field. At least one first semiconductor chip (3) for emitting electromagnetic radiation in a first spectral range is provided on a carrier (2). Furthermore, at least one second semiconductor chip (4, 4a, 4b) for emitting electromagnetic radiation in a second spectral range is provided on the carrier (2). The first and the second spectral ranges differ from one another. The at least one first semiconductor chip (3) and the at least one second semiconductor chip (4, 4a, 4b) are arranged in a single package. The at least one first semiconductor chip (3) is optically isolated from the at least one second semiconductor chip (4, 4a, 4b) by a barrier (5). The at least one first semiconductor chip (3) and the at least one second semiconductor chip (4, 4a, 4b) are in each case arranged centosymmetrically about a common center o(Z) of symmetry.
    Type: Application
    Filed: March 18, 2011
    Publication date: February 7, 2013
    Inventor: Ralph Wirth
  • Patent number: 8368092
    Abstract: A thin-film LED comprising an active layer (7) made of a nitride compound semiconductor, which emits electromagnetic radiation (19) in a main radiation direction (15). A current expansion layer (9) is disposed downstream of the active layer (7) in the main radiation direction (15) and is made of a first nitride compound semiconductor material. The radiation emitted in the main radiation direction (15) is coupled out through a main area (14), and a first contact layer (11, 12, 13) is arranged on the main area (14). The transverse conductivity of the current expansion layer (9) is increased by formation of a two-dimensional electron gas or hole gas. The two-dimensional electron gas or hole gas is advantageously formed by embedding at least one layer (10) made of a second nitride compound semiconductor material in the current expansion layer (9).
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: February 5, 2013
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Johannes Baur, Berthold Hahn, Volker Härle, Raimund Oberschmid, Andreas Weimar
  • Patent number: 8344414
    Abstract: A semiconductor light emitting device with which a driving voltage is able to be kept low is provided. The semiconductor light emitting device includes: an n-type cladding layer; an active layer; a p-type cladding layer containing AlGaInP; an intermediate layer; and a contact layer containing GaP in this order, wherein the intermediate layer contains Ga1-aInaP (0.357?a?0.408), and has a thickness of from 10 nm to 20 nm both inclusive.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: January 1, 2013
    Assignee: Sony Corporation
    Inventors: Tsuyoshi Nagatake, Jugo Mitomo
  • Publication number: 20120313109
    Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 13, 2012
    Applicant: LG INNOTEK CO., LTD.
    Inventor: Suk Hun LEE
  • Publication number: 20120309124
    Abstract: The present invention provides a method for producing a Group III nitride semiconductor light-emitting device whose driving voltage is reduced. In the production method, a p cladding layer has a superlattice structure in which a p-AlGaN layer having a thickness of 0.5 nm to 10 nm and an InGaN layer are alternately deposited. A growth temperature of the p-AlGaN layer is 800° C. to 950° C. The InGaN layer having a thickness of one to two monolayers is formed on the p-AlGaN layer, by stopping the supply of TMA, introducing TMI, and increasing the supply amount of Ga source gas while maintaining the p-AlGaN layer at the growth temperature. Thus, the thickness of the p cladding layer can be reduced while maintaining good crystal quality, thereby reducing the driving voltage.
    Type: Application
    Filed: May 25, 2012
    Publication date: December 6, 2012
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Koji OKUNO, Atsushi Miyazaki
  • Patent number: 8309980
    Abstract: Provided is an infrared light emitting device in which dark current and diffusion current caused by thermally excited holes are suppressed. Thermally excited carriers (holes) generated in a first n-type compound semiconductor layer (102) tend to diffuse in the direction of a ? layer (105). But, the dark current by holes is reduced by providing an n-type wide band gap layer (103) with a larger band gap than the first layer (102) and the ? layer (105) that suppresses the hole diffusion between the first layer (102) and the ? layer (105). The wide band gap layer (103) has a band gap shifted relatively to valence band direction by n-type doping and thereby more effectively functions as a diffusion barrier for the thermally excited holes. Namely, the band gap and n-type doping of the wide band gap layer (103) are adjusted to suppress diffusion of the thermally excited carriers.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: November 13, 2012
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Koichiro Ueno, Naohiro Kuze
  • Publication number: 20120282718
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Application
    Filed: July 20, 2012
    Publication date: November 8, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Anthony J. Lochtefeld
  • Publication number: 20120273794
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, an active layer, and a second semiconductor layer. The first layer has a first upper surface and a first side surface. The active layer has a first portion covering the first upper surface and having a second upper surface, and a second portion covering the first side surface and having a second side surface. The second layer has a third portion covering the second upper surface, and a fourth portion covering the second side surface. The first and second layers include a nitride semiconductor. The first portion along a stacking direction has a thickness thicker than the second portion along a direction from the first side surface toward the second side surface. The third portion along the stacking direction has a thickness thicker than the fourth portion along the direction.
    Type: Application
    Filed: February 28, 2012
    Publication date: November 1, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinji SAITO, Shinya Nunoue, Rei Hashimoto
  • Publication number: 20120267655
    Abstract: A light emitting device with reduced forward voltage Vf by utilizing the excellent lateral conduction of two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) structure and, more specifically, by improving the vertical conduction of 2DEG and 2DHG structure by means of vertical conductive passages formed in 2DEG and 2DHG structure. The conductive passages are formed via discontinuities in 2DEG and 2DHG structure. The discontinuities can be in the form of openings by etching 2DEG or 2DHG structure, or in the form of voids by growing 2DEG or 2DHG structure on a rough surface via epitaxy facet control. The discontinuities can be formed by vertical displacement of 2DEG structure. A method is provided for manufacturing a light emitting device with reduced forward voltage same.
    Type: Application
    Filed: April 20, 2011
    Publication date: October 25, 2012
    Applicant: INVENLUX LIMITED
    Inventors: JIANPING ZHANG, HONGMEI WANG, CHUNHUI YAN
  • Publication number: 20120261687
    Abstract: There is provided a nitride semiconductor light emitting device including: n-type and p-type nitride semiconductor layers; an active layer disposed between the n-type and p-type nitride semiconductor layers; and an electron injection layer disposed between the n-type nitride semiconductor layer and the active layer. The electron injection layer has a multilayer structure, in which three or more layers having different energy band gaps are stacked, and the multilayer structure is repetitively stacked at least twice. At least one layer among the three or more layers has a reduced energy band gap in individual multilayer structures in a direction toward the active layer, and the layer having the lowest energy band gap has an increased thickness in individual multilayer structures in a direction toward the active layer.
    Type: Application
    Filed: April 6, 2012
    Publication date: October 18, 2012
    Inventors: Hyun Wook SHIM, Suk Ho YOON, Tan SAKONG, Je Won KIM, Ki Sung KIM
  • Publication number: 20120256210
    Abstract: Disclosed are a light emitting device. The light emitting device includes a light emitting structure including a first and second conductive semiconductors, and an active layer; an insulating layer on a lateral surface of the light emitting structure; an electrode on the first conductive semiconductor layer; an electrode layer under the second conductive semiconductor layer; and a protective layer including a first portion between the light emitting structure and the electrode layer and a second portion extending outward beyond a lower surface of the light emitting structure, wherein the first conductive semiconductor layer includes a first top surface including a roughness on a first region, and a second top surface lower than the first region and being closer the lateral surface of the light emitting structure than the first region, wherein the second top surface is disposed on an edge portion of the first conductive semiconductor layer.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Inventors: Ji Hyung Moon, Hwan Hee Jeong, Sang Youl Lee, June O. Song
  • Publication number: 20120205691
    Abstract: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region and a plurality of layer pairs disposed within one of the n-type region and the p-type region. Each layer pair includes an InGaN layer and pit-filling layer in direct contact with the InGaN layer. The pit-filling layer may fill in pits formed in the InGaN layer.
    Type: Application
    Filed: April 17, 2012
    Publication date: August 16, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Sungsoo Yi, Nathan F. Gardner, Qi Laura Ye
  • Patent number: 8227789
    Abstract: Devices and techniques related to UV light-emitting devices that can be implemented in ways that improve the light-emitting efficiency of an UV light-emitting device using a group III nitride semiconductor.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: July 24, 2012
    Assignees: Riken, Dowa Electronics Materials Co., Ltd.
    Inventors: Hideki Hirayama, Tomohiko Shibata
  • Publication number: 20120161113
    Abstract: An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary diode comprises: a light emitting or absorbing region having a diameter between about 20 and 30 microns and a height between 2.5 to 7 microns; a plurality of first terminals spaced apart and coupled to the light emitting region peripherally on a first side, each first terminal of the plurality of first terminals having a height between about 0.5 to 2 microns; and one second terminal coupled centrally to a mesa region of the light emitting region on the first side, the second terminal having a height between 1 to 8 microns.
    Type: Application
    Filed: August 31, 2011
    Publication date: June 28, 2012
    Applicant: NthDegree Technologies Worldwide Inc.
    Inventors: Mark David Lowenthal, William Johnstone Ray, Neil O. Shotton, Richard A. Blanchard, Brad Oraw
  • Publication number: 20120146045
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer, a light transmitting layer and a first semiconductor layer. The light transmitting layer is transmittable with respect to light emitted from the light emitting layer. The first semiconductor layer contacts the light transmitting layer between the light emitting layer and the light transmitting layer. The light transmitting layer has a thermal expansion coefficient larger than a thermal expansion coefficient of the light transmitting layer, has a lattice constant smaller than a lattice constant of the active layer, and has a tensile stress in an in-plane direction.
    Type: Application
    Filed: August 18, 2011
    Publication date: June 14, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu SUGIYAMA, Tomonari SHIODA, Hisashi YOSHIDA, Shinya NUNOUE
  • Publication number: 20120138980
    Abstract: An optoelectronic device, comprising: a substrate; a plurality of the first semiconductor rods formed on the substrate, contacted with the substrate, and exposed partial of the first surface of the substrate; a first protection layer formed on the sidewall of the plurality of the first semiconductor rods and the exposed partial of the first surface of the substrate; a first buffer layer formed on the plurality of the first semiconductor rods wherein the first buffer layer having a first surface and a second surface opposite to the first surface, and the plurality of the first semiconductor rods directly contacted with the first surface; and at least one first hollow component formed among the first semiconductor rods, the first surface of the substrate, and the first surface of the first buffer layer and the ratio of the height and the width of the first hollow component is 1/5-3.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Applicant: Epistar Corporation
    Inventors: De-Shan KUO, Tsun-Kai KO
  • Publication number: 20120119240
    Abstract: A nitride semiconductor light emitting device is provided. A core semiconductor region, a first cladding region, and a second cladding region are mounted on a nonpolar primary surface of a support substrate of GaN which is not the polar plane. The core semiconductor region includes an active layer and a carrier block layer. The first cladding region includes an n-type AlGaN cladding layer and an n-type InAlGaN cladding layer. The n-type InAlGaN cladding layer is provided between the n-type AlGaN cladding layer and the active layer. A misfit dislocation density at an interface is larger than that at an interface. The AlGaN cladding layer is lattice-relaxed with respect to the GaN support substrate and the InAlGaN cladding layer is lattice-relaxed with respect to the AlGaN cladding layer.
    Type: Application
    Filed: November 10, 2011
    Publication date: May 17, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi KYONO, Yohei ENYA, Yusuke YOSHIZUMI, Katsushi AKITA, Masaki UENO, Takamichi SUMITOMO