Ternary Or Quaternary Compound (e.g., Algaas) (epo) Patents (Class 257/E33.026)
  • Patent number: 8928017
    Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-hee Chae, Young-soo Park, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong
  • Patent number: 8890196
    Abstract: A solid-state light source has light emitting diodes embedded in a thermally conductive translucent luminescent element. The thermally conductive translucent luminescent element has optically translucent thermal filler and at least one luminescent element in a matrix material. A leadframe is electrically connected to the light emitting diodes. The leadframe distributes heat from the light emitting diodes to the thermally conductive translucent luminescent element. The thermally conductive translucent luminescent element distributes heat from light emitting diodes and the thermally conductive translucent luminescent element.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 18, 2014
    Assignee: Goldeneye, Inc.
    Inventors: Scott M. Zimmerman, William R. Livesay, Richard L. Ross, Eduardo DeAnda
  • Patent number: 8853735
    Abstract: Provided is an epitaxial substrate for a semiconductor device, which has excellent schottky contact characteristics that are stable over time. The epitaxial substrate for a semiconductor device includes a base substrate, a channel layer formed of a first group III nitride containing at least Ga and having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1), and a barrier layer formed of a second group III nitride containing at least In and Al and having a composition of Inx2Aly2Gaz2N (x2+y2+z2=1), wherein the barrier layer has tensile strains in an in-plane direction, and pits are formed on a surface of the barrier layer at a surface density of 5×107/cm2 or more and 1×109/cm2 or less.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: October 7, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Mikiya Ichimura, Tomohiko Sugiyama, Mitsuhiro Tanaka
  • Patent number: 8829652
    Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: September 9, 2014
    Assignee: National Chiao Tung University
    Inventors: Chao-Hsun Wang, Hao-Chung Kuo
  • Patent number: 8729598
    Abstract: The present invention provides a light-emitting diode that includes two electrodes provided on a light-emitting surface, and exhibits high light extraction efficiency and high-brightness.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: May 20, 2014
    Assignee: Showa Denko K.K.
    Inventors: Wataru Nabekura, Ryouichi Takeuchi
  • Patent number: 8680571
    Abstract: A light emitting diode (LED) capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 25, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8643059
    Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: February 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
  • Patent number: 8557622
    Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: October 15, 2013
    Assignee: STC.UNM
    Inventors: Seung Chang Lee, Steven R. J. Brueck
  • Publication number: 20130228806
    Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.
    Type: Application
    Filed: July 17, 2012
    Publication date: September 5, 2013
    Applicant: National Chiao Tung University
    Inventors: Chao-Hsun WANG, Hao-Chung Kuo
  • Patent number: 8502267
    Abstract: An optoelectronic semiconductor component includes an active layer that emits radiation, the active layer surrounded by cladding layers, wherein the cladding layers and/or the active layer include(s) an indium-containing phosphide compound semiconductor material and the phosphide compound semiconductor material contains at least one of elements Bi or Sb as an additional element of main group V.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: August 6, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Alexander Behres, Matthias Sabathil
  • Patent number: 8482027
    Abstract: An epitaxial wafer for a light emitting diode, including a GaAs substrate, a light emitting unit provided on the GaAs substrate, and a strain adjustment layer provided on the light emitting unit, wherein the light emitting unit has a strained light emitting layer having a composition formula of (AlXGa1-X)YIn1-YP (wherein X and Y are numerical values that satisfy 0?X?0.1 and 0.39?Y?0.45 respectively), and the strain adjustment layer is transparent to the emission wavelength and has a lattice constant that is smaller than the lattice constant of the GaAs substrate. The invention provides an epitaxial wafer that enables mass production of a high-output and/or high-efficiency LED having an emission wavelength of not less than 655 nm.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: July 9, 2013
    Assignee: Showa Denko K.K.
    Inventors: Noriyoshi Seo, Atsushi Matsumura, Ryouichi Takeuchi
  • Patent number: 8404506
    Abstract: In a method for the production of a single photon source with a given operational performance, the given operational performance for the individual photon source may be fixed by a directed setting of the fine structure gap of the excitonic energy level for at least one quantum dot. The at least one quantum dot is produced with a quantum dot size corresponding to the fine structure gap for setting.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: March 26, 2013
    Assignee: Technische Universitaet Berlin
    Inventors: Anatol Lochmann, Robert Seguin, Dieter Bimberg, Sven Rodt, Vladimir Gaysler
  • Patent number: 8384120
    Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: February 26, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jong-Lam Lee, In-kwon Jeong, Myung Cheol Yoo
  • Patent number: 8384100
    Abstract: There is provided an InGaAlN light-emitting device and a manufacturing method thereof. The light emitting device includes a conductive substrate having a main surface and a back surface, a metal bonding layer formed on the main surface of the substrate, a light reflecting layer formed on the bonding layer, a semiconductor multilayer structure including at least a p-type and an n-type InGaAlN layer disposed on the reflecting layer, the p-type InGaAlN layer directly contacting the reflecting layer, and ohmic electrodes disposed on said n-type InGaAlN layer and on the back surface of the conductive substrate, respectively.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: February 26, 2013
    Assignee: Lattice Power (JIANGXI) Corporation
    Inventors: Fengyi Jiang, Li Wang, Chuanbing Xiong, Wenqing Fang, Hechu Liu, Maoxing Zhou
  • Patent number: 8354689
    Abstract: Light emitting devices described herein include dopant front loaded tunnel barrier layers (TBLs). A front loaded TBL includes a first surface closer to the active region of the light emitting device and a second surface farther from the active region. The dopant concentration in the TBL is higher near the first surface of the TBL when compared to the dopant concentration near the second surface of the TBL. The front loaded region near the first surface of the TBL is formed during fabrication of the device by pausing the growth of the light emitting device before the TBL is formed and flowing dopant into the reaction chamber. After the dopant flows in the reaction chamber during the pause, the TBL is grown.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: January 15, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Christopher L. Chua, Zhihong Yang
  • Publication number: 20120322189
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved light extraction performance. In the production method, a p cladding layer of p-AlGaN is formed by the MOCVD method on a light-emitting layer at a pressure of 30 kPa and with an Mg concentration of 1.5×1020/cm3. A plurality of regions with a nitrogen polarity is formed in the crystals with a Group III element polarity, and thus the p cladding layer has a hexagonal columnar concave and convex configuration on the surface thereof. Subsequently, a p contact layer of GaN is formed by the MOCVD method, in a film along the concave and convex configuration on the p cladding layer.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 20, 2012
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Naoyuki NAKADA, Yasuhisa USHIDA
  • Publication number: 20120305979
    Abstract: The present invention provides a light-emitting diode that includes two electrodes provided on a light-emitting surface, and exhibits high light extraction efficiency and high-brightness.
    Type: Application
    Filed: February 2, 2011
    Publication date: December 6, 2012
    Applicant: SHOWA DENKO K.K.
    Inventors: Wataru Nabekura, Ryouichi Takeuchi
  • Patent number: 8304784
    Abstract: An illumination device having a plurality of light emitting diodes is provided. The light emitting diode may include a plurality of semiconductor layers at least one of which has a light emitting surface which may include a rough surface pattern having a pre-determined pattern. The pre-determined pattern may include one or more impurity regions with each region having a recess for guiding current across the light emitting surface and maximizing the emission of light (i.e. light intensity) of the illumination device. Each recess may include a lower internal portion having a bottom contact point located on a bottom surface and an upper internal portion integrally connected to the lower internal portion by a plurality of center contact points. The gaps created between the center and bottom contact points in adjacent recesses may act as spark gaps allowing for the current to flow through the entire light emitting surface.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 6, 2012
    Inventor: Andrew Locke
  • Patent number: 8274161
    Abstract: A linear, serial chip/substrate assembly processing machine for stepwise advancing a pre-assembled chip/die substrate on a support plate through a series of sealable chambers beginning at a loading station and ending up at an unloading station after various melting and vacuuming of chip/substrate components has been stepwise indexed through those various chambers to the final joining thereof.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: September 25, 2012
    Assignee: SemiGear Inc
    Inventors: Jian Zhang, Chunghsin Lee
  • Patent number: 8252678
    Abstract: A serial thermal processing arrangement for treating a pre-assembled chip/wafer assembly of semiconductor material in a rotary processor, through a series of intermittent, rotatively advanced, movements into independent, temperature and pressure controlled, circumferentially disposed chambers.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: August 28, 2012
    Assignee: SemiGear, Inc
    Inventor: Jian Zhang
  • Publication number: 20120193739
    Abstract: A direct radiation converter is disclosed which includes a radiation detection material having an anode side and a cathode side in which the radiation detection material has a doping profile running in the anode-side to cathode-side direction. A radiation detector is further disclosed having such a direct radiation converter and having an anode array and a cathode array, and optionally having evaluation electronics for reading out a detector signal, as well as a medical apparatus having such a radiation detector. Also described is a method for producing a direct radiation converter which includes incorporating into a radiation detection material a doping profile running in the anode-side to cathode-side direction.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 2, 2012
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Peter Hackenschmied, Christian Schröter, Matthias Strassburg
  • Publication number: 20120187372
    Abstract: An AlGaInP light emitting device is formed as a thin, flip chip device. The device includes a semiconductor structure comprising an AlGaInP light emitting layer disposed between an n-type region and a p-type region. N- and p-contacts electrically connected to the n- and p-type regions are both formed on the same side of the semiconductor structure. The semiconductor structure is connected to the mount via the contacts. The growth substrate is removed from the semiconductor structure and the thick transparent substrate is omitted, such that the total thickness of semiconductor layers in the device is less than 15 ?m in some embodiments, less than 10 ?m in some embodiments. The top side of the semiconductor structure may be textured.
    Type: Application
    Filed: March 19, 2012
    Publication date: July 26, 2012
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Rafael I. Aldaz, John E. Epler, Patrick N. Grillot, Michael R. Krames
  • Publication number: 20120149141
    Abstract: A process for fabricating AlGaInN-based photonic devices, such as lasers, capable of emitting blue light employs dry etching to form device waveguides and mirrors. The dry etching is preferably performed using a Chemically Assisted Ion Beam Etching (CAIBE) system.
    Type: Application
    Filed: February 15, 2012
    Publication date: June 14, 2012
    Inventors: Alex A. Behfar, Alfred T. Schremer, Cristian B. Stagarescu, Vainateya
  • Publication number: 20120142123
    Abstract: A process for fabricating AlGaInN-based photonic devices, such as lasers, capable of emitting blue light employs etching to form device waveguides and mirrors, preferably using a temperature of over 500° C. and an ion beam in excess of 500 V in CAIBE.
    Type: Application
    Filed: February 15, 2012
    Publication date: June 7, 2012
    Inventors: ALEX A. BEHFAR, Alfred T. Schremer, Cristian B. Stagarescu, Vainateya
  • Publication number: 20120112230
    Abstract: The exemplary embodiments of the present invention include forming a photoconductor thin film on a front surface of a substrate; forming a photoconductor thin film pattern by patterning the photoconductor thin film; and forming a metal electrode on the photoconductor thin film pattern.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 10, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dong Suk JUN, Kwang-Yong KANG, Sungil KIM, Mun Cheol PAEK, Han-Cheol RYU, Min Hwan KWAK, Seung beom KANG
  • Publication number: 20120086016
    Abstract: There is provided a surface treatment method of a group III nitride semiconductor including: providing a group III nitride semiconductor including a first surface having a group III polarity and a second surface opposing the first surface and having a nitrogen polarity; and irradiating a laser beam onto the second surface to change the nitrogen polarity of the second surface to the group III polarity.
    Type: Application
    Filed: December 12, 2011
    Publication date: April 12, 2012
    Applicant: Samsung LED Co., Ltd.
    Inventors: Jong In YANG, Sang Bum Lee, Sang Yeob Song, Si Hyuk Lee, Tae Hyung Kim
  • Publication number: 20120043567
    Abstract: The present invention discloses an LED structure with a Bragg film and a metal layer, wherein a Bragg film and a metal layer are coated on a bottom of a sapphire substrate. The Bragg film includes two optical layers having different refractive indexes and alternately stacked. The materials and thickness of the optical layers of the Bragg film are optimized to form a high-reflectivity area via optical operation, which can effectively reflect the incident light generated by the light emitting layer from different incident angles. The Bragg film together with the metal layer can reflect the light, which is projected downward, to be emitted from the top or lateral of an LED structure. Therefore, the present invention can greatly increase the light-extraction efficiency of the LED structure.
    Type: Application
    Filed: August 18, 2010
    Publication date: February 23, 2012
    Inventors: Liang-Jyi YAN, Yea-Chen LEE
  • Patent number: 8076685
    Abstract: A nitride semiconductor device includes an active layer formed between an n-type cladding layer and a p-type cladding layer, and a current confining layer having a conductive area through which a current flows to the active layer. The current confining layer includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The second semiconductor layer is formed on and in contact with the first semiconductor layer and has a smaller lattice constant than that of the first semiconductor layer. The third semiconductor layer is formed on and in contact with the second semiconductor layer and has a lattice constant that is smaller than that of the first semiconductor layer and larger than that of the second semiconductor layer.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: December 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Satoshi Tamura, Ryo Kajitani
  • Publication number: 20110284918
    Abstract: An optoelectronic semiconductor component includes an active layer that emits radiation, the active layer surrounded by cladding layers, wherein the cladding layers and/or the active layer include(s) an indium-containing phosphide compound semiconductor material and the phosphide compound semiconductor material contains at least one of elements Bi or Sb as an additional element of main group V.
    Type: Application
    Filed: January 5, 2010
    Publication date: November 24, 2011
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Alexander Behres, Matthias Sabathil
  • Patent number: 8053793
    Abstract: The present invention discloses a III-nitride compound semiconductor light emitting device including an active layer for generating light by recombination of an electron and a hole between an n-type nitride compound semiconductor layer and a p-type nitride compound semiconductor layer. The active layer is disposed over the n-type nitride compound semiconductor layer. The III-nitride compound semiconductor light emitting device includes a masking film made of MgN and grown on the p-type nitride compound semiconductor layer, and at least one nitride compound semiconductor layer grown after the growth of the masking film made of MgN.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: November 8, 2011
    Assignee: Epivalley Co., Ltd.
    Inventors: Eun Hyun Park, Tae-Kyung Yoo
  • Publication number: 20110266553
    Abstract: An object of the present invention is to provide a nitride semiconductor light-emitting device in which contact resistance generated between an n-contact layer and an n-side electrode is effectively reduced while maintaining satisfactory external quantum efficiency, and a method of efficiently producing the nitride semiconductor light-emitting device. Specifically, the present invention characteristically provides a nitride semiconductor light-emitting device having a semiconductor laminated body including an n-type laminate, a light-emitting layer and a p-type laminate, and an n-side electrode and a p-side electrode, characterized in that: the n-type laminate includes an n-contact layer made of an AlxGa1-xN material (0.7?x?1.0) and an n-clad layer provided on the n-contact layer; and an interlayer made of an AlyGa1-yN material (0?y?0.5) is provided on a partially exposed portion, on the light-emitting layer side, of the n-contact layer.
    Type: Application
    Filed: December 24, 2009
    Publication date: November 3, 2011
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yutaka Ohta, Yoshikazu Ooshika
  • Patent number: 8044416
    Abstract: One embodiment of the present invention provides a method for fabricating a high-power light-emitting diode (LED). The method includes etching grooves on a growth substrate, thereby forming mesas on the growth substrate. The method further includes fabricating indium gallium aluminum nitride (InGaAlN)-based LED multilayer structures on the mesas on the growth substrate, wherein a respective mesa supports a separate LED structure. In addition, the method includes bonding the multilayer structures to a conductive substrate. The method also includes removing the growth substrate. Furthermore, the method includes depositing a passivation layer and an electrode layer above the InGaAlN multilayer structures, wherein the passivation layer covers the sidewalls and bottom of the grooves.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: October 25, 2011
    Assignee: Lattice Power (Jiangxi) Corporation
    Inventors: Li Wang, Fengyi Jiang, Yingwen Tang, Junlin Liu
  • Publication number: 20110198667
    Abstract: There are provided a vapor deposition system, a method of manufacturing a light emitting device, and a light emitting device. A vapor deposition system according to an aspect of the invention may include: a first chamber having a first susceptor and at least one gas distributor discharging a gas in a direction parallel to a substrate disposed on the first susceptor; and a second chamber having a second susceptor and at least one second gas distributor arranged above the second susceptor to discharge a gas downwards. When a vapor deposition system according to an aspect of the invention is used, a semiconductor layer being thereby grown has excellent crystalline quality, thereby improving the performance of a light emitting device. Furthermore, while the operational capability and productivity of the vapor deposition system are improved, deterioration in an apparatus can be prevented.
    Type: Application
    Filed: November 5, 2010
    Publication date: August 18, 2011
    Inventors: Dong Ju LEE, Hyun Wook Shim, Heon Ho Lee, Young Sun Kim, Sung Tae Kim
  • Patent number: 7935974
    Abstract: The invention relates to a monolithic white light emitting device using wafer bonding or metal bonding. In the invention, a conductive submount substrate is provided. A first light emitter is bonded onto the conductive submount substrate by a metal layer. In the first light emitter, a p-type nitride semiconductor layer, a first active layer, an n-type nitride semiconductor layer and a conductive substrate are stacked sequentially from bottom to top. In addition, a second light emitter is formed on a partial area of the conductive substrate. In the second light emitter, a p-type AlGaInP-based semiconductor layer, an active layer and an n-type AlGaInP-based semiconductor layer are stacked sequentially from bottom to top. Further, a p-electrode is formed on an underside of the conductive submount substrate and an n-electrode is formed on a top surface of the n-type AlGaInP-based semiconductor layer.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: May 3, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Min Ho Kim, Masayoshi Koike, Kyeong Ik Min, Myong Soo Cho
  • Patent number: 7928449
    Abstract: Provided is a light emitting device. The light emitting device comprises a second electrode layer, a second conduction type semiconductor layer, an active layer, a first conduction type semiconductor layer, a first electrode layer, and an insulating layer. The second conduction type semiconductor layer is formed on the second electrode layer. The active layer is formed on the second conduction type semiconductor layer. The first conduction type semiconductor layer is formed on the active layer. The first electrode layer is formed on the first conduction type semiconductor layer. The insulating layer is disposed between the second electrode layer and the second conduction type semiconductor layer.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: April 19, 2011
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kyung Jun Kim, Hyo Kun Son
  • Patent number: 7928448
    Abstract: A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: April 19, 2011
    Inventors: Jonathan J. Wierer, Jr., John E. Epler
  • Patent number: 7928465
    Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: April 19, 2011
    Assignee: LG Electronics Inc.
    Inventors: Jong-Lam Lee, In-Kwon Jeong, Myung Cheol Yoo
  • Publication number: 20110049542
    Abstract: The present invention makes available AlxGa(1-x)As (0?x?1) substrates, epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior characteristics. An AlxGa(1-x)As substrate (10a) of the present invention is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater than the amount fraction x of Al in the major surface (11a).
    Type: Application
    Filed: May 27, 2009
    Publication date: March 3, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: So Tanaka, Kenichi Miyahara, Hiroyuki Kitabayashi, Koji Katayama, Tomonori Morishita, Tatsuya Moriwake
  • Patent number: 7897993
    Abstract: A compound semiconductor luminescent device characterized by comprising an electroconductive substrate, a compound semiconductor function layer including a GaN layer, an electrode, an adhesiveness-enhancing layer, and a bonding layer, which are stacked in this order wherein the above-described electroconductive substrate includes a metal material that indicates a thermal expansion coefficient different by 1.5×10?6/° C. or less from GaN.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: March 1, 2011
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshinobu Ono, Sadanori Yamanaka
  • Publication number: 20110042706
    Abstract: Affords AlxGa(1-x)As (0?x?1) substrates, epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior characteristics. An AlxGa(1-x)As substrate (10a) of the present invention is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater than the amount fraction x of Al in the major surface (11a). In addition, the AlxGa(1-x)As substrate (10a) is further furnished with a GaAs substrate (13), contacting the rear face (11b) of the AlxGa(1-x)As layer (11).
    Type: Application
    Filed: May 27, 2009
    Publication date: February 24, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: So Tanaka, Kenichi Miyahara, Hiroyuki Kitabayashi, Koji Katayama, Tomonori Morishita, Tatsuya Moriwake
  • Publication number: 20110037049
    Abstract: Disclosed is a nitride semiconductor light-emitting device including a substrate, a pair of p-type and n-type clad layers formed on the substrate, and an active layer having a single quantum well structure or a multiple quantum well structure, which is sandwiched between the p-type clad layer and the n-type clad layer, and includes a quantum well layer and a pair of barrier layers each having a larger bandgap than that of the quantum well layer, the quantum well layer being sandwiched between the pair of barrier layers. Each of the pair of barrier layers has a multi-layer structure including, starting from the quantum well layer side, a first subbarrier layer having a composition of Iny1Ga1-y1N, a second subbarrier layer having a composition of Iny2Ga1-y2N and a third subbarrier layer having a composition of Iny3Ga1-y3N, in which y1, y2 and y3 satisfy the relationship of 0?y1,y3<y2<1 and y1=y3.
    Type: Application
    Filed: March 4, 2010
    Publication date: February 17, 2011
    Inventors: Koichi TACHIBANA, Hajime Nago, Toshiki Hikosaka, Shinya Nunoue
  • Patent number: 7868316
    Abstract: There is provided a nitride semiconductor device.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: January 11, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd
    Inventors: Suk Ho Yoon, Ki Ho Park, Joong Kon Son
  • Patent number: 7842531
    Abstract: A gallium nitride-based device has a first GaN layer and a type II quantum well active region over the GaN layer. The type II quantum well active region comprises at least one InGaN layer and at least one GaNAs layer comprising 1.5 to 8% As concentration. The type II quantum well emits in the 400 to 700 nm region with reduced polarization affect.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: November 30, 2010
    Assignee: Lehigh University
    Inventors: Nelson Tansu, Ronald A. Arif, Yik Khoon Ee
  • Patent number: 7838890
    Abstract: A method for manufacturing an optical device comprises steps of: (a) laminating a first, a second, a third, a fourth, a fifth, and a sixth semiconductor layers; (b) patterning at least the third, fourth, fifth and sixth semiconductor layers, thereby forming a light emitting device section and a rectification section; (c) forming first and second electrodes for driving the light emitting device section; and (d) connecting the fourth and sixth semiconductor sections between the first and second electrodes in parallel with the light emitting device section so as to have a rectification action in a reverse direction with respect to the light emitting device section, wherein the step (b) includes conducting etching until a portion of a top surface of the third semiconductor layer is exposed.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: November 23, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuo Nishida, Hijime Onishi
  • Publication number: 20100270909
    Abstract: A luminophore consisting of the BAM system as a host lattice, having the stoichiometry MxEu1?xMg1?y+dMnyAl10+2fO17+d+3f, is provided, wherein 0.2?x?0.48; 0?y?0.3; 0?d?0.1; ?0.1?f?1.0.
    Type: Application
    Filed: November 17, 2008
    Publication date: October 28, 2010
    Applicant: OSRAM GESELLSCHAFT MIT BESCHRAENKTER HAFTUNG
    Inventors: Renate Hirrle, Guenter Huber, Frank Jermann, Martin Zachau
  • Patent number: 7820463
    Abstract: A light emitting device according to an exemplary embodiment of the present invention includes: an n-type cladding layer; a p-type cladding layer; an active layer interposed between the n-type cladding layer and the p-type cladding layer; and an ohmic contact layer contacting the p-type cladding layer or the n-type cladding layer and comprising a first film that comprises a transparent conductive zinc oxide having a one-dimensional nano structure, wherein the one-dimensional nano structure is at least one selected from a nano-column, a nano rod, and a nano wire.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: October 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: June O Song
  • Patent number: 7781785
    Abstract: The present invention discloses a light emitting diode having a mirror and a permanent substrate plated thereon. The present invention also discloses a method for producing such light emitting diode. The permanent substrate and the mirror are formed after both electrodes are completed. Accordingly, the epitaxial structure and the mirror will not be damaged, and brightness and heat dissipation of the light emitting device are improved.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: August 24, 2010
    Assignee: National Chung-Hsing University
    Inventors: Ray-Hua Horng, Dong-Sing Wu, Shao-Hua Huang, Chi-Ying Chiu, Yann-Jyh Chiang
  • Publication number: 20100176404
    Abstract: One embodiment of the present invention provides a method for fabricating a high-power light-emitting diode (LED). The method includes etching grooves on a growth substrate, thereby forming mesas on the growth substrate. The method further includes fabricating indium gallium aluminum nitride (InGaAlN)-based LED multilayer structures on the mesas on the growth substrate, wherein a respective mesa supports a separate LED structure. In addition, the method includes bonding the multilayer structures to a conductive substrate. The method also includes removing the growth substrate. Furthermore, the method includes depositing a passivation layer and an electrode layer above the InGaAlN multilayer structures, wherein the passivation layer covers the sidewalls and bottom of the grooves.
    Type: Application
    Filed: March 25, 2008
    Publication date: July 15, 2010
    Applicant: LATTICE POWER (JIANGXI) CORPORATION
    Inventors: Li Wang, Fengyi Jiang, Yingwen Tang, Junlin Liu
  • Patent number: 7741654
    Abstract: The present invention provides a semiconductor laser excellent in the current injection efficiency. In an inner stripe type semiconductor laser according to the present invention, a p type cladding layer 309 has a superlattice structure composed of GaN layers and Al0.1Ga0.9N layers, which are alternately layered on each other. The p type cladding layer 309 has a portion of high dislocation density and a portion of low dislocation density. That is, the dislocation density is relatively low in a region directly above an opening of the current-confining region 308, whereas the dislocation density is relatively high in a region directly above a current-confining region 308.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: June 22, 2010
    Assignee: NEC Corporation
    Inventors: Kazuhisa Fukuda, Chiaki Sasaoka, Akitaka Kimura
  • Patent number: 7723739
    Abstract: A semiconductor light emitting device includes an n-type nitride semiconductor layer 3 formed on one surface side of a single-crystal substrate 1 for epitaxial growth through a first buffer layer 2, an emission layer 5 formed on a surface side of the n-type nitride semiconductor layer 3, and a p-type nitride semiconductor layer 6 formed on a surface side of the emission layer 5. The emission layer 5 has an AlGaInN quantum well structure, and a second buffer layer 4 having the same composition as a barrier layer 5a of the emission layer 5 is provided between the n-type nitride semiconductor layer 3 and the emission layer 5. In the semiconductor light emitting device, it is possible to increase emission intensity of the ultraviolet radiation as compared with a conventional configuration while using AlGaInN as a material of the emission layer.
    Type: Grant
    Filed: September 4, 2006
    Date of Patent: May 25, 2010
    Assignees: Panasonic Electric Works Co., Ltd., Riken
    Inventors: Takayoshi Takano, Yukihiro Kondo, Junji Ikeda, Hideki Hirayama