Field-effect Device (e.g., Tft, Fet) (epo) Patents (Class 257/E51.005)
  • Patent number: 8476633
    Abstract: A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: July 2, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyeong-Suk Yoo, Ho-Jun Lee, Sung-ryul Kim, O-Sung Seo, Hong-Kee Chin
  • Patent number: 8466460
    Abstract: A polymer comprising repeating units A and optionally repeating units B wherein Z=S, Se, N—R and O; W is at each occurrence independently a monocyclic or polycylic moiety optionally substituted with 1-4 Ra groups; Y, at each occurrence, is independently a divalent C1-6 alkyl group, a divalent C1-6 haloalkyl group, or a covalent bond; c is from 1 to 6.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: June 18, 2013
    Assignees: BASF SE, Polyera Corporation
    Inventors: Ashok Kumar Mishra, Subramanian Vaidyanathan, Hiroyoshi Noguchi, Florian Doetz, Silke Annika Koehler, Marcel Kastler
  • Patent number: 8461630
    Abstract: A conductive film to be a gate electrode, a first insulating film to be a gate insulating film, a semiconductor film in which a channel region is formed, and a second insulating film to be a channel protective film are successively formed. With the use of a resist mask formed by performing light exposure with the use of a photomask which is a multi-tone mask and development, i) in a region without the resist mask, the second insulating film, the semiconductor film, the first insulating film, and the conductive film are successively etched, ii) the resist mask is made to recede by ashing or the like and only the region of the resist mask with small thickness is removed, so that part of the second insulating film is exposed, and iii) the exposed part of the second insulating film is etched, so that a pair of opening portions is formed.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: June 11, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuta Endo, Kosei Noda
  • Patent number: 8445912
    Abstract: A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: May 21, 2013
    Assignee: Sony Corporation
    Inventors: Iwao Yagi, Hideki Ono, Mari Sasaki
  • Patent number: 8445335
    Abstract: A method of forming a pixel structure is provided. A pixel electrode made of transparent conductive material is formed to electrically connect a data line and a source electrode of a switching element of the adjacent sub-pixel region so that a plurality of sub-pixels can share the same data line. The number of data lines can be reduced, and the aperture ratio (AR) can be improved.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: May 21, 2013
    Assignee: AU Optronics Corp.
    Inventors: Jing-Tin Kuo, Che-Chia Hsu, Chao-Liang Lu
  • Publication number: 20130119383
    Abstract: Thin-film transistors and techniques for forming thin-film transistors (TFT). In some embodiments, there is provided a method of forming a TFT, comprising forming a body region of the TFT comprising an organic semiconducting material, and forming a protective layer comprising an organic insulating material. Forming the protective layer comprises contacting the body region of the TFT with a solution comprising the organic insulating material. The organic insulating material is a material that phase separates with the organic semiconducting material when the solution contacts the organic semiconducting material. In other embodiments, there is provided an apparatus comprising a TFT.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 16, 2013
    Applicant: Sony Corporation
    Inventor: Sony Corporation
  • Patent number: 8415659
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: April 9, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Ho Kim, Il-Jeong Lee, Do-Hyun Kwon, Choong-Youl Im, Hee-Seong Jeong, Su-Mi Lee
  • Patent number: 8405073
    Abstract: A thin film transistor capable of stably obtaining good performance is provided. The thin film transistor includes an organic semiconductor layer, and a protective layer and a source electrode and a drain electrode formed on the organic semiconductor layer. The protective layer is disposed at least in a region between the source electrode and the drain electrode.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: March 26, 2013
    Assignee: Sony Corporation
    Inventors: Hideki Ono, Akihiro Nomoto, Iwao Yagi
  • Patent number: 8405081
    Abstract: An organic thin field transistor is disclosed. The organic thin field transistor includes a first and a second insulting layers, a metal structure and an organic layer serving as an active layer. Materials of the first and the second insulting layers are different, and by performing an etching process, a surface of the metal structure and a surface of the second insulting layer are effectively aligned. Because of the high flatness of the surface of the metal structure and the second insulting layer, a continuous film-forming property and crystallinity of the active layer of the organic thin field transistor are improved, so as to achieve a better the electrical characteristic.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: March 26, 2013
    Assignee: National Taiwan University of Science and Technology
    Inventors: Ching-Lin Fan, Yu-Zuo Lin, Chao-Hung Huang
  • Patent number: 8399288
    Abstract: A method of manufacturing a semiconductor device including a gate electrode, a gate insulating layer, source/drain electrodes, and a channel-forming region that are disposed on a base is provided. The method includes the steps of forming a thin film by application of a mixed solution including a polymeric insulating material and a dioxaanthanthrene compound represented by structural formula (1) below; and subsequently drying the thin film to induce phase separation of the polymeric insulating material and the dioxaanthanthrene compound, thereby forming the gate insulating layer from the polymeric insulating material and the channel-forming region from the dioxaanthanthrene compound: wherein at least one of R3 and R9 represents a substituent other than hydrogen.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: March 19, 2013
    Assignee: Sony Corporation
    Inventors: Norihito Kobayashi, Mari Sasaki, Takahiro Ohe
  • Patent number: 8395147
    Abstract: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film is formed on the substrate so as to cover the organic semiconductor pattern. A resist pattern is formed on the electrode material film. By wet etching using the resist pattern as a mask, the electrode material film is patterned. By the process, a source electrode and a drain electrode are formed.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventors: Mao Katsuhara, Nobuhide Yoneya
  • Publication number: 20130049118
    Abstract: There are provided a thin-film transistor that leads to the improved performance and production stability, and a method of manufacturing the thin-film transistor, and an electronic unit using the thin-film transistor. The thin-film transistor includes: an organic semiconductor section including first and second surfaces; a source electrode section adjacent to the first surface; and a drain electrode section adjacent to the second surface. One or both of the source electrode section and the drain electrode section are highly-conductive electrode sections containing an organic semiconductor material higher in conductivity than a material of the organic semiconductor section.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 28, 2013
    Applicant: SONY CORPORATION
    Inventor: Mao Katsuhara
  • Publication number: 20130049029
    Abstract: An organic light-emitting display device includes a gate electrode, a source electrode, and a drain electrode on a substrate, a gate interconnection line connected to the gate electrode, a source and drain interconnection line connected to the source and drain electrodes, a first test pad electrically connected to the source and drain interconnection line, and a second test pad electrically connected to the gate interconnection line. The second test pad is at a same level as the first test pad, and the gate electrode is on a different layer than the source and drain electrodes.
    Type: Application
    Filed: March 13, 2012
    Publication date: February 28, 2013
    Inventors: Kwang-Hae KIM, Jae-Beom Choi, Kwan-Wook Jung, June-Woo Lee
  • Patent number: 8367489
    Abstract: Objects are to provide a semiconductor device for high power application in which a novel semiconductor material having high productivity is used and to provide a semiconductor device having a novel structure in which a novel semiconductor material is used. The present invention is a vertical transistor and a vertical diode each of which has a stacked body of an oxide semiconductor in which a first oxide semiconductor film having crystallinity and a second oxide semiconductor film having crystallinity are stacked. An impurity serving as an electron donor (donor) which is contained in the stacked body of an oxide semiconductor is removed in a step of crystal growth; therefore, the stacked body of an oxide semiconductor is highly purified and is an intrinsic semiconductor or a substantially intrinsic semiconductor whose carrier density is low. The stacked body of an oxide semiconductor has a wider band gap than a silicon semiconductor.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: February 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20130026455
    Abstract: The present disclosure relates to a hybrid organic-inorganic thin film producing method including an interlayer connection between an inorganic cross-linked layer and an organic polymer through a molecular layer deposition (MLD) method, a hybrid organic-inorganic thin film produced by the producing method, and an organic electronic device and a thin film transistor containing the hybrid organic-inorganic thin film.
    Type: Application
    Filed: February 21, 2012
    Publication date: January 31, 2013
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Myung Mo SUNG, Kyu Seok HAN, Sang Ho CHO, Ki Bok HAN
  • Patent number: 8362474
    Abstract: It is an object to provide an organic field effect transistor including an electrode which can reduce an energy barrier at an interface between a conductive layer and a semiconductor layer, and a semiconductor device including the organic field effect transistor. A composite layer containing an organic compound and an inorganic compound is provided in at least part of one of a source electrode and a drain electrode in an organic field effect transistor, and as the organic compound, a carbazole derivative represented by the general formula (1) is used. By providing the composite layer in at least part of one of the source electrode and the drain electrode, an energy barrier at an interface between a conductive layer and a semiconductor layer can be reduced.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: January 29, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinobu Furukawa, Ryota Imahayashi, Kaoru Kato
  • Publication number: 20130009223
    Abstract: In the condition where a nozzle for applying a coating liquid is disposed on the lower side of a substrate and a substrate surface controlled in wettability is faced down, the nozzle and the substrate are moved relative to each other, whereby the coating liquid is applied to a desired region of the substrate, and then the coating liquid is dried, to obtain a pattern included a dried coating layer.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 10, 2013
    Applicant: Sony Corporation
    Inventor: Akihiro Nomoto
  • Publication number: 20130009162
    Abstract: An organic light-emitting display device may include a substrate; a plurality of thin film transistors (TFTs) on the substrate; a plurality of first electrodes respectively on the TFTs; a pixel-defining layer between the first electrodes, the pixel-defining layer including a covered portion and an uncovered portion; a plurality of organic layers respectively on the first electrodes, each organic layer including an emission layer; a second electrode covering at least a part of the organic layers and the pixel-defining layer, a portion of the pixel-defining layer covered by the second electrode defining the covered portion, wherein at least one outgassing hole is in the uncovered portion of the pixel-defining layer, the uncovered portion being an exposed area of the pixel-defining layer.
    Type: Application
    Filed: January 23, 2012
    Publication date: January 10, 2013
    Inventor: Seong-Jong KANG
  • Patent number: 8350255
    Abstract: A method for manufacturing a thin film transistor includes the steps of covering a gate electrode patterned on a substrate with a gate insulating film, forming an organic semiconductor layer and an electrode film on the gate insulating film in that lamination order, and forming a negative type photoresist film on the substrate provided with the organic semiconductor layer and the electrode film and forming a resist pattern, which serves as a mask for forming a source-drain by etching the electrode film, through back surface exposure from the substrate side by using the gate electrode as a light-shielding mask and the following development treatment.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: January 8, 2013
    Assignee: Sony Corporation
    Inventors: Kazumasa Nomoto, Mao Katsuhara, Akira Yumoto
  • Patent number: 8350259
    Abstract: An electronic circuit includes at least two organic components interconnected by conductor tracks and having a common carrier substrate. The components and the conductor tracks are formed from layer portions. An uppermost layer portion, remote from the carrier substrate, of the electronic circuit is of a patterned configuration comprising an electrically conducting material. The patterned uppermost layer portion on its side remote from the carrier substrate is provided with at least one protective layer arranged in congruent relationship with the uppermost layer portion. The at least two organic components include at least one first component of a first component type and at least one second component of a second component type different therefrom. Components of the same component type are respectively protected by a protective layer of the same composition and/or the same structure corresponding to that component type and differing from one another according to the corresponding component type.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: January 8, 2013
    Assignee: PolyIC GmbH & Co. KG
    Inventors: Alexander Knobloch, Walter Fix
  • Patent number: 8350266
    Abstract: A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Byeong-Jae Ahn
  • Publication number: 20130005079
    Abstract: Provided is an organic thin film transistor, method of forming the same, and a memory device employing the same. The organic thin film transistor includes a substrate, a source electrode and a drain electrode on the substrate, an active layer on the substrate between the source electrode and the drain electrode, a gate electrode controlling the active layer, and an organic dielectric layer between the active layer and the gate electrode. The organic dielectric layer includes nanoparticles, a hydrophilic polymer surrounding the nanoparticles, and a hydrophobic polymer.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong-Young NOH, In-Kyu You, Jae Bon Koo
  • Patent number: 8344374
    Abstract: It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: January 1, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Yasuo Nakamura, Junpei Sugao, Hideki Uochi
  • Patent number: 8338305
    Abstract: The present disclosure provides a method includes forming a multi-fin device. The method includes forming a patterned mask layer on a semiconductor substrate. The patterned mask layer includes a first opening having a first width W1 and a second opening having a second width W2 less than the first width. The patterned mask layer defines a multi-fin device region and an inter-device region, wherein the inter-device region is aligned with the first opening; and the multi-fin device region includes at least one intra-device region being aligned with the second opening.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: December 25, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Chih Chen, Tsung-Lin Lee, Feng Yuan
  • Patent number: 8334553
    Abstract: A thin-film transistor manufactured on a transparent substrate has a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate. The channel region has channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film. The light blocking film is divided across the channel region. Interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d), allowing low the manufacturing cost and suppressed photo leak current.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: December 18, 2012
    Assignee: NLT Technologies, Ltd.
    Inventors: Shigeru Mori, Takahiro Korenari, Hiroshi Tanabe
  • Publication number: 20120313114
    Abstract: A method of manufacturing a thin film transistor (TFT), a TFT manufactured by the method, a method of manufacturing an organic light-emitting display apparatus that includes the TFT, a display including the TFT. By including a buffer layer below and an insulating layer above a silicon layer for the TFT, the silicon layer can be crystallized without being exposed to air, so that contamination can be prevented. Also, due to the overlying insulating layer, the silicon layer can be patterned without directly contacting photoresist. The result is a TFT with uniform and improved electrical characteristics, and an improved display apparatus.
    Type: Application
    Filed: September 23, 2011
    Publication date: December 13, 2012
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Byoung-Keon Park, Jong-Ryuk Park, Dong-Hyun Lee, Jin-Wook Seo, Ki-Yong Lee
  • Patent number: 8330150
    Abstract: An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. Additionally disclosed is a method of manufacturing an organic light-emitting display device. An organic light-emitting display device may include, for example, a thin-film transistor (TFT) including a gate electrode, an active layer insulated from the gate electrode, source and drain electrodes insulated from the gate electrode and contacting the active layer and an insulating layer disposed between the source and drain electrodes and the active layer; and an organic light-emitting diode electrically connected to the TFT.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: December 11, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Joong Chung, Jin-Seong Park, Jong-Han Jeong, Jae-Kyeong Jeong, Yeong-Gon Mo, Min-Kyu Kim, Tae-Kyung Ahn, Hui-Won Yang, Kwang-Suk Kim, Eun-Hyun Kim, Jae-Wook Kang, Jae-Soon Im
  • Patent number: 8324699
    Abstract: A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface, which can be enlarged, at low substrate temperature, is provided. A monosilane gas (SiH4), nitrous oxide (N2O), and a rare gas are introduced into a chamber to generate high-density plasma at a pressure higher than or equal to 10 Pa and lower than or equal to 30 Pa so that an insulating film is formed over a substrate having an insulating surface. After that, the supply of a monosilane gas is stopped, and nitrous oxide (N2O) and a rare gas are introduced without exposure to the air to perform plasma treatment on a surface of the insulating film.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: December 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuhiro Ichijo, Kenichi Okazaki, Tetsuhiro Tanaka, Takashi Ohtsuki, Seiji Yasumoto, Shunpei Yamazaki
  • Patent number: 8319218
    Abstract: An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2Ga2ZnO7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Akiharu Miyanaga, Masahiro Takahashi, Takuya Hirohashi, Takashi Shimazu
  • Patent number: 8319300
    Abstract: A solution composition for forming an oxide thin film may include a first compound including zinc, a second compound including indium, and a third compound including magnesium or hafnium, and an electronic device may include an oxide semiconductor including zinc, indium, and magnesium. The zinc and hafnium may be included at an atomic ratio of about 1:0.01 to about 1:1.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: November 27, 2012
    Assignees: Samsung Electronics Co., Ltd., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Jong-Baek Seon, Hyun-Jae Kim, Sang-Yoon Lee, Myung-Kwan Ryu, Hyun-Soo Shin, Kyung-Bae Park, Woong-Hee Jeong, Gun-hee Kim, Byung-Du Ahn
  • Publication number: 20120291857
    Abstract: According to example embodiments, an organic passivation layer composition includes a cross-linking agent and an oligomer or a polymer including structural units represented by the following Chemical Formulae 1 and 2: In Chemical Formulae 1 and 2, each substituent is defined in the detailed description.
    Type: Application
    Filed: May 18, 2012
    Publication date: November 22, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joo Young Kim, Myung-Sup Jung, Byong Gwon Song, Bon Won Koo, Byung Wook Yoo, Ji Youl Lee, Do Hwan Kim
  • Patent number: 8314423
    Abstract: A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a plurality of openings is then formed on the substrate to cover at least a portion of the first patterned conductive layer, and a plurality of dielectric patterns are formed in the openings. A plurality of semiconductor patterns are formed on the patterned gate insulating layer. A second patterned conductive layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A passivation layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A plurality of pixel electrodes are formed on the passivation layer.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: November 20, 2012
    Assignee: Au Optronics Corporation
    Inventors: Chien-Hung Chen, Lih-Hsiung Chan, Chin-Yueh Liao, Hsien-Kai Tseng
  • Patent number: 8309961
    Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: November 13, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
  • Publication number: 20120280222
    Abstract: The present invention provides a fabrication method for an organic electronic device comprising a step of stacking sequentially a first electrode made of a metal, one or more organic material layers, and a second electrode on a substrate, wherein the method comprises the steps of: 1) forming a layer on the first electrode using a metal having a higher oxidation rate than the first electrode before forming the organic material layer, 2) treating the layer formed using a metal having a higher oxidation rate than the first electrode with oxygen plasma to form a metal oxide layer, and 3) treating the metal oxide layer with inert gas plasma to remove a native oxide layer on the first electrode, and an organic electronic device fabricated by the same method.
    Type: Application
    Filed: July 18, 2012
    Publication date: November 8, 2012
    Inventors: Jung-Hyoung Lee, Jung-Bum Kim
  • Publication number: 20120280235
    Abstract: A thin film FET device and a method of forming the same are disclosed. The method comprises: etching a single crystal silicon thin film layer on an insulating thin film layer of an SOI substrate, wherein the etched single crystal silicon thin film layer is used as a channel; forming a gate insulating layer on the SOI substrate that has the single crystal silicon channel formed thereon; and forming a gate electrode, a drain electrode, and a source electrode.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 8, 2012
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Yanzhao LI
  • Patent number: 8304763
    Abstract: A semiconductor thin film (1) that is laminated on a gate electrode (13) with a gate insulation film (15) therebetween is included. The semiconductor thin film (1) has a layered structure and includes at least two semiconductor layers (a, a?). In the semiconductor thin film (1), for example, an intermediate layer (b) composed of a material different from the two semiconductor layers (a, a?) is sandwiched between the semiconductor layers (a, a?). The two semiconductor layers (a, a?) are composed of an identical material and the intermediate layer (b) is composed of an insulation material. A material constituting such a layered structure is composed of an organic material. Thus, a thin-film semiconductor device and a field-effect transistor in which a decrease in the mobility caused by heating and degradation of characteristics caused by the decrease can be suppressed and the heat resistance is enhanced are provided.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: November 6, 2012
    Assignee: Sony Corporation
    Inventors: Takahiro Ohe, Miki Kimijima
  • Patent number: 8293590
    Abstract: An active matrix substrate 40 according to the present invention includes a conductive film 44 and a wiring 80 for supplying a signal to the conductive film 44, characterized in that the wiring 80 includes a first conductive layer 61 and a second conductive layer 62 having a relatively large line width in comparison with the first conductive layer 61 and laminated so as to cover the first conductive layer 61, and the conductive film 44 is arranged in a matrix pattern, and at least a portion of the conductive film 44 is disposed overlapping the wiring 80.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: October 23, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hideaki Sunohara
  • Patent number: 8288941
    Abstract: An electronic device having an electrode with enhanced injection properties comprising a first electrode and a first layer of cross-linked molecular charge transfer material on the first electrode. The cross-linked molecular charge transfer material may be an acceptor, which may consist of at least one of: TNF, TN9(CN)2F, TeNF, TeCIBQ, TCNB, DCNQ, and TCAQ. The cross-linked molecular charge transfer material may also be a donor, which may consist of at least one of: Terpy, Ru(terpy)2 TTN, and crystal violet.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Thomas Brunschwiler, Siegfried F Karg, Walter Riess
  • Publication number: 20120256175
    Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.
    Type: Application
    Filed: June 21, 2012
    Publication date: October 11, 2012
    Applicant: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Andrew Gabriel Rinzler, Bo Liu, Mitchell Austin McCarthy, John Robert Reynolds, Franky So
  • Publication number: 20120248425
    Abstract: The present invention relates to a hybrid layer including an oxide layer or organic layer, and organic polymer layer, an insulating layer including the hybrid layer, and an electronic device such as an organic field-effect transistor. A hybrid layer according to the present invention may include an oxide layer or an organic layer, and an organic polymer layer chemically combined with the oxide layer or the organic layer.
    Type: Application
    Filed: February 8, 2012
    Publication date: October 4, 2012
    Applicant: INHA-INDUSTRY PARTNERSHIP INSTITUTE
    Inventors: Hoi Chang Yang, Mi Jang
  • Patent number: 8278662
    Abstract: Disclosed is a manufacturing method of a thin film transistor, which enables the formation of a thin film transistor by using only one photomask. The method includes: over a substrate sequentially forming a first insulating film, a first conductive film, a second insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film; forming a resist mask thereover using a first photomask; performing a first etching to allow the side surface of the layers including an upper portion of the first insulating film, the first conductive film, the second insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film to be coplanar to a side surface of the resist mask; and performing a second etching to selectively etch the first conductive film to allow the side surface of the first conductive film is located inside the side surface of the layers.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: October 2, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hidekazu Miyairi
  • Patent number: 8278664
    Abstract: Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: October 2, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Eui-Hoon Hwang, Sang-Gul Lee
  • Patent number: 8278648
    Abstract: An organic thin film transistor (TFT) substrate with a simplified fabrication process is disclosed. The TFT substrate includes a gate line and a data line and an organic TFT connected to the gate line and the data line. The gate line and the data line define a pixel region where a pixel electrode is formed. A first contact portion connects the data line to the organic TFT, and a second contact portion connects the pixel electrode to the organic TFT. A passivation layer covers the organic TFT. The organic TFT substrate also includes a bank insulating layer with a first contact hole for connecting the first contact portion to the organic TFT, a second contact hole for connecting the second contact portion to the organic TFT, a first sub bank defining a location of the gate insulating layer, and a second sub bank defining a location of the passivation layer.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: October 2, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae Young Choi, Bo Sung Kim, Keun Kyu Song, Seung Hwan Cho
  • Patent number: 8278660
    Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor having low leak current and high mobility are obtained in the same time in a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: October 2, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
  • Patent number: 8268642
    Abstract: An object is to suppress a significant change in electrical characteristics of thin film transistors and a deviation thereof from the designed range due to static electricity, and to improve the yield in manufacturing semiconductor devices. In order to prevent a substrate from being charged with static electricity by heat treatment or to favorably reduce static electricity with which a substrate is charged in a manufacturing process of a semiconductor device, heat treatment is performed with a substrate provided with a thin film transistor stored in a conductive container. In addition, a heating apparatus for performing the heat treatment is electrically connected to a ground potential, and the container and the substrate are also electrically connected to the ground potential.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: September 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shuhei Yoshitomi, Masashi Tsubuku, Shunpei Yamazaki
  • Patent number: 8269232
    Abstract: A TFT LCD array substrate and a manufacturing method thereof. The TFT LCD array substrate includes a substrate and a pixel array on the substrate. Each pixel has: a gate line and a gate electrode formed on the substrate; a gate insulating layer formed on the gate line and the gate electrode; a semiconductor layer formed on the gate insulating layer disposed on the gate electrode; an ohmic contact layer having two parts, which are disposed on two sides of the semiconductor layer respectively and are apart from one another; an isolation insulating dielectric layer covering the substrate and the gate insulating layer except a portion on which the semiconductor layer is formed; a pixel electrode formed on the isolation insulating dielectric layer and the ohmic contact layer over the semiconductor layer; a source/drain electrode formed on the pixel electrode over the ohmic contact layer, and a passivation layer at least covering the semiconductor layer.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: September 18, 2012
    Assignee: BOE Optoelectronics Technology Co., Ltd.
    Inventors: Chaoyong Deng, Seung Moo Rim
  • Publication number: 20120227812
    Abstract: Disclosed are new semiconducting polymers. The polymers disclosed herein can exhibit high carrier mobility and/or efficient light absorption/emission characteristics, and can possess certain processing advantages such as solution-processability and/or good stability at ambient conditions.
    Type: Application
    Filed: March 7, 2012
    Publication date: September 13, 2012
    Inventors: Jordan Quinn, Hualong Pan, Antonio Facchetti
  • Publication number: 20120228595
    Abstract: Disclosed herein is a composition for producing an insulator. More specifically, the composition comprises a silane-based organic-inorganic hybrid material containing one or more multiple bonds, an acrylic organic crosslinking agent and a silane-based crosslinking agent having six or more alkoxy groups. Also disclosed herein is an organic insulator produced using the insulator composition. The organic insulator is highly crosslinked to facilitate the fabrication of an organic thin film transistor in terms of processing.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Inventors: Eun Jeong JEONG, Jong Baek SEON, Joo Young KIM
  • Publication number: 20120231577
    Abstract: There is provided an anode for an organic electronic device. The anode is a conducting inorganic material having an oxidized surface layer. The surface layer is non-conductive and hole-transporting.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: SHIVA PRAKASH
  • Patent number: 8263982
    Abstract: A thin film transistor includes a gate electrode and a semiconductor layer. The semiconductor layer includes a channel region, a source region, a drain region, a low-concentration impurity region provided between the channel region and the source or drain region and a high-concentration impurity region. The high-concentration impurity region overlaps with the gate electrode.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: September 11, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Hidenori Kawata