Assembling Bases Patents (Class 29/830)
  • Patent number: 8413321
    Abstract: A module substrate includes a multilayer substrate that includes a plurality of layers, a bottommost of the layers being a ceramic layer. Solderable contacts, which include fired pads composed of a conductive paste, are applied to the bottommost ceramic layer. A covering layer overlies the pads. The covering layer covers all outer edges of the pads. A window is cut out of the covering layer. A metallic coating is applied to each pad exclusively within the window.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: April 9, 2013
    Assignee: Epcos AG
    Inventors: Sebastian Brunner, Franz Kaul, Annette Fischer
  • Patent number: 8413324
    Abstract: A method for manufacturing a double-sided circuit board includes preparing a substrate having the first and second surfaces, forming a first hole having a first opening with a diameter R1 on the first surface of the substrate, forming a second hole having a second opening with a diameter R2 on the second surface of the substrate, forming a third hole having a diameter smaller than R1 and/or R2 and connecting the first and second holes such that a penetrating hole formed of the first hole, the second hole and the third hole is formed in the substrate, forming a first conductive circuit on the first surface of the substrate, forming a second conductive circuit on the second surface of the substrate, and filling the penetrating hole with conductive material such that a through-hole conductor electrically connecting the first conductive circuit and the second conductive circuit is formed.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: April 9, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Kota Noda, Tsutomu Yamauchi, Satoru Kawai
  • Publication number: 20130081859
    Abstract: A multilayer circuit board is provided, which includes multiple core boards stacked together. The core board includes an insulation layer and at least one conductor layer attached together. The conductor layer includes a circuit. The core board has at least one identification conductor disposed at an edge of at least one conductor layer. The identification conductor forms an identification pattern on a side surface of the core board along a stacking direction of the core boards. The identification patterns of the multiple core boards are different from each other on the side surface of the multilayer circuit board along the stacking direction of the core boards. A manufacturing method of the multilayer circuit board is further provided.
    Type: Application
    Filed: November 27, 2012
    Publication date: April 4, 2013
    Applicant: Huawei Technologies Co., Ltd.
    Inventor: Huawei Technologies Co., Ltd.
  • Publication number: 20130081857
    Abstract: A method for manufacturing a multi-piece substrate includes preparing a first frame having a connecting portion to which a first piece substrate is to be connected, forming on a portion of the first piece substrate connected to a second frame a conductive pattern having a contour corresponding to the periphery of the connecting portion of the first frame, irradiating laser along the boundary between the second frame and the conductive pattern on the first piece substrate such that the first piece substrate having a joint portion which engages with the connecting portion of the first frame is detached from the second frame, and fitting the joint portion of the first piece substrate into the connecting portion of the first frame such that the first piece substrate is connected to the first frame.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 4, 2013
    Inventors: MICHIMASA TAKAHASHI, NOBUYUKI NAGANUMA, TOSHINOBU ASAI, TERUYUKI ISHIHARA
  • Patent number: 8410373
    Abstract: Disclosed herein are a printed circuit substrate and a method of manufacturing the same. The printed circuit substrate includes an insulating layer, and a circuit layer that includes a circuit pattern disposed on the insulating layer and a barrier layer that is disposed to cover at least one surface of the circuit pattern and suppresses electrochemical migration from the circuit pattern, thereby making it possible to achieve high-density and secure reliability, and the method of manufacturing the same.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: April 2, 2013
    Assignees: Samsung Electro-Mechanics Co., Ltd., SNU R&DB Foundation
    Inventors: Hyung Wook Park, Young Chang Joo, Hong Seok Min, Young Gwan Ko, Chang Sup Ryu, Ho Young Lee, Shin Bok Lee, Min Suk Jung
  • Patent number: 8407888
    Abstract: A method for manufacturing a silicon chip package for a circuit board assembly is provided with a package substrate having a silicon chip and an array of contact pads provided by conductive material. A plurality of conductive springs are affixed to the array of contact pads for providing conductive contact with the corresponding array of contacts on a circuit board assembly.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: April 2, 2013
    Assignee: Oracle International Corporation
    Inventor: Ashur S. Bet-Shliemoun
  • Publication number: 20130078825
    Abstract: There is provided a first, connecting printed circuit board (PCB) and a second, receiving PCB and a method for connecting the first and second PCBs. The first PCB has three projections or prongs extending from the main body of the PCB. The second PCB has three holes into which the prongs of the first PCB can be inserted to provide a secure mechanical connection whilst the PCBs are soldered together.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 28, 2013
    Inventor: Richard Mark Wain
  • Publication number: 20130077262
    Abstract: In a method of manufacturing a module board, an electronic component is mounted on a first principal surface of a small board. A cavity defining a through hole is formed in a core board. The electronic component is housed in the cavity by mounting the small board on a surface electrode arranged around the cavity. Resin layers are formed on both principal surfaces of the core board, and resin flows through a gap between the core board and the small board. Hence, the inside of the cavity is filled with the resin, and the electronic component is sealed with the resin.
    Type: Application
    Filed: November 26, 2012
    Publication date: March 28, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Murata Manufacturing Co., Ltd.
  • Patent number: 8402644
    Abstract: A method of manufacturing an electronic parts packaging structure including the steps of preparing a plurality of sheet-like units each of which is constructed by a first insulating layer, a wiring formed on one surface of the first insulating layer, electronic parts connected to the wiring, a second insulating layer formed on an one surface side of the first insulating layer to cover the electronic parts, and a connecting portion for connecting electrically the wiring, and stacking mutually the units to arrange directions of unit adjacent in a thickness direction alternately oppositely, and bonding the units such that electronic parts of respective units are electrically connected mutually via connecting portions.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: March 26, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Toshio Gomyo, Yukiharu Takeuchi, Hidenori Takayanagi, Takaharu Yamano
  • Patent number: 8402646
    Abstract: A method of manufacturing complex electronic cards is provided, each card including an electronic device or assembly formed of a first electronic unit at least partially arranged in a window in a solid bottom layer of the card and a second electronic unit, incorporated in the body of the card, at least partially formed by resin provided on the solid bottom layer. In order to prevent the resin from flowing into a slit between the lateral wall of the window and the second unit inserted therein, a protective film is arranged to cover the edge of the rear face of the first unit and a zone peripheral to the aperture in the solid layer. The electronic device or assembly is first formed and then placed on the bottom solid layer. The protective film is arranged between the two units after or when the electronic device or assembly is formed.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: March 26, 2013
    Assignee: NagraID S.A.
    Inventor: François Droz
  • Publication number: 20130068603
    Abstract: This invention relates to a touch panel using a metal thin film and a method of manufacturing the same. The touch panel according to an embodiment of the invention includes a transparent substrate; a metal pattern unit formed under the transparent substrate and including at least one first pattern electrode and a first wiring electrode which is connected to the first pattern electrode; and a film substrate combined with the transparent substrate having the metal pattern unit, and including at least one second pattern electrode and a second wiring electrode which is connected to the second pattern electrode, wherein the first pattern electrode is in the form of a mesh of thin wires.
    Type: Application
    Filed: May 3, 2011
    Publication date: March 21, 2013
    Applicant: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventor: Min Gi Kwak
  • Patent number: 8397379
    Abstract: A method for fabricating a ceramic substrate includes: preparing a ceramic substrate; disposing a metal mask having a plurality of holes at an upper side of the ceramic substrate; and injecting a polyimide resin into the holes of the metal mask to form a polyimide thin film on the ceramic substrate. A thin film is formed on a ceramic substrate in a simpler manner, so the fabrication cost can be reduced and a fixed time can be shortened, thus increasing the efficiency of a product.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: March 19, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Je Hong Sung, Yoon Hyuck Choi
  • Patent number: 8397378
    Abstract: A method of manufacturing an insulating sheet, a method of manufacturing a copper clad laminate, and a method of manufacturing a printed circuit board, as well as a printed circuit board manufactured using these methods are disclosed. The method of manufacturing an insulating sheet can include: forming a thermoplastic reinforcement material, which includes fibers secured by a thermoplastic polymer binder, and in which pores are formed; forming a thermoplastic resin layer such that the thermoplastic reinforcement material is impregnated with a thermoplastic resin; and hot pressing the thermoplastic reinforcement material and the thermoplastic resin layer. This method can be utilized to manufacture an insulating sheet, which has a low rate of moisture absorption and superb electrical properties, including a low dielectric constant (Dk) and low dielectric loss (Df), and in which the fibers can readily be impregnated with the resin.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: March 19, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Keung-Jin Sohn, Joon-Sik Shin, Joung-Gul Ryu, Jung-Hwan Park, Ho-Sik Park, Sang-Youp Lee
  • Publication number: 20130061469
    Abstract: A method of forming a structure such as a print head or a printer including the print head having a flex circuit with a plurality of deformed (i.e., contoured, shaped, or embossed) conductive flexible printed circuit (flex circuit) pads. A plurality of flex circuit pads can be aligned with a plurality of piezoelectric elements of an ink jet print head. Within a press such as a stack press, pressure can be applied to deform the plurality of flex circuit pads and to establish electrical contact between the plurality of flex circuit pads and the plurality of piezoelectric elements. Deforming the plurality of flex circuit pads in situ during the press operation can reduce costs by eliminating a separate embossing stage performed during the manufacture or formation of the flex circuit.
    Type: Application
    Filed: September 14, 2011
    Publication date: March 14, 2013
    Applicant: Xerox Corporation
    Inventors: Bryan R. Dolan, Peter J. Nystrom
  • Patent number: 8393077
    Abstract: A method for fabrication of passive electronic components includes disposing a sacrificial layer on a carrier and forming a curable resin layer on top of the sacrificial layer and patterning the curable resin to form a cured resin template having multiple pattern levels. A metal material is deposited into the first pattern level to form a first structure. A dielectric material is then formed on exposed portions of the first structure. A nonselective subtractive process is used to expose the sacrificial layer in a bottom of the second pattern level and metal material is deposited into the second pattern level and built up to include a portion which crosses over the dielectric material.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: March 12, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lorraine Byrne, Kevin Dooley, David Fitzpatrick
  • Patent number: 8393076
    Abstract: A component is electrically connected to an electrical circuit by a method that comprises forming an intermediate product in which the component (3) is disposed on one side of an electrically conducting sheet (1) so that at least one pair of contacts (4) of the component are electrically connected by the sheet and in which a patterned etch resist layer (2) is disposed on the other side of the sheet in registration with the component on said one side of the sheet, and then exposing the other side of the sheet to an etching agent and thereby removing areas of the sheet to leave the electrical circuit and also to remove the electrical interconnection between the contacts.
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: March 12, 2013
    Assignee: Conductive Inkjet Technology Limited
    Inventor: Philip Gareth Bentley
  • Patent number: 8393078
    Abstract: In a method of manufacturing a circuit board, a conductive paste is filled in a first hole formed on a first prepreg having both sides to which a first protective film is caused to stick so that a first circuit board is manufactured. A fiber piece housing paste obtained by mixing a fiber piece is recovered to obtain a recovery paste; filtration is carried out through a filter; a solvent or the like is added; and a viscosity, a composition ratio or the like is adjusted so that a reuse paste is fabricated. The reuse paste is filled in a second hole formed on a second prepreg having both sides to which a second protective film is caused to stick.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Tsuyoshi Himori, Masaaki Katsumata, Toshikazu Kondou
  • Patent number: 8395056
    Abstract: A multilayer printed wiring board (11) is composed of a plurality of printed wiring boards (21a and 21b) each having wiring on its both sides, and a relaxing connection layer (15) for interconnecting the printed wiring boards (21a and 21b). The relaxing connection layer (15) contains an inorganic filler, a thermosetting resin, and a reliever for relieving internal stress. The multilayer printed wiring board (11) is prevented from warpage by making the relaxing connection layer (15) disposed inside it absorb internal stress caused by heating and cooling in a solder reflow process or other processes.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Tadashi Nakamura, Fumio Echigo, Masaaki Katsumata
  • Patent number: 8387239
    Abstract: An embedded circuit substrate comprising: a core structure having a first surface and a second surface opposite to each other; a first patterned conductive layer disposed on the first surface and embedded in the core structure; a second patterned conductive layer disposed on the second surface and embedded in the core structure; and a plurality of conductive blocks disposed in the core structure for conducting the first patterned conductive layer and the second patterned conductive layer is provided. Furthermore, a manufacturing method of an embedded circuit substrate is also provided.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: March 5, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Hao Wang, Ming-Chiang Lee
  • Publication number: 20130050971
    Abstract: The present invention provides a laminate printed board having a novel structure that is able to ensure alignment accuracy of the interboard terminals soldered to one printed board and that is also able to achieve a simplification of the process of soldering the interboard terminals. Through-hole lines in which a plurality of through-holes extend in lines are formed on a first printed board. Additionally, a press-fitting fastener hole is formed within the through-hole lines and a first end of an interboard terminal is press-fitted and fastened to the press-fitting fastener hole. Additionally, first ends of others of the interboard terminals are inserted through and flow soldered to through-holes on the first printed board.
    Type: Application
    Filed: July 17, 2012
    Publication date: February 28, 2013
    Applicant: SUMITOMO WIRING SYSTEMS, LTD.,
    Inventor: Tsuyoshi SAKITA
  • Publication number: 20130050949
    Abstract: A circuit module can include a substrate, photonic conversion units placed on the substrate; and a retention assembly. The retention assembly can include a heat sink in thermal contact with the photonic conversion units and a fastener. The fastener can be mechanically coupled to both the substrate and the heat sink, and configured to press the heat sink against the photonic conversion units. The plurality of photonic conversion units are removably secured to the substrate by the retention assembly without the use of a bonding material.
    Type: Application
    Filed: April 30, 2010
    Publication date: February 28, 2013
    Inventor: Terrel Morris
  • Publication number: 20130053671
    Abstract: Containment devices and methods of manufacture and assembly are provided. In an embodiment, the device includes at least one microchip element, which includes a containment reservoir that can be electrically activated to open, and a first electronic printed circuit board (PCB) which comprises a biocompatible substrate. The first PCB may have a first side on which one or more electronic components are fixed and an opposed second side on which the microchip element is fixed in electrical connection to the one or more electronic components. The device may further include a second PCB and a housing ring securing the first PCB together with the second PCB. The microchip element may include a plurality of containment reservoirs, which may be microreservoirs, and/or which may contain a drug formulation or a sensor element.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 28, 2013
    Applicant: MICROCHIPS, INC.
    Inventor: Robert Farra
  • Patent number: 8383950
    Abstract: A first patterned etch stop layer and a first patterned conductor layer are laminated by a dielectric material to a second patterned etch stop layer and a second patterned conductor layer. As the etch stop metal of the first and second patterned etch stop layers is selectively etchable compared to a conductor metal of the first and second patterned conductor layers, the first and second patterned etch stop layers provide an etch stop for substrate formation etch processes. In this manner, etching of the first and second patterned conductor layers is avoided insuring that impedance is controlled to within tight tolerance.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: February 26, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, Robert F. Darveaux
  • Patent number: 8381394
    Abstract: A circuit board has an embedded electronic component such as an integrated circuit chip with a wafer level chip size package. A via hole extends through the electronic component. Another via hole extends through the substrate or prepreg on which the electronic component is mounted inside the circuit board. Conductors in the via holes enable a terminal on the surface of the electronic component to be electrically connected to a wiring pattern or another electronic component on the opposite side of the substrate or prepreg. Routing the connection through the electronic component itself saves space and reduces the length of the connection.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: February 26, 2013
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yoshinori Shizuno
  • Patent number: 8383948
    Abstract: A flex-rigid wiring board includes a flexible substrate having a first surface and a second surface on the opposite side of the first surface, a first conductive pattern formed on the first surface of the flexible substrate, a second conductive pattern formed on the second surface of the flexible substrate, and a conductor made of a conductive paste and formed in a first hole penetrating through the flexible substrate such that the first conductive pattern and the second conductive pattern are electrically connected to each other.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: February 26, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Masakazu Aoyama, Teruyuki Ishihara, Noboru Shibita
  • Publication number: 20130044448
    Abstract: A method for mounting a component to an electric circuit board (10), comprising: providing at least one cavity in the electric circuit board; arranging the component in the at least one cavity; and generating in the at least one cavity mechanical and/or electrical connections simultaneously to at least two locations of the component. A method for making an electric circuit board arrangement comprising at least one electric circuit board, comprising: providing at least one cavity and/or through-hole in the at least one electric circuit board; arranging the component in the at least one cavity and/or in a through-hole, the component being mechanically and/or electrically connectable by contact in the at least one cavity and/or through-hole; and stacking one or more electric circuit boards on top of the at least one electric circuit board and coupling the electric circuit boards by solderable terminal pads of the component.
    Type: Application
    Filed: July 24, 2012
    Publication date: February 21, 2013
    Applicant: BIOTRONIK SE & Co. KG
    Inventor: Anthony A. Primavera
  • Publication number: 20130043865
    Abstract: A current measurement is implemented with the aid of magnetoresistive sensors or Hall sensors. The sensors are arranged on one or two printed circuit boards, which provide a passage when coupled to one another, through which passage an electrical line passes. The printed circuit boards can also be fitted retrospectively to electrical lines, with the result that the electrical lines need not be interrupted.
    Type: Application
    Filed: August 14, 2012
    Publication date: February 21, 2013
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Jens MAKUTH, Dirk SCHEIBNER, Jürgen SCHIMMER
  • Patent number: 8375575
    Abstract: A lightweight radio/CD player for vehicular application is virtually “fastenerless” and includes a fold-up case formed of polymer based material that is molded to provide details to accept audio devices such as playback mechanisms (if desired) and radio receivers, as well as the circuit boards required for electrical control and display. The case is of composite structure, including an insert molded electrically conductive wire mesh screen that has been pre-formed to contour with the molding operation. The wire mesh provides EMC, RFI, BCI and ESD shielding and grounding of the circuit boards via exposed wire mesh pads and adjacent ground clips. Side wall closure members are extruded of aluminum defining self-engaging attachment features for affixing to the case, providing electrical self-grounding with the wire screen and thermal grounding with internal power devices.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: February 19, 2013
    Assignee: Delphi Technologies, Inc.
    Inventors: Chris R. Snider, Mark A. Jackson
  • Patent number: 8375574
    Abstract: A sensor, and methods of making, for determining the concentration of an analyte, such as glucose, in a biological fluid such as blood or serum, using techniques such as coulometry, amperometry, and potentiometry. The sensor includes a working electrode and a counter electrode, and may include an insertion monitoring trace to determine correct positioning of the sensor in a connector. The sensor is calibration-adjusted, eliminating the need for a user to enter a calibration code or for the meter to read a calibration code.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: February 19, 2013
    Assignee: Abbott Diabetes Care Inc.
    Inventors: Yi Wang, Benjamin J. Feldman
  • Patent number: 8375577
    Abstract: The present inventions relate to methods and arrangements for using a thin foil to form electrical interconnects in an integrated circuit package. In one embodiment, a foil carrier structure is formed by ultrasonically bonding portions of a conductive foil to a metallic carrier. The bonded portions define panels in the foil carrier structure. In some embodiments, the foil carrier structure is cut to form multiple isolated panels that are sealed along their peripheries. Each isolated panel may be approximately the size of a conventional leadframe strip or panel. As a result, existing packaging equipment may be used to add dice, bonding wires and molding material to the panel. The ultrasonic welding helps prevent unwanted substances from penetrating the foil carrier structure during such processing steps. After the carrier portion of the molded foil carrier structure is removed, the structure is singulated into integrated circuit packages.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: February 19, 2013
    Assignee: National Semiconductor Corporation
    Inventors: Will Wong, Nghia Thuc Tu, Jaime Bayan, David Chin
  • Patent number: 8375576
    Abstract: A method for manufacturing a wafer scale heat slug system includes: dicing an integrated circuit from a semiconductor wafer; forming a heat slug blank equivalent in size to the semiconductor wafer; dicing the heat slug blank to produce a heat slug equivalent in size to the integrated circuit; attaching the integrated circuit to a substrate; attaching the heat slug to the integrated circuit; and encapsulating the integrated circuit.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: February 19, 2013
    Assignee: STATS Chippac Ltd.
    Inventor: Hyeog Chan Kwon
  • Patent number: 8371022
    Abstract: A method (100) for assembling a portable device configured with an energy storage device, is disclosed. The method (100) can include: providing (105) a portable device with a controller configured to control the operations of the portable device; configuring (110) the portable device with a multi-mode switch including a temporary active mode configured for simplified testing, a temporarily inactive mode configured for minimizing power drain, and a permanent active mode for normal user operation; and controlling (115) the multi-mode switch from outside the portable device. The method (100) can help to prolong the useful shelf life of the device and can help to simplify testing and calibrating before shipping.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: February 12, 2013
    Assignee: Motorola Mobility LLC
    Inventors: Ryan P Rye, William S Doolan
  • Patent number: 8365398
    Abstract: Using developed photo-resist materials at the side walls of silicon substrates, the preferred embodiments of the present invention improve alignment accuracy of stacked substrates. Such alignment accuracy improves the area efficiency of side-wall connections as well as through-hole connections. The parasitic impedances of stacked substrate connections are also improved.
    Type: Grant
    Filed: April 10, 2011
    Date of Patent: February 5, 2013
    Inventor: Jeng-Jye Shau
  • Patent number: 8365373
    Abstract: Though the initial concept of the face-mounted resonator was ahead of fabrication technology, the solidly-mounted resonator (SMR) is now a practical resonator design yielding high Qs in a space-efficient and robust mounting configuration. An agile tunable piezoelectric SMR is now provided with a resonator and alternating stacks of high mechanical impedance and low mechanical impedance, piezoelectric layers advantageously stacked on a substrate with the piezoelectric layers connected to an adaptive circuit that alternates with an external electrical impedance having values anywhere between an open circuit and a short circuit.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: February 5, 2013
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Arthur Ballato
  • Patent number: 8365397
    Abstract: A sub-component circuit board may be electrically and mechanically connected to a higher order circuit board using one or more leads extending from a lead frame embedded in the sub-component circuit board. The sub-component board is produced as a layered assembly with the embedded lead frame at the core. One or more dielectric layers and one or more circuitry layers are provided over the lead frame and then bonded using heat and pressure. Apertures in the dielectric and circuitry layers define a perimeter of the circuit board where the leads of the lead frame are exposed. The lead frame connects to the circuitry layer(s) using plated vias.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: February 5, 2013
    Assignee: EM Research, Inc.
    Inventor: Mark Garrison
  • Patent number: 8365400
    Abstract: A circuit board structure comprising a composite layer, a fine circuit pattern and a patterned conductive layer is provided. The fine circuit pattern is inlaid in the composite layer, and the patterned conductive layer is disposed on a surface of the composite layer. After fine circuit grooves are formed on the surface of the composite layer, conductive material is filled into the grooves to form the fine circuit pattern inlaid in the composite layer. Since this fine circuit pattern has relatively fine line width and spacing, the circuit board structure has a higher wiring density.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: February 5, 2013
    Assignee: Unimicron Technology Corp.
    Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang, David C. H. Cheng
  • Publication number: 20130025925
    Abstract: A wiring board has a first rigid wiring board having an accommodation portion, a second rigid wiring board accommodated in the accommodation portion, an insulation layer formed over the first rigid wiring board and the second rigid wiring board, and a joint conductor extending in a direction from a first surface of the first rigid wiring board to a second surface of the first rigid wiring board on the opposite side of the first surface of the first rigid wiring board such that the joint conductor is penetrating through the boundary between the first rigid wiring board and the second rigid wiring board and joining the first rigid wiring board and the second rigid wiring board.
    Type: Application
    Filed: May 30, 2012
    Publication date: January 31, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Nobuyuki Naganuma, Michimasa Takahashi
  • Publication number: 20130025914
    Abstract: A wiring board has wiring board has a first rigid wiring board having an accommodation portion and a conductor, a second rigid wiring board accommodated in the accommodation portion and having a conductor electrically connected to the conductor in the first rigid wiring board, and an insulation layer formed over the first rigid wiring board and the second rigid wiring board. The first rigid wiring board has a wall surface defining the accommodation portion and having a concavo-convex shaped portion, and the second rigid wiring board has a side surface facing against the wall surface of the first rigid wiring board and having a concavo-convex shaped portion such that the concavo-convex shaped portion of the side surface of the second rigid wiring board engages with the concavo-convex shaped portion of the wall surface of the first rigid wiring board.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 31, 2013
    Applicant: IBIDEN Co., Ltd.
    Inventors: Nobuyuki Naganuma, Michimasa Takahashi
  • Patent number: 8361267
    Abstract: An adhesive chuck, and an apparatus and method for assembling substrates using the same are disclosed. The apparatus comprises a chamber, a first adhesive chuck inside the chamber and having a plurality of adhesive protrusions to adhere to a first substrate conveyed from an outside into the chamber via an intermolecular attractive force, and a driving unit to move the first substrate adhered to the first adhesive chuck and a second substrate toward each other to be compressed and assembled to each other. The apparatus can achieve adhesion and separation of a substrate with minimal power consumption, enhancing an to operating efficiency. Additionally, the adhesive chuck can overcome a problem of spot generation on a display panel caused by remaining static electricity. Furthermore, since the adhesive chuck is almost free from a problem of electric instability, it can exhibit high stability and efficiency and can be fabricated at lower costs.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: January 29, 2013
    Assignee: Advanced Display Process Engineering Co., Ltd.
    Inventor: Seok-Hee Shim
  • Patent number: 8362368
    Abstract: The system contains a substrate having at least one electrical trace formed thereon. An opening is formed in the substrate. The opening comprising at least one wall. An electrically conductive fill is formed in the opening. The electrically conductive fill is chemically bonded to the wall and electrically contacted with the electrical trace.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: January 29, 2013
    Assignee: Ultrasource, Inc.
    Inventors: Michael Casper, Craig Hare, Adam Cook
  • Patent number: 8359739
    Abstract: In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a portion of the metallic structure for each component area to be shielded is then exposed through the body by a cutting, drilling, or like operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed portion of the metallic structures.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: January 29, 2013
    Assignee: RF Micro Devices, Inc.
    Inventors: Dan Carey, Jeffrey Scott Walker, Gary D. Messner
  • Patent number: 8359738
    Abstract: A method of manufacturing a wiring board including forming a first wiring board, the forming of the first board including forming a substrate, forming a first insulation layer on a surface of the substrate and a second insulating layer on the opposite surface of the substrate, forming a via in one of the layers, and cutting the first layer in a first area and cutting the second layer in a second area offset from the first area to form a first substrate laminated to a second substrate with the substrate interposed therebetween, the second substrate having a smaller mounting area than that of the first substrate such that the first substrate extends beyond edge of the second substrate, connecting a pliable member to the substrate, and connecting the member to a second wiring board to connect the first and second boards. One or more insulation layers are a non-pliable layer.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: January 29, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Michimasa Takahashi, Masakazu Aoyama
  • Publication number: 20130021739
    Abstract: Multi-layer printed circuit boards (PCB) with power plane islands to isolate noise coupling are provided. In addition, methods and computer program products for manufacturing multi-layer PCBs with power plane islands to isolate noise coupling are provided. Embodiments include a PCB comprising a first power plane coupled to a power supply, the first power plane within a layer of the PCB; a second power plane and a third power plane, the second power plane and the third power plane within another layer of the PCB, the second power plane and the third power plane separated from each other within the other layer of the PCB; and a via bridge structure connecting the first power plane to both the second power plane and the third power plane.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tae Hong Kim, Sang Y. Lee
  • Publication number: 20130021754
    Abstract: A circuit board device includes a heat dissipation housing, a circuit board, and a heat conductive adhesive. The heat dissipation housing includes a panel, and at least one end plate connected to one end of the panel and formed with a retaining groove. The circuit board is disposed in the heat dissipation housing spaced apart from the panel and has one end inserted into the retaining groove. The heat conductive adhesive is adhered to the panel and the end plate, and covers the circuit board.
    Type: Application
    Filed: June 7, 2012
    Publication date: January 24, 2013
    Applicants: LITE-ON TECHNOLOGY CORP., SILITEK ELECTRONIC (GUANGZHOU) CO., LTD.
    Inventors: YI-JEN LU, SHUO-JEN SHIEH, TSUNG-PO HSU
  • Patent number: 8356405
    Abstract: Disclosed herein is a method of manufacturing a printed circuit board, including: providing a carrier including an insulation layer, first metal foils formed on both sides of the insulation layer, adhesive layers respectively formed on the first metal foils and made of a thermoplastic resin, and second metal foils respectively formed on the adhesive layers; applying resists having openings for forming metal posts onto both sides of the carrier; forming metal plating layers for forming the metal posts in the openings; grinding surfaces of the resists; removing the resist and forming insulation layers on both sides of the carrier; and grinding surfaces of the insulation layers. The method is advantageous in that both sides of a carrier are simultaneously layered, it is possible to prevent a substrate from warping during the process of manufacturing the printed circuit board.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: January 22, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chang Gun Oh, Ho Sik Park, Tae Kyun Bae
  • Publication number: 20130015936
    Abstract: A converter includes a main board, at least one first connecting member, and a magnetic component. The first connecting member is defined on a surface of the main board. The magnetic component is assembled with the main board. The magnetic component includes a winding board, at least one second connecting member and a core. The second connecting member is defined on a surface of the winding board, and the second connecting member is in electrical contact with the first connecting member. The core is assembled with the winding board. A method for manufacturing a converter is also disclosed herein.
    Type: Application
    Filed: June 13, 2012
    Publication date: January 17, 2013
    Applicant: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventor: Quansong Luo
  • Publication number: 20130014982
    Abstract: A wiring board has a first wiring board having a first solder-resist layer, a second wiring board connected to the first wiring board and positioned in a first opening portion formed in the first solder-resist layer of the first wiring board, and a third wiring board connected to the first wiring board and positioned in a second opening portion formed in the first solder-resist layer of the first wiring board such that the second wiring board and the third wiring board are on the same side of the first wiring board. The first opening portion of the first wiring board and the second opening portion of the first wiring board form either a common opening portion accommodating the second and third wiring boards in the first solder-resist layer or separate opening portions separately accommodating the second wiring board and the third wiring board in the first solder-resist layer.
    Type: Application
    Filed: May 30, 2012
    Publication date: January 17, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Hiroshi SEGAWA, Nobuyuki NAGANUMA, Michimasa TAKAHASHI, Teruyuki ISHIHARA
  • Patent number: 8354596
    Abstract: A wiring board including a main substrate including a base material and having an opening portion, and a flex-rigid printed wiring board connected to the main substrate in the opening portion of the main substrate and including a rigid substrate and a flexible substrate, the rigid substrate including a non-flexible base material, the flexible substrate including a flexible base material.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 15, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Michimasa Takahashi
  • Publication number: 20130008703
    Abstract: In a method for integrating a component (3) into a printed circuit board, the following steps are provided: providing two completed printed circuit board elements (1, 4), which more particularly consist of a plurality of interconnected plies or layers (6, 7, 8), wherein at least one printed circuit board element (4) has a cutout or depression (10), arranging the component (3) to be integrated on one of the printed circuit board elements (1) or in the cutout of the at least one printed circuit board element, and connecting the printed circuit board elements (1, 4) with the component (3) being accommodated in the cutout (10), as a result of which it is possible to obtain secure and reliable accommodation of a component or sensor (3) in a printed circuit board. Furthermore, a printed circuit board of this type comprising an electronic component (3) integrated therein is provided.
    Type: Application
    Filed: April 11, 2011
    Publication date: January 10, 2013
    Inventors: Johannes Stahr, Markus Leitgeb
  • Publication number: 20130008022
    Abstract: An electrical current sensor device includes a first printed circuit board assembly, a second printed circuit board assembly positioned opposite to the first printed circuit board assembly, and a holder holding the first and second printed circuit board assemblies and providing a passage to allow an electrical conductor to pass through. The first printed circuit board assembly includes a first sensing circuit having a first element pair that includes two magnetoresistive elements with a first pinning direction, the second printed circuit board assembly comprises a second sensing circuit with a second element pair that includes having two magnetoresistive elements with a second pinning direction that is opposite to the first pinning direction, and the first and second pinning directions are perpendicular to a current direction of a current passing through the electrical conductor, the first sensing circuit electrically connects with the second sensing circuit to form a Wheatstone bridge circuit.
    Type: Application
    Filed: September 27, 2011
    Publication date: January 10, 2013
    Applicant: SAE Magnetics (H.K.) Ltd.
    Inventors: Ming gao YAO, Koyu Yamanoi, Wei Xiong