Assembling Bases Patents (Class 29/830)
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Publication number: 20140063804Abstract: Modular multichannel light sources connector systems and methods are provided. A lighting assembly includes substrates, each with a respective plurality of ports and conductive path configurations. Each path configuration includes a plurality of conductive paths between the respective plurality of ports. At least two conductive path configurations are the same. A connector couples one of a plurality of first ports on a first substrate to one of a plurality of second ports on a second substrate. A multichannel power supply's outputs are each coupled to an associated conductive path on the first substrate. A first light source is coupled to two conductive paths on the first substrate, and to a first output. A second light source is coupled to two conductive paths on the second substrate, corresponding to the conductive paths on the first substrate, and to a second output, different from the first output.Type: ApplicationFiled: June 24, 2013Publication date: March 6, 2014Applicant: OSRAM SYLVANIA INC.Inventors: Nicholas Lekatsas, Biju Antony, David Lidrbauch
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Publication number: 20140062713Abstract: The present application relates to a light beacon, light beacon assembly, and methods of its construction. In one aspect, a light beacon assembly includes a housing including a base and a lens cooperating to enclose an interior volume, the lens having a generally cylindrical shape. The assembly also includes a plurality of circuit boards positioned within the interior volume, where each of the plurality of circuit boards having a conductive tab extending from a first side, a conductive tab receiver near a second side, and a light emitting diode mounted thereon. The plurality of circuit boards are each positioned within the interior volume and extend perpendicularly from the base such that the tab of each circuit board is received at the tab receiver of an adjacent circuit board. The plurality of circuit boards are interconnected to form a structure having light emitting diodes oriented outwardly toward the lens.Type: ApplicationFiled: August 31, 2012Publication date: March 6, 2014Applicant: Federal Signal CorporationInventors: Tim J. Skertich, JR., Duane P. Belitz, Robert R. March, JR.
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Patent number: 8661664Abstract: Techniques for improving the conductivity of copper (Cu)-filled vias are provided. In one aspect, a method of fabricating a Cu-filled via is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A thin seed Cu layer is deposited on the Ru layer. A first anneal is performed to increase a grain size of the seed Cu layer. The via is filled with additional Cu. A second anneal is performed to increase the grain size of the additional Cu.Type: GrantFiled: July 19, 2010Date of Patent: March 4, 2014Assignee: International Business Machines CorporationInventors: Fenton Read McFeely, Chih-Chao Yang
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Patent number: 8661666Abstract: Applicant has disclosed an improved method and apparatus for installing electrical junction boxes in embedded concrete construction applications. In the preferred embodiment, a first box (with at least one attached conduit) is embedded in the bottom of a concrete deck at pour, wherein the box has an open bottom covered during the pour. After pouring, the cover is removed to expose the open bottom, through a plane of the deck, without having to break through the concrete. A second box, with an open top, is lifted up and fastened (preferably, screwed) to the embedded first box to complete a preferred electrical junction box. The second box is designed to be exposed to accept surface mount or exposed wiring methods. There is a passage between the first and second boxes for accepting wire pulled through the conduit(s).Type: GrantFiled: October 7, 2010Date of Patent: March 4, 2014Inventor: John K. Grady
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Patent number: 8664537Abstract: A printed circuit board having at least two spaced apart conductive planes. A plurality of vias extend between the two spaced apart conductive planes with the vias being electrically connected to a selected one of the two conductive planes in an alternating pattern. A differential electrical signal is connectable to the conductive planes so that the vias are alternately energized by the differential electrical signal when the differential electrical signal is connected to the conductive planes.Type: GrantFiled: December 21, 2009Date of Patent: March 4, 2014Assignee: TRW Automotive U.S. LLCInventors: Kenneth McIlquham, Niyant Patel
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Patent number: 8661659Abstract: Provided is a method of producing a circuit board that can stably provide normal circuit boards by preventing the solder detachment and the generation of needle-like crystals during the formation of solder bumps. The method of producing a circuit board includes steps of forming an adhesive layer by applying an adhesiveness-imparting compound to the surface of a terminal of the circuit board; attaching solder particles onto the adhesive layer; applying an activator that includes a hydrohalic acid salt of an organic base to the solder particles and fixing the solder particles by heating the circuit board to which the solder particles have been attached at a temperature equal to or lower than the melting point of the solder; applying a flux to the circuit board to which the solder particles have been fixed; and melting the solder particles by heating the circuit board.Type: GrantFiled: April 12, 2010Date of Patent: March 4, 2014Assignee: Showa Denko K.K.Inventors: Takashi Shoji, Takekazu Sakai
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Patent number: 8661663Abstract: A neural probe includes a probe, wherein a tip of the probe is tapered; an insulating layer covering the probe, and one or more metallic traces, wherein the metallic traces are provide along the length of the probe. The probe also includes one or more contacts provided on the tip of the probe, wherein each of the one or more metallic traces terminates at the one or more contacts, and the one or more contacts provide an array of nanosized metallic pillars. The neural probe may also incorporate a lightguide. The lightguide may include an insulating layer providing a first cladding layer on the probe, a core layer provided on top of the first cladding layer, wherein the metallic traces and contacts are provided in the core layer with a core material, and a second cladding layer provided on top of the core layer.Type: GrantFiled: February 22, 2011Date of Patent: March 4, 2014Assignee: University of HoustonInventors: John C. Wolfe, Wei-Chuan Shih
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Publication number: 20140056560Abstract: Systems and methods are provided that enable a first bank, or array, of multi-optical fiber connector modules disposed in a plug that is mounted on a first structure to be simultaneously blind mated with a second bank of multi-optical fiber connector modules disposed on a receptacle that is mounted on a second structure. As the first and second structures are brought into engagement with one another, passive coarse alignment features on the plug and on the receptacle coarsely align the respective connector modules with one another. Then, as the respective connector modules begin to come into contact with one another, passive fine alignment features on the respective connector modules engage one another to finely align the respective connector modules such that their optical pathways are brought into precise optical alignment with one another.Type: ApplicationFiled: August 24, 2012Publication date: February 27, 2014Applicant: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.Inventor: Laurence R. McColloch
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Patent number: 8656584Abstract: Method of fabricating an electro-mechanical microsystem provided with at least one fixed part comprising a bar, and at least one mobile part in rotation around at least one portion of said bar, the method comprising the steps of: a) formation, inside a layer of at least one given material resting on a support, of at least one bar, b) formation around the bar of at least one first graphene sheet, and of a least one second graphene sheet, separated from the first sheet and mobile with respect to the first sheet.Type: GrantFiled: September 17, 2010Date of Patent: February 25, 2014Assignee: Commissariat à l'énergie atomique et aux énergies alternativesInventors: Jean-Christophe Gabriel, Philippe Andreucci, Thomas Ernst, Thierry Poiroux
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Patent number: 8656581Abstract: A method for fabricating a circuit apparatus includes forming a wiring layer, a conductive layer, and a first insulating layer on the wiring substrate, removing the conductive layer in an opening of the first insulating layer so as to expose the wiring layer, forming a gold plating layer on the wiring layer, removing the first insulating layer and the conductive layer, forming a second insulating layer on the wiring substrate, the second insulating layer having an opening through which the gold plating and adjacent wiring layers are exposed, and electrically connecting a circuit element to the gold plating layer.Type: GrantFiled: September 21, 2009Date of Patent: February 25, 2014Assignee: Sanyo Electric Co., Ltd.Inventors: Makoto Murai, Yasuhiro Kohara, Ryosuke Usui
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Patent number: 8658911Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.Type: GrantFiled: April 17, 2012Date of Patent: February 25, 2014Assignee: International Business Machines CorporationInventors: Moises Cases, Tae Hong Kim, Rohan U. Mandrekar, Nusrat I. Sherali
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Patent number: 8650751Abstract: A sensor utilizing a non-leachable or diffusible redox mediator is described. The sensor includes a sample chamber to hold a sample in electrolytic contact with a working electrode, and in at least some instances, the sensor also contains a non-leachable or a diffusible second electron transfer agent. The sensor and/or the methods used produce a sensor signal in response to the analyte that can be distinguished from a background signal caused by the mediator. The invention can be used to determine the concentration of a biomolecule, such as glucose or lactate, in a biological fluid, such as blood or serum, using techniques such as coulometry, amperometry; and potentiometry. An enzyme capable of catalyzing the electrooxidation or electroreduction of the biomolecule is typically provided as a second electron transfer agent.Type: GrantFiled: September 29, 2009Date of Patent: February 18, 2014Assignee: Abbott Diabetes Care Inc.Inventors: Benjamin J. Feldman, Adam Heller, Ephraim Heller, Fei Mao, Joseph A. Vivolo, Jeffery V. Funderburk, Fredric C. Colman, Rajesh Krishnan
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Patent number: 8646175Abstract: A method for making a conductive film exhibiting electric anisotropy comprises forming a nanomaterial on a substrate, the nanomaterial having a cluster of interconnected nanounits, each of which being substantially transverse to the substrate and having one end bonded to the substrate. The method further includes stretching the nanounits along a first direction to remove the nanomaterial from the substrate so as to form a conductive film having strings of interconnected nanounits, where the nanounits of the strings substantially extend in the first direction. A conductive plate and a method for making the same is also disclosed, where the method further comprises attaching the conductive film to a second substrate.Type: GrantFiled: June 29, 2010Date of Patent: February 11, 2014Assignee: Chimei Innolux CorporationInventors: Jeah-Sheng Wu, Jia-Shyong Cheng, Chih-Han Chao
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Publication number: 20140036513Abstract: A lighting device includes a light source component, a circuit board component, and a case component. The circuit board component is configured to supply power to the light source component. The case component houses the circuit board component in an interior of the case component. The circuit board component includes first and second circuit board components. The first circuit board component has a first mounting surface on which a first electronic part is mounted. The second circuit board component has a second mounting surface on which a second electronic part is mounted. The second mounting surface of the second circuit board component overlaps with the first mounting surface of the first circuit board component.Type: ApplicationFiled: July 12, 2013Publication date: February 6, 2014Inventor: Yukikazu NOBATA
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Publication number: 20140036454Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.Type: ApplicationFiled: March 12, 2013Publication date: February 6, 2014Applicant: INVENSAS CORPORATIONInventors: Terrence Caskey, Ilyas Mohammed, Cyprian Emeka Uzoh, Charles G. Woychik, Michael Newman, Pezhman Monadgemi, Reynaldo Co, Ellis Chau, Belgacem Haba
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Patent number: 8641913Abstract: A method includes applying a final etch-resistant material to an in-process substrate so that the final etch-resistant material at least partially covers first microcontact portions integral with the substrate and projecting upwardly from a surface of the substrate, and etching the surface of the substrate so as to leave second microcontact portions below the first microcontact portions and integral therewith, the final etch-resistant material at least partially protecting the first microcontact portions from etching during the further etching step. A microelectronic unit includes a substrate, and a plurality of microcontacts projecting in a vertical direction from the substrate, each microcontact including a base region adjacent the substrate and a tip region remote from the substrate, each microcontact having a horizontal dimension which is a first function of vertical location in the base region and which is a second function of vertical location in the tip region.Type: GrantFiled: March 13, 2007Date of Patent: February 4, 2014Assignee: Tessera, Inc.Inventors: Belgacem Haba, Yoichi Kubota, Teck-Gyu Kang, Jae M. Park
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Patent number: 8642898Abstract: A circuit board structure with capacitors embedded therein and a method for fabricating the same are disclosed. The structure comprises at least two core layers individually comprising a dielectric layer having two opposite surfaces, circuit layers disposed on the outsides of the two opposite surfaces of the dielectric layer, and at least two capacitors embedded respectively on the insides of the two opposite surfaces of the dielectric layer and individually electrically connecting with the circuit layer at the same side; at least one adhesive layer disposed between the core layers to combine the core layers as a core structure; and at least one conductive through hole penetrating the core layers and the adhesive layer, and electrically connecting the circuit layers of the core layers. Accordingly, the present invention can improve the flexibility of circuit layout, and realize parallel connection between the capacitors to provide more capacitance.Type: GrantFiled: August 2, 2012Date of Patent: February 4, 2014Assignee: Unimicron Technology Corp.Inventors: Chung-Cheng Lien, Chih-Kui Yang
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Publication number: 20140029080Abstract: An electrowetting display device includes a first base substrate, a second base substrate facing the first base substrate, an electrowetting layer that includes a first fluid and an electrically conducting second fluid that are immiscible with each other, black partition walls disposed on the first base substrate to partition a display area into pixel areas, and an electronic device that applies a voltage to the electrowetting layer to control the electrowetting layer. The partition walls restrict a flow of at least one of the first fluid or the second fluid.Type: ApplicationFiled: December 3, 2012Publication date: January 30, 2014Applicant: Liquavista B.V.Inventor: Tae Hyung Hwang
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Patent number: 8637777Abstract: A power module substrate having a heatsink, includes: a power module substrate having an insulating substrate having a first face and a second face, a circuit layer formed on the first face, and a metal layer formed on the second face; and a heatsink directly connected to the metal layer, cooling the power module substrate, wherein a ratio B/A is in the range defined by 1.55?B/A?20, where a thickness of the circuit layer is represented as A, and a thickness of the metal layer is represented as B.Type: GrantFiled: March 11, 2009Date of Patent: January 28, 2014Assignee: Mitsubishi Materials CorporationInventors: Hiromasa Hayashi, Takeshi Kitahara, Hiroshi Tonomura, Hiroya Ishizuka, Yoshirou Kuromitsu
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Patent number: 8635761Abstract: A method for printing an electrical conductor on a substrate has been developed. In the method, a reverse image of the electrical conductor pattern is printed on a substrate with an electrically non-conductive material to form a second pattern that exposes a portion of the surface area of the substrate. The entire surface area of the substrate is then covered with an electrically conductive material. The non-conductive material of the reverse image electrically isolates the electrically conductive material covering the reverse image from the electrically conductive material covering the second pattern.Type: GrantFiled: September 19, 2011Date of Patent: January 28, 2014Assignee: Xerox CorporationInventor: Yiliang Wu
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Publication number: 20140022752Abstract: Disclosed herein is a circuit board system comprising a carrier circuit board which is essentially planar at least in sections, wherein the carrier circuit board has at least one rigid layer copper clad on one or both sides or provided with conductor tracks, wherein at least one essentially planar circuit board module aligned in parallel with the carrier circuit board is arranged with at least one rigid layer copper clad on one or both sides or provided with conductor tracks, in an associated recess in the carrier circuit board. In particular, the circuit board module is pressed into the recess in the carrier circuit board and the edge of the circuit board module is engaged in a friction-locked manner with the edge of the associated recess to form a press fit.Type: ApplicationFiled: August 30, 2012Publication date: January 23, 2014Inventor: Markus Wille
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Publication number: 20140022751Abstract: An electric circuit apparatus includes: a first-circuit board that includes a first-through-hole, and a first-electrode disposed on a front side of the first-circuit-board; a second-circuit-board that is disposed on a back side of the first-circuit-board, the second-circuit-board including on the front side of the second-circuit-board a second-electrode associated with the first-through-hole; a semiconductor device that is disposed on the front side of the first-circuit-board, the semiconductor device including on a back side a third-electrode-associated with the first-electrode, and a fourth-electrode-associated with the second-electrode; a first-bonding-material that bonds the first-electrode and the-third-electrode; a second-bonding-material that bonds the second-electrode and the fourth-electrode while passing through the first-through-hole; and a support body that is disposed between the first-electrode and the second-circuit-board and that supports the first-circuit-board.Type: ApplicationFiled: May 24, 2013Publication date: January 23, 2014Applicant: FUJITSU LIMITEDInventors: Mamoru Kurashina, Daisuke Mizutani, Taiga Fukumori
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Patent number: 8631565Abstract: A method for manufacturing a solar concentrator cell module assembly within an integrated circuit process, which solar concentrator cell module assembly includes at least one solar device and which solar device includes one printed circuit board and one Fresnel lens. A printed circuit board is assembled according to a pre-defined circuit board base design layout that allows pick and place of a single solar concentrator cell chip onto a circuit board base. Connections are provided for the solar concentrator cell chip in a serialized or a parallelized arrangement on the circuit board base, and a plurality of openings are formed in the circuit board base below a backside of the solar concentrator chip to enable attachment of cooling fingers.Type: GrantFiled: September 3, 2008Date of Patent: January 21, 2014Assignee: International Business Machines CorporationInventors: Christian Becker, Hans-Juergen Eickelmann, Michael Haag, Rainer Klaus Krause, Thorsten Muehge, Markus Schmidt
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Patent number: 8631567Abstract: A method of manufacturing a rigid-flexible printed circuit board, including providing a base substrate in which coverlays are respectively formed on two sides of a flexible copper foil laminate on both sides of which inner circuit patterns are respectively formed; layering insulation layers and copper foil layers on portions of coverlays which are to be a rigid region of the flexible copper foil laminate; forming a via hole in the rigid region, and, simultaneously, forming first windows in the coverlays in a flexible region; forming outer circuit patterns including areas adjacent to the first windows; and applying solder resist in the rigid region to expose portions of the external circuit patterns, where the outer circuit patterns formed in the areas adjacent to the first windows include additional plating portions for covering portions of the coverlays.Type: GrantFiled: March 8, 2010Date of Patent: January 21, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yang Je Lee, Il Woon Shin, Going Sik Kim, Doo Pyo Hong, Ha Il Kim, Dong Gi An
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Publication number: 20140016319Abstract: Discrete flexible pixel assemblies can be hermetically sealed from the environment and can comprise unitary, self-contained replaceable modules which enable efficient, economical production of large scale, free-form electronic displays, signs and lighting effects for outdoor use. The method and means for producing hermetically sealed discrete flexible pixel assemblies can include encapsulation means, exterior encasement means, and cable connector means.Type: ApplicationFiled: September 16, 2013Publication date: January 16, 2014Applicant: Daktronics, Inc.Inventors: Brett David Wendler, Eric Steven Bravek, Erich J. Grebel
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Patent number: 8627559Abstract: A method for manufacturing a Micro-Electro-Mechanical System pressure sensor, including forming a gauge wafer including a diaphragm and a pedestal region. The method includes forming an electrical insulation layer disposed on a second surface of the diaphragm region and forming a plurality of sensing elements patterned on the electrical insulation layer disposed on the second surface in the diaphragm region, forming a cap wafer with a central recess in an inner surface and a plurality of through-wafer embedded vias made of an electrically conductive material in the cap wafer, creating a sealed cavity by coupling the inner recessed surface of the cap wafer to the gauge wafer, such that electrical connections from the sensing elements come out to an outer surface of the cap wafer through the vias, and attaching a spacer wafer with a central aperture to the pedestal region with the central aperture aligned to the diaphragm region.Type: GrantFiled: September 14, 2012Date of Patent: January 14, 2014Assignee: S3C, Inc.Inventors: James Tjanmeng Suminto, Mohammad Yunus
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Patent number: 8621750Abstract: An electrical interconnect has an adhesive layer in which is formed an array of apertures, the apertures being of non-circular shape. An electrical circuit apparatus has a first circuit having at least one electrical contact, a second circuit having at least one electrical contact aligned to the electrical contact of the first circuit, and a standoff structure between the first and second circuits having at least one aperture aligned to one electrical contact of the first and second circuits, the aperture being of a non-circular shape.Type: GrantFiled: November 23, 2009Date of Patent: January 7, 2014Assignee: Xerox CorporationInventors: Richard Schmachtenberg, III, John R. Andrews, Bradley J. Gerner, Jonathan R. Brick, Samuel Schultz, Chad J. Slenes
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Patent number: 8621749Abstract: A non-deleterious method for producing a continuous conductive circuit upon a non-conductive substrate can begin with the application of a metallic base layer upon a surface of a non-conductive substrate. A circuit pattern can be created within the metallic base layer based upon a circuit design. The metallic base layer comprising the circuit pattern can be physically separated from the remainder of the metallic base layer on the non-conductive substrate. The region of the non-conductive substrate surface that encloses the circuit pattern can be called the plating region. The remainder of the non-conductive substrate surface can be called the non-plating region. A first metal layer can be added upon the metallic base layer. A second metal layer can be added upon the first metal layer of the plating region. The second metal layer can be electrically conductive and restricted from forming on the first metal layer of the non-plating region.Type: GrantFiled: February 25, 2011Date of Patent: January 7, 2014Assignee: Taiwan Green Point Enterprises Co., LtdInventors: Shen-Hung Yi, Pen-Yi Liao
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Patent number: 8621748Abstract: A manufacturing method of a printed wiring board, including forming a plurality of electrodes on a conductive layer formed on a substrate by a plating method, forming an insulation layer on the electrodes and the conductive layer, removing the substrate from the conductive layer, patterning the conductive layer except for a resistor forming region reserved for forming a resistor, thereby forming an external connection conductive pattern, and forming a resistor in the resistor forming region such that the resistor is separated by a space from the external connection conductive pattern.Type: GrantFiled: October 6, 2009Date of Patent: January 7, 2014Assignee: Ibiden Co., Ltd.Inventors: Michimasa Takahashi, Yukinobu Mikado, Hiroyuki Yanagisawa
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Patent number: 8621746Abstract: A method for making phase change memory is provided. The method includes following steps. A substrate is provided. A plurality of first row electrode leads and the second row electrode leads is located on the substrate. A carbon nanotube layer is applied on the substrate to cover the first row electrode lead and the second row electrode lead. The carbon nanotube layer is patterned to form a plurality of carbon nanotube units located on the second row electrode lead. A phase change layer is applied on the surface of each carbon nanotube unit. A plurality of first electrodes, a plurality of second electrodes, a plurality of first row electrode leads and a plurality of second row electrode leads is located on the substrate.Type: GrantFiled: December 21, 2011Date of Patent: January 7, 2014Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Peng Liu, Qun-Qing Li, Kai-Li Jiang, Shou-Shan Fan
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Patent number: 8615857Abstract: Providing a glass assembly cutting method capable of improving yield by cutting a glass assembly into a predetermined size, providing a package manufacturing method, a package and a piezoelectric vibrator manufactured by the manufacturing method, and an oscillator, an electronic device, and a radio-controlled timepiece. Providing a wafer assembly cutting method of cutting a wafer assembly 60 along a scribe line M?, the method including: a scribing step of irradiating a laser beam having an absorption wavelength of the wafer assembly 60 along the contour line to form the scribe line M? on a lid board wafer 50; and a breaking step of applying a breaking stress along the scribe line M? using a cutting blade to cut the wafer assembly along the scribe line M?, wherein the scribing step involves forming the scribe line M? so that the ratio of a depth dimension D of the scribe line M? to a width dimension W thereof is 0.8 or larger and 6.0 or smaller.Type: GrantFiled: August 27, 2010Date of Patent: December 31, 2013Assignee: Seiko Instruments Inc.Inventor: Masashi Numata
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Patent number: 8613135Abstract: Methods and apparatuses for assembly of a non-planar device based on curved chips are described. Slots may be created as longitudinal openings in the chips to reduce bending stresses to increase allowable degrees of deformation of the chips. The chips may be deformed to a desired deformation within the allowable degrees of deformation via the slots. Holding constraints may be provided on at least a portion of the chips to allow the chips to remain curved according the desired deformation.Type: GrantFiled: November 18, 2011Date of Patent: December 24, 2013Assignee: National Tsing Hua UniversityInventor: Long-Sheng Fan
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Patent number: 8613134Abstract: Disclosed herein is method of operating a piece of surface mount technology manufacturing equipment. The method comprises providing a piece of surface mount technology manufacturing equipment having a first substrate transport track disposed in a first position and a second substrate transport track disposed in a second position, moving the first substrate transport track from the first position to a third position, and moving the second substrate transport track from the second position to the first position.Type: GrantFiled: October 29, 2009Date of Patent: December 24, 2013Assignee: Illinois Tool Works Inc.Inventor: Dennis G. Doyle
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Publication number: 20130337688Abstract: An electrical connector assembly comprises: a metallic housing having a receiving space extending along a longitudinal and two openings respectively formed on top and bottom surfaces thereof and communicated with the receiving space; a pair of flexible printed circuit boards (FPCs) received into the receiving space and arranged in a back-to-back manner. Each of the FPC defines a protuberant portion extending into the corresponding opening. And each of the protuberant portion has a plurality of contacts formed on one side thereof and communicated with an exterior. A pair of supporting pieces are received into the receiving space and attached to another side of the protuberant portion. And a spacer is received into the receiving space and sandwiched between the pair of flexible printed circuit boards and supporting pieces.Type: ApplicationFiled: June 17, 2013Publication date: December 19, 2013Inventors: JUN ZONG, CHI-MING CHEN
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Publication number: 20130333925Abstract: A flexible circuit board for producing a flexible-rigid circuit board composite made of at least one flexible circuit board and at least one rigid circuit board, the at least one flexible circuit board having at least one first planar segment, which interacts as intended in the installed state with at least one second planar segment of the at least one rigid circuit board, wherein the at least one first planar segment comprises at least one flexible connecting element, which is elastically connected to a face of the at least one first planar segment. Furthermore, a flexible-rigid circuit board composite is provided having at least one flexible circuit board, a flexible-rigid circuit board arrangement, and a method and a device for producing a flexible-rigid circuit board composite.Type: ApplicationFiled: June 5, 2013Publication date: December 19, 2013Inventors: Frederik Sporon-Fiedler, Jana Carraway, Michael Henderson
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Publication number: 20130335931Abstract: A surface mount interconnection system provides a method and apparatus for mounting an auxiliary printed circuit board assembly directly to a main printed circuit board assembly without the use of leaded surface mount devices. A linear array of spaced-apart solder pads is arranged on an exposed surface of the substrate of both assemblies, with at least one of solder pad arrays being located adjacent an edge of its associated substrate. A selected plurality of aligned cooperating pairs of solder pads are electrically and mechanically interconnected by a solder ball reflowed to form a joint there between. The solder balls comprise a high melting temperature inner core and a low melting temperature outer solder core.Type: ApplicationFiled: June 15, 2012Publication date: December 19, 2013Applicant: DELPHI TECHNOLOGIES, INC.Inventors: Chris R. Snider, Robert L. Vadas
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Patent number: 8607448Abstract: A printed circuit board having a micro strip line, a printed circuit board having a strip line and a method of manufacturing thereof are disclosed. The printed circuit board having a micro strip line in accordance with an embodiment of the present invention includes a first insulation layer, a signal line buried in one surface of the first insulation layer, a plurality of conductors penetrating through the first insulation layer and being disposed on both sides of the signal line in parallel with the signal line, and a ground layer formed to be electrically connected to the conductor on the other surface of the first insulation layer.Type: GrantFiled: September 15, 2012Date of Patent: December 17, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Heung-Kyu Kim
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Patent number: 8607444Abstract: Improved techniques for forming an electronic device housing in which an outer housing member can be assembled with one or more other housing members of the electronic device are disclosed. The one or more other housing members can together with a thin substrate layer (or thin substrate) form a frame to which the outer housing member can be secured. The thin substrate layer facilitates molding of the one or more other housing members adjacent to the outer housing member. In one embodiment, the outer housing member can be made of glass and the one or more other housing members can be made of a polymer, such as plastic. The substrate layer can, for example, be formed of a polymer or a metal. The resulting electronic device housing can be thin yet be sufficiently strong to be suitable for use in electronic devices, such as portable electronic devices.Type: GrantFiled: September 30, 2010Date of Patent: December 17, 2013Assignee: Apple Inc.Inventors: Daniel W. Jarvis, Stephen Paul Zadesky, Pinida Jan Moolsintong, Tang Yew Tan
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Patent number: 8607443Abstract: A method of manufacturing a connector chip includes preparing a plate-like insulating substrate material with a plurality of through hole rows arranged therein; forming a plurality of first and second base layers on opposite surfaces of the insulating substrate material; forming insulating layers between each two adjoining first base layers and between each two adjoining second base layers; forming third base layers on the one side over edge portions of the first base layers, internal surfaces of the through holes, and edge portions of the second base layers; forming fourth base layers on the other side over edge portions of the first base layers, the internal surfaces of the through holes, and edge portions of the second base layers; cutting the insulating substrate material along a middle of each of the through hole rows; and forming one or more plated layers over the first to fourth base layers.Type: GrantFiled: June 30, 2010Date of Patent: December 17, 2013Assignee: Hokuriku Electric Industry Co., Ltd.Inventors: Shinji Okamoto, Katsumi Takeuchi, Yutaka Nomura
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Publication number: 20130329424Abstract: A lighting device is disclosed that includes one or more master circuit boards configured to power light emitting diodes. The lighting device also includes modular light boards with arrays of light emitting diodes that interchangeably couple to the matched connectors on the master circuit board. The master circuit boards and the modular light boards are positioned within a housing with one or more diffuser lenses. In accordance with the embodiments of the invention, master circuit boards and modular light boards are mounted in a stacked arrangement to emit light from opposed sides of the housing. In further embodiments of the invention, the lighting device includes a controller for independently controlling light output from each master circuit board.Type: ApplicationFiled: July 9, 2012Publication date: December 12, 2013Inventors: Walter Blue Clark, Johannes Dale Toale
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Publication number: 20130329378Abstract: A Universal Serial Bus device includes a PCB module, a plastic package shell and a power module. The PCB module includes a PCB, and a storage chip and a control chip both arranged on the PCB module. The PCB includes opposite front end and rear end, and opposite upper surface and lower surface. The upper surface has a number of contacting portions, and the storage chip and the control chip being arranged on the lower surface. The plastic package shell at least encapsulates the lower surface of the PCB to encapsulate the storage chip and the control chip. The power module is electrically connected to the part of the PCB module where is not encapsulated by the plastic package shell.Type: ApplicationFiled: April 23, 2013Publication date: December 12, 2013Applicant: Gerard Technologies (Suzhou) Co., Ltd.Inventors: Jian-Fei Hou, Jian Xu
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Patent number: 8601657Abstract: In a piezoelectric device and a method of manufacturing thereof, after an ion implanted portion is formed in a piezoelectric single crystal substrate by implantation of hydrogen ions, an interlayer of a metal is formed on a rear surface of the piezoelectric single crystal substrate. In addition, a support member is bonded to the piezoelectric single crystal substrate with the interlayer interposed therebetween. A composite piezoelectric body in which the ion implanted portion is formed is heated at about 450° C. to about 700° C. to oxidize the metal of the interlayer so as to decrease the conductivity thereof. Accordingly, the conductivity of the interlayer is decreased, so that a piezoelectric device having excellent resonance characteristics is provided.Type: GrantFiled: May 17, 2012Date of Patent: December 10, 2013Assignee: Murata Manufacturing Co., Ltd.Inventor: Korekiyo Ito
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Patent number: 8601656Abstract: A method of manufacturing a piezoelectric vibrator according to the invention is a method of manufacturing a piezoelectric vibrator in which a piezoelectric vibrating reed is sealed in a cavity formed between a base substrate and a lid substrate bonded to each other, the method including the steps of: inserting a core portion of a conductive rivet member, which includes a planar head portion and the core portion extending in a direction vertically to the surface of the head portion, into a penetration hole of the base substrate and bringing the head portion of the rivet member into contact with a first surface of the base substrate; attaching a laminate material having elastic properties to the first surface of the base substrate so as to cover the head portion; applying a paste-like glass frit on a second surface of the base substrate and filling the glass frit in the penetration hole; and baking and curing the glass frit.Type: GrantFiled: July 1, 2011Date of Patent: December 10, 2013Assignee: Seiko Instruments Inc.Inventors: Yoichi Funabiki, Masashi Numata, Kazuyoshi Sugama
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Patent number: 8601681Abstract: Disclosed is an optical element to be subjected to a reflow process at high temperatures, wherein cracks or wrinkles can be prevented from occurring in an antireflection film. A method for producing the optical element, and a method for manufacturing an electronic device using the optical element are also disclosed. Specifically disclosed is a method for producing an optical element comprising a base, wherein at least one optical surface is composed of a resin material, and a coating formed on the optical surface of the base and composed of an inorganic material, the optical element being mounted on a substrate together with an electronic component by a reflow process at a temperature Ta. The method is characterized in that the coating is formed at a film-forming temperature Tb of not less than (Ta?60° C.), and a material having a glass transition temperature of not less than 290° C. or a glass transition temperature of not less than (Tb?50° C.) is used as the resin material.Type: GrantFiled: June 25, 2009Date of Patent: December 10, 2013Assignee: Konica Minolta Opto, Inc.Inventors: Akiko Hara, Setsuo Tokuhiro
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Publication number: 20130322043Abstract: An explosion-proof electronic device includes: a first circuit board provided with a first connector on one surface thereof; and a second circuit board provided with a second connector on a surface facing the one surface of the first circuit board, the second connector being fit to the first connector. A packing is attached to a position on the second connector which is away from the surface of the second circuit board, surrounds the outer circumference of the second connector, and extends toward the first circuit board to form a closed space including an interface between the first and second connectors. The space between the first and second circuit boards is filled with a filler with the first and second connectors fit to each other.Type: ApplicationFiled: June 3, 2013Publication date: December 5, 2013Inventor: Takuya TANAKA
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Publication number: 20130319730Abstract: A fabric-type multilayer PCB and a manufacturing method thereof are provided. The method electrically connects first and second circuit patterns by compressing the first and second unit circuits with a conductor therebetween to introduce the conductor into an insulating layer, and thus can save on manufacturing cost and achieve more precise junction. Also, the fabric-type multilayer PCB includes a conductor that is formed on a fabric material, and directly joined to the first and second circuit patterns to electrically connect the first and second circuit patterns, and thus enables efficient electrical connection. Moreover, even when a shape is deformed by the torsion of flexible fabrics, an electrical connection can be maintained.Type: ApplicationFiled: November 28, 2012Publication date: December 5, 2013Applicant: Electronics & Telecommunications Research InstituteInventors: Yong Ki SON, Ji Eun KIM, Bae Sun KIM, Sung Yong SHIN, Il Yeon CHO
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Patent number: 8595927Abstract: A method for manufacturing a printed wiring board includes preparing a core substrate having first and second surfaces, forming a penetrating hole from the first surface toward the second surface of the substrate, forming first conductor on the first surface of the substrate, forming second conductor on the second surface of the substrate, and filling conductive material in the hole such that through-hole conductor connecting the first and second conductors is formed. The forming of the hole includes forming a first opening portion on the first-surface side of the substrate, a second opening portion from the bottom of the first portion toward the second surface, and a third opening portion from the bottom of the second portion toward the second surface, and the forming of the hole satisfies X2<X3?X1 where X1, X2 and X3 represent the diameters of the first, second and third portions.Type: GrantFiled: February 29, 2012Date of Patent: December 3, 2013Assignee: Ibiden Co., Ltd.Inventors: Tsutomu Yamauchi, Satoru Kawai
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Publication number: 20130312256Abstract: A stretchable circuit assembly includes first and second printed circuit boards, discrete conductive wires or flexible circuits including ends connected to the first and second printed circuit boards, and a stretchable interconnect in which the discrete conductive wires or flexible circuits and a portion of the first and second printed circuit boards are embedded. Main surfaces of the flexible circuits are perpendicular or substantially perpendicular to main surfaces of the stretchable interconnect. A method of making a stretchable circuit assembly includes the steps of providing electrical interconnects, a first printed circuit board, and a second printed circuit board, shaping the electrical interconnects to have an oscillating configuration, and forming a stretchable interconnect such that the electrical interconnects, a portion of the first printed circuit board, and a portion of the second printed circuit board are embedded within the stretchable interconnect.Type: ApplicationFiled: July 30, 2013Publication date: November 28, 2013Applicant: MULTI-FINELINE ELECTRONIX, INC.Inventors: Dale WESSELMANN, Luis CHAU, Chengkong Chris WU
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Patent number: 8590144Abstract: Provided is a method of manufacturing a printed circuit board including, disposing first and second insulating members and first and second conductive films on both sides of a separating member to perform a thermocompression bonding process on the first and second insulating members and the first and second conductive films on the both sides of the separating member, so as to attach the first member to the second member with the separating member therebetween and attach the first insulating member to the first conductive film and attach the second insulating member to the second conductive film, selectively removing the first and second conductive films to form first and second circuit patterns, and cutting the separating member and the first and second insulating members to separate the first and second insulating members with the first and second circuit patterns from the separating member.Type: GrantFiled: March 2, 2009Date of Patent: November 26, 2013Assignee: LG Innotek Co., Ltd.Inventors: Hye Sun Yoon, Jae Bong Choi, Eun Jung Lee, Jung Ho Hwang, Joon Wook Han
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Patent number: 8594983Abstract: The present invention relates to a pin-less registration and inductive heating system involving the use of a pre-alignment station for imaging an initial position of a laminate element, an imaging and computer operation control system for determining a required correction factor between an alignment of the laminate element at the pre-alignment station and a preferred stack orientation for the laminate element, and an alignment and transfer system for securely gripping, transferring, and repositioning a laminate element from a top position to the preferred stack orientation employing a preferred four-axis orientation.Type: GrantFiled: September 28, 2011Date of Patent: November 26, 2013Assignee: Duetto Integrated Systems, Inc.Inventors: Anthony Faraci, Gary N. Sortino