By Metal Fusion Bonding Patents (Class 29/843)
  • Patent number: 7874067
    Abstract: According to certain embodiments of the invention, a single chip COB USB manufacturing is using chip-on-board (COB) processes on a PCB panel with multiple individual USB PCB substrates. This single chip COB USB is laid out in an array of N×M matrixes. The advantages of this method are: 1) use molding over PCBA, versus conventional of using SMT process to mount all necessary component on substrate to form PCBA; 2) simpler rectangular structure to fit any external decorative shell package for added value; and 3) package is moisture resistance if not water proof.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: January 25, 2011
    Assignee: Super Talent Electronics, Inc.
    Inventors: Siew S. Hiew, Frank I-Kang Yu, Nan Nan, Paul Hsueh, Abraham C. Ma, Ming-Shiang Shen
  • Patent number: 7870663
    Abstract: Provided is a method for manufacturing a multilayer wiring board, by which interlayer connection is efficiently performed and a non-penetrating hole having a hollow structure or a through hole can be formed at the same time without damaging a plated portion on the inner wall of the through hole. A first printed board (1) is provided with a wiring, which has a wiring section and a bump mounting pad (14), and a substrate section. The method is provided with a step of forming a solder bump (3) on at least a bump mounting pad on the first printed board or a pad section of a second printed board (2) having the pad section (15) by using a solder paste, and a step of bonding the first printed board and the second printed board in layers by having an insulating adhesive (4) between the first printed board and the second printed board and electrically connecting the first printed board with the second printed board.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: January 18, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Eiichi Shinada, Masahiro Katou, Noriaki Watanabe
  • Patent number: 7867790
    Abstract: Provided are a substrate of a probe card for installing a plurality of probes thereon to inspect an object by contacting the probes to the object, and a method for repairing the substrate. The substrate includes main channels electrically connected to the probes; and at least one spare channel for replacing the main channels when at least one of the main channels is damaged. Therefore, when some of the main channels of the probe substrate are damaged, the damaged main channels can be repaired using the spare channels and then the probe substrate can be reused, thereby reducing costs required for unnecessary replacement.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: January 11, 2011
    Assignee: Phicom Corporation
    Inventors: Jung-Sun Yoo, Seong-Hoon Jeong
  • Publication number: 20110000083
    Abstract: Disclosed herein are a printed circuit board having metal bumps which have uniform diameter and are formed at fine pitch, and a method of manufacturing the printed circuit board.
    Type: Application
    Filed: September 2, 2009
    Publication date: January 6, 2011
    Inventors: Jin Yong AN, Seok Kyu Lee
  • Publication number: 20100326702
    Abstract: Methods and apparatus for forming an integrated circuit assembly are presented, for example, three dimensional integrated circuit assemblies. Lower height 3DIC assemblies due Use of, for example, thinned wafers, low-height solder bumps, and through silicon vias provide for low height three dimensional integrated circuit assemblies. For example, a method for forming an integrated circuit assembly comprises forming first solder bumps on a first die, and forming a first structure comprising the first die, the first solder bumps, a first flux, and a first substratum. The first die is placed upon the first substratum. The first solder bumps are between the first die and the first substratum. The first flux holds the first die substantially flat and onto the first substratum.
    Type: Application
    Filed: June 24, 2009
    Publication date: December 30, 2010
    Applicant: International Business Machines Corporation
    Inventors: Bing Dang, David Hirsch Danovitch, Mario John Interrante, John Ulrich Knickerbocker, Michael Jay Shapiro, Van Thanh Truong
  • Patent number: 7841781
    Abstract: In an optical transceiver module, the bottom surface of the lid is temporarily attached to the top surface of the submount assembly in a pre-alignment position prior to performing the solder flowing process in order to prevent the lid from shifting position during the solder flowing process. The solder flowing process is then performed to melt the solder. When the solder melts, the surface tension of the melted solder pulls the lid into its ultimate, or permanent, aligned position. The solder is then cooled, causing it to harden, thereby securing the lid to the submount assembly in its ultimate, permanently aligned position. The hardened solder between the top surface of the submount assembly and the bottom surface of the lid forms a hermetic seal that encloses components on the transmit side of the transceiver module in a hermetically-sealed environment.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: November 30, 2010
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventor: Tak K. Wang
  • Patent number: 7836579
    Abstract: A simple method is provided for protecting slider mounted read/write transducers from electrostatic discharge damage during the manufacture of disk drives. The method involves placing a ball of conducting thermoplastic resin, such as a gold or silver epoxy, between the terminal pads of the transducer and using the ball to shunt the pads to read-head shields and the slider substrate and thence to ground. The epoxy ball is easily applied and easily removed and can be used at different stages in the manufacturing process.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: November 23, 2010
    Assignee: SAE Magnetics (HK) Ltd.
    Inventors: Niraj Mahadev, Kazumasa Yasuda, Rudy Ayala
  • Patent number: 7837522
    Abstract: An electrical contact including a head, a tail including an opposing pair of major surfaces and a hole, a body connected at one end thereof to the head and at another end thereof to the tail, a peg arranged adjacent to the hole and to extend perpendicular or substantially perpendicular to one of the opposing pair of major surfaces and including at least one beveled side, and a solder member attached to the tail such that the peg creates and fits in a protrusion in a surface of the solder member when the solder member is attached to the tail, such that a portion of the solder member extends into the hole, and such that the solder member engages the at least one beveled side of the peg.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 23, 2010
    Assignee: Samtec, Inc.
    Inventors: David Hoover, John Mongold, Donald Knowlden
  • Patent number: 7836587
    Abstract: An electrical element can be attached and electrically connected to a substrate by a conductive adhesive material. The conductive adhesive material can electrically connect the electrical element to a terminal or other electrical conductor on the substrate. The conductive adhesive material can be cured by directing a flow of heated gas onto the material or by heating the material through a support structure on which the substrate is located. A non-conductive adhesive material can attach the electrical element to the substrate with a greater adhesive strength than the conductive adhesive. The non-conductive adhesive material can also be cured by directing a flow of heated gas onto the material or by heating the material through the support structure on which the substrate is located. The non-conductive adhesive material can cover the conductive adhesive material.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: November 23, 2010
    Assignee: FormFactor, Inc.
    Inventor: Tae Ma Kim
  • Patent number: 7823277
    Abstract: A method for preparing a bipolar plate assembly for a fuel cell stack is provided. The method first includes the steps of providing a first unipolar plate having a first active area with a plurality of channels formed on a first inner surface thereof, and a second unipolar plate having a second active area with a plurality of lands formed on a second inner surface thereof. The first unipolar plate and the second unipolar plate are aligned to dispose the first active area adjacent the second active area. A first pressure is then applied to the first and second active areas to pre-nest the first active area and the second active area. The perimeters of the first and second unipolar plates are then joined. A clamping fixture and associated method for assembling the bipolar plate assembly is also provided.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: November 2, 2010
    Assignee: GM Global Technology Operations, Inc.
    Inventors: Mark W. Keyser, Jeffrey A. Rock, Keith E. Newman, Lewis Dipietro, Scott Ofslager, Steven J. Spencer
  • Patent number: 7823276
    Abstract: The present invention provides a printed circuit board that can suppress the positional displacement of parts mounted thereon. The printed circuit board includes resist formed on the surface of the printed circuit board, lands for receiving respective parts to be mounted, the lands being arranged off openings free from the resist, and lands for alignment, respectively alignment marks being formed on the land for alignment by means of solder.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: November 2, 2010
    Assignee: Sony Corporation
    Inventors: Kazumoto Chiba, Seigo Sato
  • Patent number: 7816176
    Abstract: In a method of manufacturing an electronic component package, first, a plurality of sets of external connecting terminals corresponding to a plurality of electronic component packages are formed by plating on a top surface of a substrate to thereby fabricate a wafer. The wafer includes a plurality of pre-base portions that will be separated from one another later to become bases of the respective electronic component packages. Next, at least one electronic component chip is bonded to each of the pre-base portions of the wafer. Next, electrodes of the electronic component chip are connected to the external connecting terminals. Next, the electronic component chip is sealed. Next, the wafer is cut so that the pre-base portions are separated from one another and the plurality of bases are thereby formed.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: October 19, 2010
    Assignees: Headway Technologies, Inc., SAE Magnetics (H.K.) Ltd.
    Inventors: Yoshitaka Sasaki, Tatsushi Shimizu
  • Patent number: 7815122
    Abstract: A method of making an electronic label including a chip (1) provided with two contact strips (2, 3) onto which a conducting wire (4) is welded in a single operation. The segment of conducting wire (4) forming the antenna is then cut between the two contact strips (2, 3) of chip (1). The group of chip and antenna thus realized may then be encapsulated between two sheets of a fibrous or plastic material.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: October 19, 2010
    Inventor: Pierre-Alain Bauer
  • Patent number: 7805834
    Abstract: The present invention includes methods for making liquid crystalline polymer (LCP) interconnect structures using a high temperature and low temperature single sided LCP, where both the high and low temperature LCP are provided with a z-axis connection. The single sided conductive layer is a bus layer to form z-axis conductive stud within the high and low temperature LCP. High and low temperature LCP layers are etched or built up to form circuit patterns and subsequently bonded together to form final multilayer circuit pattern where the low temperature LCP melts to form both dielectric to dielectric bond to high temperature LCP circuit layer, and dielectric to conductive bond.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: October 5, 2010
    Assignee: Georgia Tech Research Corporation
    Inventors: George E. White, Madhavan Swaminathan, Venkatesh Sundaram, Sidharth Dalmia
  • Patent number: 7805835
    Abstract: A method for selectively processing a surface tension of a solder mask layer in a circuit board is provided. The method conducts surface tension processing to the flip-chip area and the non-flip-chip area of the solder mask layer in the circuit board. Therefore, the underfill used in packaging configures relative contact angles at the flip-chip area and the non-flip-chip area of the solder mask layer, respectively. In such a way, the present invention is adapted to solve the difficulties of the underfill void bulb and the overflowing contamination at the same time.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: October 5, 2010
    Assignee: Kinsus Interconnect Technology Corp.
    Inventors: Hsien-Ming Dai, Jen-Fang Chang, Jun-Chung Hsu
  • Patent number: 7807073
    Abstract: A conductor composition being able to easily secure the conductivity at the same level as an Ag bulk at low temperature process, a mounting substrate utilizing the conductor composition and a mounting structure utilizing the conductor composition are provided. In a mounting structure, wherein one or more electrodes (11) of a mounting substrate (10) and one or more surface mounting components (20) are connected through a conductor composition (30), and one or more surface wirings (14) of the mounting substrate (10), one or more inner-layer wirings (13) and one or more via conductors (12) are formed with the conductor composition, the conductor composition contains conductive particles with electrical conductivity, and the conductive particles are composed of low crystallized Ag fillers with the crystal size of 10 ?m or less.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: October 5, 2010
    Assignee: DENSO CORPORATION
    Inventors: Masashi Totokawa, Yuji Ootani, Hirokazu Imai, Akira Shintai
  • Patent number: 7793414
    Abstract: Provided are connection structures for a microelectronic device and methods for forming the structure. A substrate is included having opposing surfaces and a plurality of holes extending through the surfaces. Also included is a plurality of electrically conductive posts. Each post extends from a base to a tip located within a corresponding hole of the substrate. An additional substrate may be provided such that the base of each post is located on a surface thereof. Additional electrically conductive posts may be provided having tips in corresponding holes of the additional substrate. Optionally, a dielectric material may be placed between the substrate and the posts.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: September 14, 2010
    Assignee: Tessera, Inc.
    Inventors: Belgacem Haba, Masud Beroz, David B. Tuckerman, Giles Humpston, Richard Dewitt Crisp
  • Publication number: 20100221930
    Abstract: A plug device may include a printed circuit board; and a plug connector, which is soldered flat onto the printed circuit board.
    Type: Application
    Filed: October 2, 2007
    Publication date: September 2, 2010
    Applicant: OSRAM GESELLSCHAFT MIT BESCHRAENKTER HAFTUNG
    Inventors: Ralf Hying, Peter Niedermeier
  • Patent number: 7779538
    Abstract: A method for connecting circuit boards, comprising: (i) preparing a first circuit board having connection parts assigned to end parts of a plurality of conductor wirings, and a second circuit board having connection parts assigned to corresponding end parts of a plurality of conductor wirings; (ii) disposing the connection parts of the first circuit board to face the connection parts of the second circuit board with a thermosetting adhesive film between the connection parts of the circuit boards; and (iii) applying heat and pressure to the connection parts and to the thermosetting adhesive film sufficiently high to thoroughly push away the adhesive film so as to establish electrical contact between connection parts of the circuit boards facing each other and to allow for curing of the adhesive; wherein the conductor wirings constituting the connection parts of at least one of the first and second circuit boards contain non-linear wirings.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: August 24, 2010
    Assignee: 3M Innovative Properties Company
    Inventors: Yoshiaki Sato, Kohichiro Kawate, James R. White
  • Publication number: 20100193233
    Abstract: A printed circuit board 1 is provided, which includes: soldering lands for connecting respective leads of a dual inline lead-type electronic part 2 by jet-type soldering; and a solder-drawing land 4 for absorbing excessive solder during soldering, which is arranged at a position behind the rearmost soldering lands 3h in the traveling direction of jet-type soldering. The solder-drawing land has a square outer shape and includes a slit 4a in a bent shape therein. One corner of the square is located near the rearmost soldering lands 3h and arranged between the leads, while a bent portion of the slit is arranged near the one corner.
    Type: Application
    Filed: July 9, 2009
    Publication date: August 5, 2010
    Applicant: Mitsubishi Electric Corporation
    Inventor: Tsuyoshi Miura
  • Patent number: 7761966
    Abstract: A method for repairing a damaged probe from a probe card comprising the steps of removing the damaged probe from the probe card, separating one a plurality of replacement probes from a substrate and installing the one probe separated from the plurality of replacement probes where the damaged probe was removed.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: July 27, 2010
    Assignee: Touchdown Technologies, Inc.
    Inventors: Lakshmikanth Namburi, Raffi Garabedian
  • Patent number: 7757385
    Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: July 20, 2010
    Assignee: Micron Technology, Inc.
    Inventor: David R. Hembree
  • Patent number: 7752749
    Abstract: One of an electrode terminal of an electronic component and a connecting terminal of a wiring substrate is provided with solder beforehand, one of the wiring substrate and the electronic component is secured, and the electrode terminal and the connecting terminal are made to abut each other so that one of the wiring substrate and the electronic component, whichever is not secured, is held. The electronic component is heated so that the solder melts, and the solder is solidified while the electronic component is held, so that the electrode terminal and the connecting terminal are bonded to each other by the solder. Further, while an interval formed between the wiring substrate and the electronic component by the melted solder is being held, the electrode terminal and the connecting terminal are finely moved relative to each other with reference to a surface of the wiring substrate in an XY? direction.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: July 13, 2010
    Assignee: Panasonic Corporation
    Inventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Shinobu Masuda, Satoru Tomekawa
  • Patent number: 7716821
    Abstract: A method of manufacturing a circuit board assembly for a controller. The method includes providing first and second printed circuit boards wherein the first printed circuit board has a plurality of copper pads containing slots therein that correspond to a plurality of power tabs in the second printed circuit board. The power tabs are then slid into the slots and the tabs are flooded with copper. At this time the power tabs are soldered within the slots to provide an electrical connection between the first and second printed circuit boards that allows for the transfer of current between the boards of more than three amps.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: May 18, 2010
    Assignee: Sauer-Danfoss Inc.
    Inventors: Xiao Yan, Thomas J. Bergherr
  • Patent number: 7716824
    Abstract: An object of the present invention is to finely conduct an inspection of high integration devices by making it possible to form guide holes in a support plate of a probe card in a narrower pitch than in the conventional case of forming the guide holes in a support plate of the same area, and to broaden a range of options for an elastic member which works to urge a probe pin. The present invention has a circuit board and a support plate being placed under the circuit board and supporting the probe pin. In the guide hole formed in the support plate, the probe pin composed of an elastic portion and a pin portion is inserted, and a rip of the pin portion protrudes downward from the support plate. The guide hole has a quadrangular horizontal sectional shape.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: May 18, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Kiyoshi Takekoshi
  • Patent number: 7712649
    Abstract: An electronic component mounting device according to the invention includes a bonding head for holding and pressure bonding an electronic component to a mounting substrate, a local stage provided with a support surface formed in an area which is almost equal to or slightly larger than that of a mounting surface of the electronic component and serving to support a pressure bonding force from an antimounting surface of the mounting substrate through the support surface, a length measuring mechanism for measuring a distance between the bonding head and the mounting substrate, thereby calculating a virtual plane in a predetermined mounting position on the mounting substrate, and a tilting and moving mechanism for tilting and moving the bonding head and the local stage, thereby causing a normal of the virtual plane in the mounting position to be coincident with an action line of the pressure bonding force, and the pressure bonding is carried out along the normal.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: May 11, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Toshiyuki Kuramochi
  • Patent number: 7703200
    Abstract: A packaging method for assembling a screw to a printed circuit board (PCB) includes the steps of: providing a screw having a head, a threaded shank, and a ferrule enclosing the threaded shank; mounting a stop ring on the threaded shank to maintain a predetermined height from top of the head to bottom of the ferrule; using a tool to fetch the screw and align the threaded shank with one through hole provided on the PCB; releasing the screw from the tool for a flange of the ferrule to extend into the through hole on the PCB; heating to melt a solder layer atop of the PCB, so that the ferrule is fixedly held to the PCB when the molten solder layer is cooled and hardened again; and removing the stop ring so that the threaded shank is retracted into the ferrule.
    Type: Grant
    Filed: February 18, 2008
    Date of Patent: April 27, 2010
    Assignee: Fivetech Technology Inc.
    Inventors: Ting-Jui Wang, Ming-De Wu
  • Patent number: 7690107
    Abstract: A method and apparatus for aligning components on a module. A flexible circuit may be attached to a module in which a tooling apparatus is attached to the module. A plurality of circuit pads on a functional section of the flexible circuit is aligned by a first alignment structure located on a sacrificial portion of the flexible circuit to a second alignment structure on the tooling apparatus. The flexible circuit is attached to the module while the flexible circuit is in an aligned position.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: April 6, 2010
    Assignee: The Boeing Company
    Inventors: Peter Timothy Heisen, Harold Peter Soares, Jr.
  • Publication number: 20100078206
    Abstract: A contact apparatus can be made by providing a first substrate with electrically conductive terminals and second substrates each of which can have contact structures. Each of the contact structures can have a contact tip. The second substrates can be aligned such that contact tips of the contact structures are aligned substantially in a plane. An optical system can be used to monitor an actual position of the second substrates, and a mechanical system can be used to move the second substrates to aligned positions. The contact structures can be attached to ones of the terminals on the first substrate while the second substrates are in the aligned positions.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 1, 2010
    Inventors: Li Fan, Michael J. Armstrong, John K. Gritters
  • Patent number: 7685704
    Abstract: A method for manufacturing a bump of a probe card is disclosed. In accordance with the present invention, the bump has a high aspect ratio, a high elasticity, a high durability suitable for testing a high speed device. The bump is formed using a sacrificial substrate as a mold to have a shape of ? or II for elasticity and durability.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: March 30, 2010
    Assignee: Will Technology Co., Ltd.
    Inventors: Bong Hwan Kim, Jong Bok Kim
  • Patent number: 7685707
    Abstract: A stable and high quality circuit forming substrate is provided even when the work size is increased in the circuit forming substrate. In a stacking step, prepregs that are B stage substrate materials, are arranged lined with respect to a first metal foil, and stacked on the first metal foil. A C stage substrate material is stacked on the B stage substrate materials. Further, the prepregs that are two or more B stage substrate materials, are stacked on the C stage substrate material and a second metal foil is stacked thereon.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: March 30, 2010
    Assignee: Panasonic Corporation
    Inventor: Toshihiro Nishii
  • Patent number: 7681309
    Abstract: A method is disclosed that can be used to interconnect an integrated circuit (IC) multiple die assembly to conductors on a substrate such that signals can be conveyed between the dies and the conductors on the substrate. The multiple die assembly can include a first IC die and at least one secondary IC die, which can be mounted on a surface of the first IC die. Signal paths can be provided between the first IC die and the secondary IC die. The method can include providing conductive contacts on the surface of the first IC die. Each such conductive contact can have a free end extending outward from the surface beyond the secondary IC die. The method can also include mounting the multiple die assembly on the substrate such that the free end of each contact is brought into contact with the conductors on the substrate. The secondary IC die can reside between the surface of the first IC die and the substrate, and the contacts can convey signals between the first IC die and the conductors on the substrate.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: March 23, 2010
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Publication number: 20100044084
    Abstract: Provided is a printed circuit board (PCB) including a substrate that has a pad formed thereon; solder resist that is disposed on the substrate so as to expose the pad; a post that is disposed on the post; a surface-treatment layer that is disposed on the post; and a bump that is disposed on the surface-treatment layer.
    Type: Application
    Filed: October 23, 2008
    Publication date: February 25, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dong Gyu LEE, Seon Jae MUN, Jin Won CHOI, Tae Joon CHUNG
  • Publication number: 20100032194
    Abstract: A printed wiring board including an insulation layer, a pad formed in the insulation layer, a solder bump formed over the pad, and a metallic film interposed between the pad and the solder bump and covering at least a portion of the top surface and/or the side surface of the pad over the insulation layer. The pad has a via land portion and a via conductor portion. The insulation layer has the first surface, the second surface on the opposite side of the first surface and a via-hole extending between the first surface and the second surface. The via land portion of the pad is formed over the second surface of the insulation layer. The via conductor portion of the pad is filling the via-hole of the insulation layer.
    Type: Application
    Filed: June 30, 2009
    Publication date: February 11, 2010
    Applicant: IBIDEN CO., LTD.
    Inventor: Hisashi KATO
  • Publication number: 20100008054
    Abstract: A process for electrically and mechanically attaching a connector to a printed circuit board contained in a housing involves steps of providing a housing member having an electrical connector integrally extending through a wall of the housing member; providing a circuit board having an electrical contact pad and a solder bump on the electrical contact pad; positioning the printed circuit board on the housing member with the solder bump contacting the terminal to form a pre-assembly; liquefying the solder bump; and re-solidifying the solder bump to establish attachment of the connector to the printed circuit board. Liquefying the solder bump and re-solidifying the solder bump can be achieved using either a conventional reflow technique in which the entire sub-assembly is heated, or a hot bar apparatus may be employed to selectively heat thermally conductive pads that are in thermal contact with solder bumps on the printed circuit board.
    Type: Application
    Filed: July 9, 2008
    Publication date: January 14, 2010
    Inventor: Patrick L. Dotson
  • Publication number: 20100008093
    Abstract: Generally, a fixture for securing optoelectronic packages may be used to secure one or more optoelectronic packages for mounting one or more components and/or one or more wires to at least first and second mounting surfaces at different relative angles. The fixture is rotatable between at least first and second mounting positions with a top surface of the fixture being at respective first and second mounting angles relative to a horizontal plane. The fixture may be configured to secure the optoelectronic package(s) for positioning at different mounting angles to facilitate mounting the components and/or wires to the mounting surfaces at the different angles. The fixture may also be configured to be continuously adjustable over a range of angles between the first and second mounting angles.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 14, 2010
    Applicant: APPLIED OPTOELECTRONICS, INC.
    Inventors: Kai-Sheng Lin, Chian-Hung Chen, Limin Chen
  • Patent number: 7644495
    Abstract: Electrical interfaces formed into a conductive loaded resin-based material. The conductive loaded resin-based material comprises micron conductive powder(s), conductive fiber(s), or a combination of conductive powder and conductive fibers in a base resin host. The percentage by weight of the conductive powder(s), conductive fiber(s), or a combination thereof is between about 20% and 50% of the weight of the conductive loaded resin-based material. The micron conductive powders are formed from non-metals, such as carbon, graphite, that may also be metallic plated, or the like, or from metals such as stainless steel, nickel, copper, silver, that may also be metallic plated, or the like, or from a combination of non-metal, plated, or in combination with, metal powders. The micron conductor fibers preferably are of nickel plated carbon fiber, stainless steel fiber, copper fiber, silver fiber, or the like.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: January 12, 2010
    Assignee: Integral Technologies, Inc.
    Inventor: Thomas Aisenbrey
  • Patent number: 7644490
    Abstract: A method of forming an actuator and a relay using a micro-electromechanical (MEMS)-based process is disclosed. The method first forms the lower sections of a square copper coil, and then forms an actuation member that includes a core section and a horizontally adjacent floating cantilever section. The core section, which lies directly over the lower coil sections, is electrically isolated from the lower coil sections. The method next forms the side and upper sections of the coil, along with first and second electrodes that are separated by a switch gap. The first electrode lies directly over an end of the core section, while the second electrode lies directly over an end of the floating cantilever section.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: January 12, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Trevor Niblock, Peter Johnson
  • Patent number: 7640649
    Abstract: A method which enables easy removal of a magnetic head slider soldered to a suspension and easy reuse of the removed parts. In the method for removing the magnetic head slider, heat is applied to a suspension to which at least a part of the magnetic head slider is joined by solder so as to remove the magnetic head slider from the suspension. The heating is locally applied to the junction area of the magnetic head slider and the suspension, which is joined by the solder.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: January 5, 2010
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: Hiroshi Fukaya, Satoshi Yamaguchi
  • Patent number: 7635079
    Abstract: System for placing conductive spheres on prefluxed bond pads of a substrate using a stencil plate with a pattern of through-holes positioned over the bond pads. Conductive spheres are placed in the through-holes by a moving feed mechanism and the spheres drop through the through-holes onto the bond pads. In one embodiment, the feed mechanism is a sphere hopper which crosses the entire through-hole pattern. In another embodiment, a shuttle plate fed spheres from a reservoir and reversibly moves about one-half of the pitch, moving from a non-discharge position to a discharge position.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: December 22, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Michael B. Ball, Marjorie L. Waddel
  • Patent number: 7631423
    Abstract: A method is provided for fabricating a multilayer printed circuit board, including embedded electrically conductive elements formed as part of the fabrication of the layers of the printed circuit board. An insulating layer and a conductive layer are then pressed over the electrically conductive elements such that the electrically conductive elements protrude from the surface of the conductive layer. A mechanical process is the applied to remove these protrusions to expose the embedded electrically conductive elements. An electrically conductive undercoat may be applied over the surface of the conductive layer and a second circuit pattern is formed over the electrically conductive undercoat.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: December 15, 2009
    Assignee: Sanmina-Sci Corporation
    Inventors: Lim Siong San, Neo Mok Choon, Kevin Lim, Kelvin Yeow, Tan Kwang Chiah
  • Patent number: 7621044
    Abstract: Resilient spring contact structures are manufactured by plating the contact structures on a reusable mandrel, as opposed to forming the contact structures on sacrificial layers that are later etched away. In one embodiment, the mandrel includes a form or mold area that is inserted through a plated through hole in a substrate. Plating is then performed to create the spring contact on the mold area of the mandrel as well as to attach the spring contact to the substrate. In a second embodiment, the mandrel includes a form that is initially plated to form the resilient contact structure and then attached to a region of a substrate without being inserted through the substrate. Attachment in the second embodiment can be achieved during the plating process used to form the spring contact, or by using a conductive adhesive or solder either before or after releasing the spring contact from the mandrel.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 24, 2009
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gaetan L. Mathieu
  • Patent number: 7610675
    Abstract: A method to produce a transponder comprises the steps of positioning a coil comprising at least one coil end in a predetermined coil position and holding all of said coil ends in a respective holding position, and holding a chip comprising at least one contact pad in a chip fixture so that all of said coil ends of the coil that should be bonded to said chip are located on one side of corresponding contact pads of the chip, and bonding of the coil ends to the contact pads.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: November 3, 2009
    Assignee: Assa Abloy AB
    Inventors: Fredrik Hansson, Mattias Persson
  • Publication number: 20090264028
    Abstract: A joint structure of the present invention includes a conductive member containing copper as a major component thereof, an electrode member containing copper as a major component thereof, and a joint portion formed by fusion welding the conductive member and the electrode member with a brazing material containing tin as a major component thereof and containing substantially no copper, wherein the amount of copper atoms contained in the alloy in the central part of the joint portion is higher than that in the outer circumference part.
    Type: Application
    Filed: September 14, 2006
    Publication date: October 22, 2009
    Inventor: Toshiaki Chuma
  • Publication number: 20090249620
    Abstract: The invention relates to a method for applying an electronic component (24), which is provided with terminal faces (34, 35), to a substrate (33), which is provided with terminal faces (31, 32), wherein the component is removed from a feeding device by means of an application device (27), the component is subsequently positioned on the substrate by means of the application device in such a manner that the component terminal faces extending from a contact side (37) of the component up to a component rear side (38) and the substrate terminal faces are in an overlapping position and the terminal faces are subsequently contacted by means of a direct application of laser energy to the component terminal faces.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 8, 2009
    Applicant: Pac Tech - Packaging Technologies GmbH
    Inventor: Ghassem Azdasht
  • Patent number: 7596864
    Abstract: A method for soldering a soft wire to a printed circuit board conveniently includes the following step: providing a bracket having a through hole and an enameled wire; fastening the enameled wire to the bracket with the conductive wire crossing over the through hole; providing a printed circuit board formed with conductive pads thereon and setting the printed circuit board onto the bracket with the pad aligned to the through hole so that a portion of the magnet wire crossing the through hole lies on the conductive pad; providing a soldering tool having a thermal contact portion and inserting the thermal contact portion into the through hole to solder the magnet wire to the conductive pad.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: October 6, 2009
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: John Chow, Huan Chen, Chih-Min Lin
  • Publication number: 20090242262
    Abstract: A multi-layer wiring board without a core substrate includes: a multi-layer laminated structure; first terminals provided on a front surface of the multi-layer laminated structure; second terminals provided on a rear surface of the multi-layer laminated structure; terminal pins bonded to a corresponding one of the second terminals, wherein each of the terminal pins is formed in a nailhead shape that includes a shaft portion and a head portion, and a diameter of the head portion is larger than that of the shaft portion; and a reinforcing plate which has pin insertion openings formed at positions corresponding to the terminal pins and which is fixed to the rear surface, wherein the diameter of the pin insertion openings is smaller than the diameter of the head portion and is larger than the diameter of the shaft portion.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Inventor: Toshiya Asano
  • Patent number: 7591069
    Abstract: Methods and apparatuses for bonding solder balls to bond pads are described. In one embodiment, portions of a plurality of solder balls are placed within a frame and in registered alignment with individual bond pads over a substrate. While the ball portions are within the frame, the balls are exposed to bonding conditions effective to bond the balls with their associated bond pads. In another embodiment, a frame is provided having a plurality of holes sized to receive individual solder balls. Individual balls are delivered into the holes from over the frame. The balls are placed into registered alignment with a plurality of individual bond pads over a substrate while the balls are in the holes. The balls are bonded with the individual associated bond pads.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: September 22, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Alan G. Wood
  • Patent number: 7581308
    Abstract: Method of connecting an antenna wire to a transponder chip. A transponder chip in a recess in a substrate, and an antenna wire mounted to the surface of the substrate and having end portions spanning the recess. The end portions are spaced wider than the chip, to allow the chip to be inserted into the recess from the same side as the antenna. The end portions may then be repositioned to be over corresponding terminals of the chip, for bonding thereto. The recess may be substantially larger than the chip, so that the chip and/or the substrate may be moved from side-to-side in the recess for positioning the terminals under the end portions, for bonding thereto. Insulation may be removed from the end portions prior to mounting the chip in the recess, to enhance subsequent bonding.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: September 1, 2009
    Assignee: Advanced Microelectronic and Automation Technology Ltd.
    Inventor: David Finn
  • Patent number: 7581961
    Abstract: Method for preventing solder from rising to a portion of an electric contact when the electric contact is being soldered to a copper foil so as to extend therefrom. The portion is plated with a noble metal and adapted to contact a mating object. Cooling means is brought into contact with at least the portion of the electric contact adapted to contact the mating object, and connection portion between the electric contact and the copper foil is heated by heating means. The rising of solder can be prevented and the electric contacts thus obtained are superior in mechanical property (sufficient bonding strength), electrical property (conductive property and low contact resistance), resistance to environmental conditions (impediment to oxidization), and physical property (limitation of rise of solder due to capillary action).
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: September 1, 2009
    Assignee: Fujikura Ltd.
    Inventors: Tomonari Ohtsuki, Katsuya Yamagami