Abstract: A low-dropout (LDO) voltage regulator for generating an output voltage is disclosed. The voltage regulator includes a startup circuit, a curvature corrected bandgap circuit, an error amplifier, a metal oxide semiconductor (MOS) pass device and a voltage slew rate efficient transient response boost circuit. The MOS pass device has a gate node which is coupled to the output of the error amplifier, and a drain node for generating the output voltage. The voltage slew rate efficient transient response boost circuit applies a voltage to the gate node of the MOS pass device to accelerate the response time of the error amplifier in enabling the LDO voltage regulator to reach its final regulated output voltage when an output voltage drop occurs in the LDO voltage regulator.

Abstract: A linear regulator having an input node receiving an unregulated voltage, an output node providing a regulated voltage, a voltage regulator, a bias circuit, and a current control device. The voltage regulator has an input terminal, a reference terminal, and an output terminal which forms the output node of the linear regulator circuit. The bias circuit has a first terminal coupled to the output terminal of the voltage regulator and a second terminal. The current control device has a first current electrode which forms the input node of the linear regulator circuit, a second current electrode coupled to the input of the voltage regulator, and a control electrode coupled to the second terminal of the bias circuit. The bias circuit develops a voltage sufficient to drive the control terminal of the current control device and to operate the voltage regulator.

Abstract: A differential amplifier having a positive input terminal, a negative input terminal, an output terminal, a bias terminal and a ground terminal is provided. The differential amplifier comprises a differential pair circuit and a current mirror circuit. Wherein, the differential pair circuit is coupled to the positive input terminal, the negative input terminal, the output terminal, and the bias terminal of the differential amplifier. The current mirror circuit receives a constant current from a current source, and mirrors the constant current to the differential pair circuit. The current mirror circuit further connects to the ground terminal of the differential amplifier, and the terminal of the current mirror circuit receiving the constant current is coupled to a first source/drain terminal of a first PMOS transistor. A second source/drain and a gate of the first PMOS transistor are connected to the bias terminal and the output terminal of the differential amplifier, respectively.

Abstract: A circuit for driving a capacitive load is provided. The circuit includes a differential signal sensor and a differential amplifier. The differential amplifier is arranged to drive the capacitive load. Further, the differential amplifier is arranged to receive an output voltage at one input, and to receive a reference voltage at another input. The output voltage is provided at the output of the differential amplifier. Also, the differential amplifier is arranged to receive a bias current. The differential signal sensor is arranged to determine whether the difference between the output voltage and the reference voltage is within a voltage window. If the difference between the output voltage and the reference voltage is inside of the voltage window, the bias current is provided at its normal value. However, if the difference between the output voltage and the reference voltage is outside of the voltage window, the bias current is increased so that the bias current linearly increases with respect to time.

Abstract: A bandgap reference circuit. In the bandgap reference circuit, a current generator includes a first bipolar junction transistor (BJT) and generates a first positive temperature coefficient current thereby producing a negative temperature coefficient voltage between a base terminal and an emitter terminal of the first bipolar junction transistor. A single-end gain amplifier includes a positive input terminal coupled to the emitter terminal of first the bipolar junction transistor. A first resistor is coupled between the output terminal of the single-end gain amplifier and an output terminal of the bandgap reference circuit to generate a first current. A current-to-voltage converter is coupled to the first resistor to convert the first positive temperature coefficient current and the first current to a bandgap voltage.

Abstract: A linear voltage regulator is provided for providing an output voltage to a load. In a preferred embodiment, the linear voltage regulator comprises: an operational amplifier receiving a regulated voltage, and a first voltage reference, and providing a driving voltage; a first regulating transistor driven by the driving voltage, the regulating transistor receiving a system voltage, and providing the regulated voltage; a second regulating transistor receiving the regulated voltage, and providing an output voltage, the second regulating transistor controlled by a controlling voltage; a resistive voltage divider receiving the output voltage, and providing a second voltage reference; and a three-terminal adjustable shunt regulator receiving the second voltage reference, and providing the controlling voltage to the second regulating transistor.

Abstract: A direct-current to direct-current conversion (DC/DC) apparatus includes a control circuit having an error amplifier for voltage control, basing the conversion on a pulse width modulation control using an output of the error amplifier. The error amplifier inputs a voltage signal corresponding to an output voltage of a DC/DC result and a plurality of reference voltage signals. The DC/DC apparatus also includes a soft start capacitor to provide one of the plurality of reference voltage signals. The error amplifier amplifies a difference between the voltage signal corresponding of the output voltage of a DC/DC result and a voltage signal of a lower potential among the plurality of reference voltage signals and carries out the pulse width modulation control. Furthermore, the control circuit includes a circuit for discharging charges corresponding to the output voltage of the DC/DC result when a power supply to the control circuit is turned off.

Abstract: A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.

Abstract: An electronic system according to various aspects of the present invention includes a memory and a supply regulation circuit having a regulated output to provide a selected voltage level. In one embodiment, the supply regulation circuit includes a reference voltage circuit connected to the supply and configured to receive a first voltage and a second voltage and provide a reference voltage and a control circuit connected to the reference voltage and configured to control the regulated voltage according to the reference voltage. The supply regulation circuit also includes an adjustment circuit controlled by the control circuit and configured to adjust the regulated voltage according to the reference voltage. The supply regulation circuit may also include a compensator circuit to provide additional adjustment to the regulated voltage.

Abstract: A low-noise voltage regulator circuit with quick disablement is disclosed. The voltage regulator circuit includes an amplifier for outputting a driving voltage according to a reference voltage, a feedback voltage on a feedback node, and an enable signal; an output transistor coupled among the amplifier, an output node, and a first voltage source for outputting an output voltage at the output node; a first discharge transistor coupled among the enable signal, the output node, and the feedback node; and a second discharge transistor coupled among the enable signal, the feedback node, and a second voltage source; wherein when the enable signal disables the amplifier, the enable signal turns on the first discharge transistor and the second discharge transistor such that the output voltage is quickly pulled down to close a level provided by the second voltage source.

Abstract: A rail—rail current sense amplifier including a low voltage current sense amplifier circuit, a high voltage current sense amplifier circuit, a first resistive device, and a selection circuit. The current sense amplifier senses current through a current sense device coupled to a battery node. The low voltage current sense amplifier circuit develops a first current that is proportional to current through the current sense device for low voltages up to an upper voltage threshold. The high voltage current sense amplifier circuit develops a second current that is proportional to current through the current sense device for high voltages down to a lower voltage threshold. The selection circuit selectively applies the first current to the first resistive device for low voltages up to the upper voltage threshold, and selectively applies the second current to the first resistive device for high voltages down to the lower voltage threshold.

Abstract: A circuit system for generating a stabilized power supply voltage, which, on the basis of a temperature quantity, selects an operating mode of a voltage regulator. In this context, it is provided, in particular, to apply the principles of the present invention to the supplying of voltage to electronic consumers in motor vehicles. During operation of the voltage regulator, a temperature quantity is recorded which is indicative of a quantity representing or influencing the operation of the voltage regulator. During active operation, the voltage regulator can be operated in at least two operating modes, and the current operating mode is selected as a function of the recorded temperature quantity.

Abstract: A voltage regulator with a variable compensation capacitor is capable of driving a large variable dynamic current load. The regulator includes an error amplifier and an output stage amplifier. The variable compensation capacitor is disposed between the output terminal of the error amplifier and the output terminal of the output stage amplifier. In one embodiment, a NMOS transistor is disposed between the output terminal of the output stage amplifier and the variable compensation capacitor. The variable compensation capacitor may be, e.g., a PMOS transistor with the source and drain tied together. In one embodiment, a plurality of regulators is included on chip, e.g., such as a programmable device, where the output terminals of each regulator is tied together and used to drive the same load.

Abstract: A series regulator for outputting a regulated voltage and a booster circuit of a charge pump type for outputting an output voltage by boosting the regulated voltage are connected in series. The series regulator is controlled so that the output voltage is maintained constant. A main circuit current of the series regulator is subject to current limitation. An excess signal commensurate of an excess of a current indicator value over a current reference value is generated. A voltage control signal is reduced in level in accordance with the excess signal.

Abstract: A programmable voltage regulator configurable for reverse blocking and double power density is disclosed herein. The programmable voltage regulator includes an error amplifier that couples to receive a reference voltage. A first NMOS pass transistor connects between an auxiliary voltage input node and the output terminal of the voltage regulator, wherein the first NMOS pass transistor is biased by the output of the error amplifier. Connected between the source of the first NMOS pass transistor and the second input of the error amplifier, a feedback network provides feedback for the voltage regulator. A second NMOS pass transistor connects between the first power supply and the auxiliary voltage input node. Furthermore, an independent node control circuit biases the second NMOS pass transistor such that in a first mode of operation, a first control signal input is operable to receive a signal for controlling the second NMOS pass transistor during reverse battery condition.

Abstract: A switchable linear regulator. The switchable linear regulator comprises a constant voltage source, a differential amplifier, a pass transistor, a first resistor, a plurality of second resistors and a plurality of switches. The differential amplifier has a first input terminal coupled to the constant voltage source and a second input terminal connected to a first node. The pass transistor has a first terminal controlled by the differential amplifier, a second terminal coupled to a supply voltage, and a third terminal connected to a second node. The first resistor is connected between the first and second nodes. Each second resistor comprises one end connected to the first node. Each switch is coupled between the other end of a corresponding second resistor and the ground.

Abstract: A hot swap power delivery circuit. Specifically, the hot swap power delivery circuit is used for controlling current to a load. The hot swap power delivery circuit comprises a field effect transistor (FET), a ramp circuit, and a source follower feedback circuit. The FET comprises a gate, a source, and a drain. The ramp circuit is coupled to the gate of the FET, and is used for delivering current to a load that is coupled to the source of the FET. The source follower feedback circuit is coupled to the source and the gate and is used for de-linearizing an output voltage on said source affecting the delivery of the current.

Abstract: A low drop output regulator may be used for power management. The low drop out regulator may include an amplifier network having a transfer function may be used to provide a substantially constant voltage and variable current to a load. A zero compensation network may be used to add a zero to the transfer function that varies with the load current.

Abstract: A voltage regulator exhibits a load line that is piecewise linear. This piecewise linearity variation has a first constant voltage segment VLEAK at which output voltage is regulated for output currents less than or equal to the leakage current IL. The output voltage VLEAK corresponds to the maximum output voltage allowable at the leakage current for a given operational range specification. The piecewise linearity variation further includes a second, linearly decreasing segment that varies from the maximum allowable output voltage VLEAK at the leakage current to a full load voltage VDROOP at full load current IFL. This serves to effectively maximize the available output voltage swing in the presence of a leakage current offset. The piecewise linear load line is adjustable to accommodate changes in leakage current.

Abstract: A circuit having a voltage regulated by a reference current. The circuit includes a current feedback loop and a reference current source that is capable of producing a reference current. The current feedback loop includes an output device, a voltage to current converter, and a current feedback element. The voltage to current converter is coupled to the output device. A node of the voltage to current converter is the regulated voltage. The current feedback element is coupled to the voltage to current converter to provide a feedback current from the voltage to current converter to compare with the reference current to produce an error signal that is input to a control terminal of the output device. Thus, the current feedback loop regulates the voltage at the node of the voltage to current converter.

Abstract: A linear voltage regulator circuit includes an external pass transistor that does not rely on internal compensation, provides high gain, and exhibits reduce silicon area and power requirements. Circuits according to the present invention provide sufficient bandwidth with an error amplifier and drive capability to keep any secondary poles sufficiently far from the unity gain bandwidth (UGB) while maintaining good power supply rejection.

Abstract: The problem of charge leakage in the AC compensation filter for the error amplifier of a pulse width modulation (PWM)-based DC—DC converter is effectively obviated by controllably sampling and storing the voltage across the AC compensation filter, in response to a transition of the operation of a DC power supply from run or active mode to quiescent or sleep mode. The sampled voltage is retained as a compensation voltage throughout the quiescent mode, so that it will be immediately available to the PWM circuitry at the termination of the quiescent interval. This serves to ensure a relatively smooth (low noise) power supply switch-over during a subsequent transition from quiescent to active mode.

Abstract: The present invention provides shunt voltage regulation by employing a rectifying means to rectify an incoming signal and a current sinking means to divert current from the output of the rectifying means in such a way that the output voltage is maintained at an appropriate level and the modulation level does not rise above the acceptable range. This is accomplished by having two feedback mechanisms for the control of said current sinking means. A first feedback mechanism utilizes a voltage dividing means to generate a control voltage signal that will cause the average output voltage of the rectifying means to be equal to the a reference voltage. A second feedback mechanism utilizes non-linear processing means and capacitors to transmit part of the modulation frequency to the control of the current sinking means, thereby keeping the modulation at the output of the rectifying mean at an appropriate level at all time.

Abstract: A voltage regulator having an output terminal adapted to being connected to a load, including an operational amplifier having its non-inverting input connected to a reference voltage, and its inverting input connected to the output terminal, an inverting amplifier having its input connected to the output of the operational amplifier, a capacitive impedance connected between the input and the output of the inverting amplifier, a power switch controlled by the output of the inverter amplifier, arranged to connect the output terminal to a first supply voltage, said capacitive impedance including a short-circuitable portion associated with active short-circuit means when the current flowing through the load is greater than a predetermined current.

Abstract: A direct-current to direct-current conversion (DC/DC) apparatus includes a control circuit having an error amplifier for voltage control, basing the conversion on a pulse width modulation control using an output of the error amplifier. The error amplifier inputs a voltage signal corresponding to an output voltage of a DC/DC result and a plurality of reference voltage signals. The DC/DC apparatus also includes a soft start capacitor to provide one of the plurality of reference voltage signals. The error amplifier amplifies a difference between the voltage signal corresponding to the output voltage of a DC/DC result and a voltage signal of a lower potential among the plurality of reference voltage signals and carries out the pulse width modulation control. Furthermore, the control circuit includes a circuit for discharging charges corresponding to the output voltage of the DC/DC result when a power supply to the control circuit is turned off.

Abstract: A sequencing system for sequencing a first node voltage at a first node and a second node voltage at a second node which is less than the first node voltage is disclosed. The sequencing system includes a bias circuit configured to provide a bias current in response to the first node voltage beginning to change to a first supply voltage. The sequencing system includes a switch configured to provide a low impedance path between the first node and the second node when the bias circuit is providing the bias current. The switch is configured to provide a high impedance path when the second node voltage is within a range of a second supply voltage which is less than the first supply voltage.

Abstract: A regulated power supply having power factor correction control includes a multi-vector error amplifier. The multi-vector error amplifier provides an error signal that is used to regulate a switching mechanism of the power supply. The multi-vector error amplifier acts to provide a low distortion error signal during steady-state operation, while responding rapidly and smoothly to sudden load changes.

Abstract: A linear regulator having an output stage including first and second P-channel MOS transistors series connected between a first D.C. supply terminal and an output terminal providing a regulated output voltage, and a circuit for controlling the first and second transistors capable of providing the first and second transistors with first and second control signals according to the output voltage and to the voltage at the midpoint of the series connection.

Abstract: A regulator and related method for providing a regulated voltage. The regulator includes a bipolar junction transistor (BJT) as a charging circuit, a capacitive circuit formed for regulating the regulated voltage by bypass and regulation capacitors, an operational amplifier (OP-AMP), a bandgap circuit, and a pre-charging circuit. The capacitive circuit receives current to establish the regulated voltage. According to the regulated voltage, the OP-AMP biases the base of the BJT to obtain the accurate regulated voltage to control a current conducted to the capacitive circuit by the BJT. When the regulator starts to work, the OP-AMP is disabled to prevent the BJT from providing current. Instead the pre-charging circuit first provides a pre-charging current to charge the capacitive circuit, then the OP-AMP is enabled to turn on the BJT to charge the capacitive circuit and establish the steady-state regulated voltage.

Abstract: An electronic system according to various aspects of the present invention includes a memory and a supply regulation circuit having a regulated output to provide a selected voltage level. In one embodiment, the supply regulation circuit includes a reference voltage circuit connected to the supply and configured to receive a first voltage and a second voltage and provide a reference voltage and a control circuit connected to the reference voltage and configured to control the regulated voltage according to the reference voltage. The supply regulation circuit also includes an adjustment circuit controlled by the control circuit and configured to adjust the regulated voltage according to the reference voltage. The supply regulation circuit may also include a compensator circuit to provide additional adjustment to the regulated voltage.

Abstract: A method and apparatus to dynamically modify the internal compensation of a low drop-out (LDO) voltage regulator is presented. The process involves creating an additional equivalent series resistance (ESR) from an internal circuit. The additional ESR of the internal circuit is sufficient to ensure the DC output stability. This allows the ESR of the output capacitance to be reduced to zero if desired, for improved transient response.

Abstract: A semiconductor device having a regulator circuit includes a transistor having a source and a drain connected to a power supply and an output terminal; first and second voltage divider resistance elements connected in series between ground and the transistor output terminal; a differential operational amplifier that differentially amplifies a reference voltage and a voltage divided by the voltage divider resistance elements, and that supplies the amplified voltages to a gate of the transistor, to control an output voltage of the transistor; and a phase compensation capacitor including an interlayer film between electrode layers and overlaid two-dimensionally on the voltage divider resistance elements. The electrode layer close to the semiconductor substrate is connected to the output terminal of the transistor, and a parasitic capacitance between the output terminal of the transistor and the voltage divider resistance elements compensates a phase lag of a transistor output signal.

Abstract: A method and a circuit to achieve a low drop-out voltage regulator with a wide output load range has been achieved. A fast loop is introduced in the circuit. The circuit is internally compensated and uses a capacitor to ensure that the internal pole is more dominant than the output pole as in standard Miller compensation. The quiescent current is set being proportional to the output load current. No explicit low power drive stage is required. The whole output range is covered by one output drive stage. By that means the total consumption of quiescent or wasted current is reduced. An excellent PSRR is achieved due to load dependent bias current.

Abstract: A power supply circuit relating to the present invention comprises a differential amplifier for feeding out a voltage as a control voltage in accordance with a difference between a feedback voltage commensurate with an output voltage and a reference voltage, an output current control element for feeding out an output current in accordance with the control voltage fed thereto from the differential amplifier, an output line by way of which the output current is supplied to a load, a feedback line by way of which a voltage on the output line is fed back as the feedback voltage to the differential amplifier, the feedback line connected to the output line, and a clamping circuit for maintaining the control voltage so as not drop below a predetermined value.

Abstract: A voltage regulator comprises a differential amplifier for comparing an output of a reference voltage circuit with an output of a voltage dividing circuit and outputting a first signal and a phase compensating circuit having a resistor and a capacitor connected in series. A MOS transistor is connected between a power supply and the phase compensating circuit and has a gate electrode connected to receive the output of the differential amplifier and a grounded source. A constant current circuit is connected between the MOS transistor and ground, and an output transistor having a gate electrode connected to receive a second signal output from a connection point between the MOS transistor and the phase compensating circuit is connected between the power supply and the voltage dividing circuit.

Abstract: A low drop-out voltage regulator circuit includes: a MOS pass through transistor 12; a resistor feedback circuit 18 and 20 coupled to the MOS pass through transistor 12; an amplifier 16 having an input coupled to the resistor feedback circuit 18 and 20; a Class A output stage 22 coupled between an output of the amplifier 16 and a gate of the MOS pass through transistor 12; and a speedup circuit 48 coupled between the output of the amplifier and the gate of the MOS pass through transistor.

Abstract: A device power supply includes an amplifier, a high output-side force terminal connected to the output of the amplifier, a high-output side sense terminal, and a first feedback circuit from the high output-side sense terminal to the input of the amplifier, where there is a first low-pass filter in between the amplifier output and the first feedback circuit.

Abstract: A regulator circuit with at least two independently selectable and adjustable adjustment circuits. Each adjustment circuit may be connected across a standard voltage divider circuit used to create a reference voltage for operating a voltage pump. Between each adjustment circuit and the voltage divider circuit is an associated connection circuit that is controlled by an associated control signal. When activated by its respective control signal, the connection circuit connects its associated adjustment circuit to the voltage divider circuit so that the reference voltage is generated by the voltage divider as adjusted by the connected adjustment circuit. The amount of adjustment each adjustment circuit can introduce is independently selectable, the regulator circuit can adjust the operation of the pump for different modes of operation and can compensate for process variations without the need to re-design, re-mask or re-fabricate the circuitry.

Abstract: An LDO regulator automatically switches from the SLEEP mode to the ON mode without the need for an externally generated control signal. The LDO regulator utilizes a pair of drive amplifiers to drive a SLEEP mode pass transistor and a normal ON mode pass transistor, respectively. The regulator also has a circuit for adjusting the bias applied to the amplifiers for each mode of operation.

Abstract: A power supply controller for electronic circuits, supplying a power supply voltage (VDC) and preventing operation of the said circuit by using a RESET signal when the said power supply voltage is less than a first predetermined threshold. The controller includes a first comparator (C2) comparing a voltage proportional to the power supply voltage with a reference voltage and activating the reset signal when the voltage proportional to the power supply voltage is less than the reference voltage. A bandgap module supplies a principal reference voltage (VBGAP). Preliminary reference devices immediately supply a preliminary reference voltage (V09), less than the principal reference voltage. Control circuits receive the preliminary reference voltage (V09) and the principal reference voltage (VBGAP) and automatically activate the RESET signal for as long as the principal reference voltage (VBGAP) has not reached a second predetermined threshold.

Abstract: A sequencing system for sequencing a first node voltage at a first node and a second node voltage at a second node which is less than the fire node voltage is disclosed. The sequencing system includes a bias circuit configured to provide a bias current in response to the first node voltage beginning to change to a first supply voltage. The sequencing system includes a switch configured to provide a low impedance path between the first node and the second node when the bias circuit is providing the bias current. The switch is configured to provide a high impedance path when the second node voltage is within a range of a second supply voltage which is less than the first supply voltage.

Abstract: The DC-DC converter circuit has a converter unit for conversion of an input voltage to an output voltage; a first capacitor for maintaining a value of the output voltage for a predetermined holdover time; a charging circuit for charging the capacitor with a supply voltage that is greater than the input voltage and a discharging circuit for providing charge to the converter circuit from the charged capacitor when the input voltage is interrupted, whereby the output voltage is maintained for a predetermined holdover time.

Abstract: A voltage stabilization circuit is configured between two signal lines. Each of the signal lines carries a signal, and an interference signal is superimposed on at least one of the signals. The voltage stabilization circuit includes an amplifier circuit that provides an anti-phase signal obtained as an amplified difference between the interference signal and a reference signal. The anti-phase signal has a phase that is opposite the phase of the interference signal. The configuration further includes a matching circuit, which is connected in series with the amplifier circuit, and which generates a compensation signal from the anti-phase signal and superimposes the compensation signal on the signal that is superimposed with the interference signal.

Abstract: A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cells' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half the current of the memory cell. The reference voltage is then applied to other reference cells in a memory array.

Abstract: An apparatus and method for significantly reducing the initial set-point error and voltage margining accuracy of a DC/DC converter. The initial set-point error is reduced by utilizing the remote sense lines of a DC/DC converter to sense the voltage from the DC/DC converter that is actually applied to the load. A power supply controller having inputs coupled to the remote sense lines compares the sensed voltage to a precision voltage reference and provides an output voltage to the TRIM input of the DC/DC converter. The apparatus and method may be implemented in a voltage supply margining test set-up to test the functionality of an electronic device while the DC/DC converter supplies a voltage to the device that is at either the upper or lower margin of an acceptable supply voltage range of the device.

Abstract: A direct-current to direct-current conversion (DC/DC) apparatus includes a control circuit having an error amplifier for voltage control and controlling a direct-current to direct-current conversion based on a pulse width modulation control using an output of the error amplifier. The error amplifier inputs a voltage signal corresponding to an output voltage of a DC/DC result and a plurality of reference voltage signals. The DC/DC apparatus also includes a soft start capacitor to provide one of the plurality of reference voltage signals. The error amplifier amplifies a difference between the voltage signal corresponding to the output voltage of a DC/DC result and a voltage signal of a lower potential among the plurality of reference voltage signals and, based on the amplified output, carries out the pulse width modulation control.

Abstract: Provided is a voltage regulator which has an improved overshoot characteristic. Only in the case where a voltage to which an output voltage is to be controlled is higher than a desirable value, an operating current of an error amplifier composing the voltage regulator to a temporarily large value is controlled to obtained the improved overshoot characteristic.

Abstract: A high-voltage regulator circuit (1) delivering at least a first regulated output voltage (VREG1, VREG2) from a high input voltage (VHV), this regulator circuit including an external regulation device (2) including an input terminal (21) to which said high input voltage is applied, an output terminal (22) at which said first regulated output voltage is delivered, and a control terminal (23) connected to a control circuit (10) of the external regulation device. The external regulation device (2) is controlled by a differential amplifier (4) to the inputs of which are respectively applied a divided voltage proportional to the first regulated output voltage and a determined reference voltage (VREF), the output of this differential amplifier controlling the conduction state of the external regulation device (2) through a high-voltage MOSFET transistor (3) connected via its drain to the control terminal (23) of the external regulation device (2).

Abstract: A voltage-regulating circuit uses a combination of a longitudinal regulator circuit with a switched charge-pumping circuit. The longitudinal regulator circuit contains a transistor, a first resistor, and a zener diode. The charge-pumping circuit has a second resistor, a capacitor and a switched voltage source lying in series between the output potential of the voltage-regulating circuit and a chassis ground potential. The anode of a diode is connected to a point between the second resistor and the capacitor, while the cathode of the diode is connected to the controlling signal input of the transistor.

Abstract: An amplifier circuit which includes a differential amplifier, drive circuitry for driving an output of the amplifier circuit in response to an output of the differential amplifier and frequency compensation circuitry switchable between a low current mode and a high current mode of operation. Control circuitry is provided configured to switch the frequency response circuitry between the low and high current modes in response to a magnitude of current provided to a load connected to the amplifier circuit output. In the low current mode, the frequency compensation circuitry produces a frequency response having a first pole located at a first frequency. In the high current mode, the frequency compensation circuitry produces a zero at a second frequency sufficiently close to the first frequency so as to stabilize the amplifier circuit, with the first zero being absent for the frequency response in the low current mode.