Abstract: A voltage control circuit accepts an input voltage and produces a regulated output voltage. Embodiments provide improved responsiveness to variations in input voltage, load current, and ambient temperature. Exemplary embodiments include an NPN transistor connected between the input and output terminals, which is controlled by a feedback circuit. In an embodiment, the feedback circuit includes a PMOS transistor and in another embodiment the feedback circuit includes a PNP transistor.

Abstract: This invention includes a bias origination section configured to originate an original bias voltage; a comparison section configured to compare the original bias voltage and a comparison voltage, and output a comparison result; a resistive divider section composed by a resistance circuit including a variable resistor section having a resistor and a switch, and configured to generate the comparison voltage; a bias decision control section configured to determine bias decision data for controlling a resistance value of the variable resistor section so as to bring the comparison voltage close to the original bias voltage, based on a comparison result of the comparison section; and a storage section configured to hold the bias decision data and also output the comparison voltage as a bias voltage by controlling a resistance value of the variable resistor section based on the held bias decision data, thereby generating a low-noise bias with a small area.

Abstract: A circuit for converting first and second differential input signals into an output signal is provided with a first differential input stage comprising first and second inputs for receiving the first differential input signal and comprising first and second outputs and with a second differential input stage comprising third and fourth inputs for receiving the second differential input signal and comprising third and fourth outputs and with an output stage comprising a first terminal connected to the first output that is further connected to the third output and comprising a second terminal connected to the second output that is further connected to the fourth output and comprising a third terminal for providing the output signal, to avoid complex operational amplifiers. The differential input stages comprise two pairs of transistors and the output stage comprises a current mirror with a third pair of transistors.

Abstract: A multimode voltage regulator circuit includes a linear regulator sub-circuit configured to supply current to a load in a low-current mode, responsive to a first control signal from a first control path, as well as a switching regulator sub-circuit configured to supply current to the load in a high-current mode, responsive to a second control signal from a second control path. The circuit further comprises a shared error amplifier configured to generate an error signal based on the difference between a reference voltage and a feedback signal coupled from the load, and a switch configured to selectively route the error signal to the first control path in the low-current mode and to the second control path in the high-current mode.

Abstract: A current control system comprising at least one series arm including a linear series regulator for generating a manipulated variable signal, wherein the linear series regulator is connected to a semiconductor control element which is connected to a supply voltage referenced to a ground potential, and the semiconductor control element includes an output voltage at its output side relative to the ground potential. A reference signal fed to the series regulator, a current measurement signal, and the manipulated variable signal are referenced to the ground potential, where the manipulated variable signal is fed to a subtractor which subtracts the difference of the feed voltage minus the output voltage from the manipulated variable signal, and the generated output signal of the subtractor is fed to the semiconductor control element as a corrected manipulated variable signal.

Abstract: Voltage regulators are provided. In one embodiment of the voltage regulators, a differential amplifier receives a reference voltage and a feedback voltage, to generate a control signal according to a voltage difference between the feedback voltage and the reference voltage. An output transistor has a first terminal coupled to a power voltage, a control terminal coupled to the differential amplifier for receiving the control signal, and a second terminal coupled to an output terminal. A voltage feedback circuit is coupled between the output terminal and a ground voltage to generate the feedback voltage. A discharge transistor has a first terminal coupled to the ground voltage, a control terminal coupled to a first control signal, and a second terminal coupled to the output terminal through a first resistor in the voltage feedback circuit.

Abstract: A charge pump in a low dropout (LDO) regulator includes a first capacitor coupled to an output of an amplifier and to a gate of a pass transistor. A first plurality of switches is operable to couple a second capacitor between an output of the LDO regulator and to a ground in a first clock phase, such that the second capacitor charges to an output voltage. A second plurality of switches is operable to couple the second capacitor in parallel to the first capacitor in a second clock phase such that the second capacitor charges the first capacitor.

Abstract: The present invention relates to a converter circuit and a conversion method for converting an input signal of a first value to an output signal of a second value based on a switched operating mode, wherein an output feedback loop (40) and an additional input forward control loop (60) are provided. The additional input forward control loop (60) serves to correctly control a switching parameter not only with respect to the output load but also over a wide input voltage range. This leads to an improved power efficiency and reliability of the converter circuit.

Abstract: A linear regulator is provided which stabilizes an input voltage based on a reference voltage source that generates a reference voltage, and the reference voltage generated by the reference voltage. An output voltage of the linear regulator is supplied as a power supply voltage of a switching controller and the reference voltage source. The linear regulator is configured to enable switching of a regulation mode in which voltage is outputted according to the reference voltage, and a bypass mode in which an input voltage is outputted as it is, with no relation to the reference voltage. When a power supply apparatus is started up, during a time period until the input voltage reaches a predetermined threshold voltage, the linear regulator operates in the bypass mode, and when the input voltage exceeds the threshold voltage, operates in the regulation mode.

Abstract: A regulator circuit stabilizes the input voltage applied to an input terminal before outputting the output voltage via an output terminal. An output transistor is provided between the input terminal and the output terminal. An error amplifier adjusts the voltage applied to the control terminal of the output transistor such that a voltage that corresponds to the output voltage approaches a predetermined reference voltage. A fluctuation detection capacitor is provided on a path from the input terminal to the grounded terminal. One terminal of the fluctuation detection capacitor is set to a fixed electric potential. In a case that the input voltage is lower than the voltage at the other terminal of the fluctuation detection capacitor, an undershoot suppressing circuit forcibly reduces the gate voltage of the output transistor.

Abstract: A digital circuit implementing pulse width modulation controls power delivered in what one can model as a second order or higher order system. An exemplary control plant could embody a step-down switch mode power supply providing a precise sequence of voltages or currents to any of a variety of loads such as the core voltage of a semiconductor unique compared to its input/output ring voltage. One of several algorithms produce a specific predetermined sequence of pulses of varying width such that the voltage maintains maximally flat characteristics while the current delivered to the load from the system plant varies within a range bounded only by inductive element continuous conduction at the low power extreme and non-saturation of the inductor core at the high power extreme.

Abstract: The LDO has at least three stages supplied by a supply voltage. A first stage has a differential amplifier and a folded cascode device with a regulated current mirror. The LDO has two nodes that are configured to couple the differential amplifier and the regulated current mirror and to receive a differential signal, respectively. The regulated current mirror is configured to convert and amplify the differential signals to a single ended signal. Said LDO has a first capacitor configured for frequency compensation, said first capacitor coupled between said first stage and a second stage. The LDO has a second capacitor for balancing capacitive loading of a first cascode circuit, said second capacitor coupled between said first stage and said supply voltage. Said first cascode circuit is configured to suppress different voltages between input and output of the capacitors caused of a modulation of said supply voltage.

Abstract: A method for charging a battery of an electronic device using a connected a/c power adapter comprising the steps of determining a state of a transistor connecting a regulated voltage to the battery and switching a charging current applied to the battery between a quick charge level and a trickle charge level responsive to the state of the transistor.

Abstract: An output driver circuit having an input stage and an output stage, wherein the output stage and the input stage are configured to function as (1) a low-frequency voltage follower and (2) a high-frequency feedback loop for the output driver circuit. In operation, the low-frequency follower and the high-frequency feedback loop may precisely regulate the output voltage of the output driver circuit when large load transients occur. A compact charge pump may be used to supply additional voltage required to operate a current mirror of the output driver circuit.

Abstract: In one embodiment, a closed loop control system is caused to operate in an open loop configuration. At some time while operating in the open loop configuration the system detected the presence or absence of a.c. signals in an output signal of the system in order to detect the presence or absence of a failure of a control loop element, such as an output capacitor.

Abstract: In one embodiment, a power supply controller is configured to form both positive and negative supply voltages from a single input voltage so the maximum differential voltage across a load that uses the positive and negative supply voltages is no greater than the maximum value of the input voltage.

Abstract: A voltage regulator includes a first multi-gate transistor, a differential stage, a second stage having a second multi-gate transistor, and a pass transistor to apply an output voltage and output current to a device load. Based on a feedback voltage associated with the output voltage, the differential stage modulates a bias voltage applied to a control electrode of the pass transistor. A first gate of the second multi-gate transistor generates a nominal bias current for the pass transistor, and the second gate adjusts the bias voltage based on an output of the differential stage so that transients in the regulator output voltage resulting from sudden changes in current drawn by the device load are reduced.

Abstract: A method of switching a low dropout regulator includes determining an actual active time of a power request from an electronic device; enabling the low dropout regulator in response to said power request at a time corresponding to a start of the actual active time of the power request for an active enabled time having a duration at least the same as the actual active time and long enough to sufficiently settle the output voltage of the low dropout regulator; and disabling the low dropout regulator. In embodiments, the active enabled time is prolonged beyond the actual active time of the power request for all or at least some power requests. An electronic device includes circuits for controlling the switching of a low dropout in the described manner.

Abstract: A load control circuit, such as a light-emitting diode (LED) driver, for controlling the amount of power delivered to an electrical load, such as an LED light source, comprises a regulation transistor adapted to be coupled in series with the load, and a feedback circuit coupled in series with the regulation transistor, whereby the load control circuit is able to control the magnitude of a load current conducted through the load from a minimum load current to a maximum load current, which is at least approximately one thousand times larger than the minimum load current. The feedback circuit generates at least one load current feedback signal representative of the magnitude of the load current. The regulation transistor operates in the linear region to control the magnitude of the load current conducted through the load in response to the magnitude of the load current determined from the load current feedback signal.

Abstract: A digital linear voltage regulator includes a comparator, a finite state machine, and a current digital-to-analog converter (DAC). The comparator is preferably coupled to receive a reference voltage and an operating voltage supplied to a dynamic load. The comparator generates, during a clock cycle, a binary output based on a comparison between reference and operating voltages. The finite state machine (FSM) is coupled to receive at least one control signal that indicates a target operating state for the digital linear voltage regulator. The FSM receives the binary output from the comparator and generates a digital word, during a clock cycle, based on the target operating state of the digital linear voltage regulator and on the binary output. The current DAC is coupled to the FSM, receives the digital word and delivers current at the desired voltage to the dynamic load.

Abstract: A voltage regulator has a device for regulating an output voltage, having an input to receive an input voltage and an output to deliver an output voltage of a constant level, and a device for correcting a drop-out voltage violation, coupled to the device for regulating, to determine an occurrence of a drop-out voltage violation and to cause the device for regulating to change the level of the output voltage upon detection of the drop-out voltage violation. A method for regulating an output voltage has the steps of receiving an input voltage, generating and outputting a regulated output voltage of a constant level, monitoring occurrence of a drop-out voltage violation, and causing a change of the level of the output voltage upon detection of the drop-out voltage violation.

Abstract: Provided is a voltage regulator capable of securely preventing a reverse current from an output terminal (122) with lower current consumption, irrespective of magnitude of a voltage of a VDD terminal (121). Such a configuration is adopted that the voltage of the VDD terminal (121) and a voltage of the output terminal (122) of the voltage regulator are compared with each other with the use of a voltage generated between a transistor and a constant current circuit, to thereby reduce current consumption of a backup battery. Besides, such a configuration is also adopted that a gate of an output transistor is connected with the output terminal (122) based on an output of a comparator circuit, to thereby prevent the reverse current securely.

Abstract: Circuits and methods that improve the performance of voltage reference driver circuits and associated analog to digital converters are provided. A voltage reference driver circuit that maintains a substantially constant output voltage when a load current is modulated by an input signal is provided. The voltage reference driver circuit synchronously decouples a voltage regulation circuit from the load circuit when modulating events such as pulses caused by the load circuit during a switching interval are generated, preventing disturbance of the regulation circuitry and keeping its output voltage substantially constant.

Abstract: A power measurement system is disclosed for use on an integrated circuit for measuring the power used by the integrated circuit. The power measurement system includes a low-dropout voltage regulator and a signal input unit. The low-dropout voltage regulator includes a power transistor that couples a supply voltage to a circuit to be powered by the supply voltage, and the low-dropout voltage regulator provides an internal adjustment signal (Vsen) for adjusting the internal resistance of the power transistor. The signal input unit receives the internal adjustment signal (Vsen) and provides a power measurement signal responsive to the internal adjustment signal (Vsen).

Abstract: The present invention provides a low dropout (LDO) regulator with a stability compensation circuit. A “zero frequency” tracking as well as “non-dominant parasitic poles' frequency reshaping” are performed to achieve a good phase margin for the LDO by means of the compensation circuit. In this compensation method neither a large load capacitor nor its equivalent series resistance is needed to stabilize a regulator. LDO regulators, in system on chip application, having load capacitors in the range of few nano-Farads to few hundreds of nano-Farads can be efficiently compensated with this compensation method. A dominant pole for the regulator is realized at an internal node and the second pole at an output node of the regulator is tracked with a variable capacitor generated zero over a range of load current to cancel the effect of each other. A third pole of the system is pushed out above the unity gain frequency of the open loop transfer function with the help of the frequency compensation circuit.

Abstract: An integrated circuit assembly includes a voltage level generator, a level shifter, a bandgap reference generator and a voltage regulator. The voltage level generator generates output voltage level signals in response to a supply voltage. The level shifter receives the output voltage level signals from the voltage level generator and generates first and second sets of control signals. The bandgap reference generator receives a reference voltage input and generates a bandgap reference signal. The voltage regulator receives a supply voltage, the bandgap reference signal the first and second sets of control signals from the level shifter and generates a constant output voltage under varying circuit conditions.

Abstract: A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device.

Abstract: A charging unit charges a capacitor that is configured to be charged and discharged to drive a load. A switching unit switches on and off between the capacitor and the charging unit. A delay control unit delays an output of a switching control signal for controlling the switching unit until an output voltage of the charging unit exceeds a voltage of the capacitor, and outputs a delayed switching control signal. An output unit receives the delayed switching control signal from the delay control unit, and outputs the delayed switching control signal to the switching unit so that the charging unit charges the capacitor.

Abstract: A semiconductor integrated circuit device (IC1) comprises a semiconductor chip (CHIP1), a first frame lead (FR1), and a second frame lead (FR2). The semiconductor chip (CHIP1) includes common-base transistors (P1, P2), pads (T11, T12) connected to the respective emitters of the common-base transistors (P1, P2), pads (T21, T22) connected to the respective collectors of the common-base transistors (P1, P2), and a means (DRV, ERR, E1) for generating a base signal. The pads (T11, T12) are connected through the respective bonding wires (W11, W12) to the first frame lead (FR1). The pads (T21, T22) are connected through the respective bonding wires (W21, W22) to the second frame lead (FR2). This structure can easily detect breaking of the bonding wires connected in parallel.

Abstract: According to one embodiment, a power supply circuit includes a power switch section, an error amplifier, a wiring and a reset switch section. The error amplifier has one input portion connected to the output terminal, the other input portion and an output portion. The error amplifier outputs the control potential via the output portion to make the resistance of the power switch section high so that potential applied to the one input portion is high to potential applied to the other input portion. The wiring connects a reference terminal to the other input potion. In addition, the reset switch section is configured to isolate the wiring from a baseline potential when the input terminal is supplied with a potential, and to connect the wiring to the baseline potential when the input terminal is not supplied with the potential.

Abstract: A power management circuit includes a regulator circuit, a first frequency compensation circuit, a first switch circuit and a detection circuit. The regulator circuit includes a signal output end. The first switch circuit is turned on in response to an enabled first control signal such that the first frequency compensation circuit is coupled to the regulator circuit. The detection circuit determines whether an output capacitor is coupled to the signal output end, and generates the enabled first control signal to turn on the first switch circuit and connect the first frequency compensation circuit to the regulator circuit when the output capacitor is not coupled to the signal output end. Therefore, the regulator circuit is frequency compensated by the first frequency compensation circuit.

Abstract: A bandgap voltage reference circuit includes a first circuit portion and a second circuit portion. The first circuit portion generates a voltage complimentary to absolute temperature (VCTAT). The second circuit portion generates a voltage proportional to absolute temperature (VPTAT) that is added to the VCTAT to produce a bandgap voltage reference output. The first circuit portion includes a plurality of delta base-emitter voltage (VBE) generators, connected as a plurality of stacks of delta VBE generators. Each delta VBE generator can include a pair of transistors that operate at different current densities and thereby generate a difference in base-emitter voltages (?VBE). The plurality of delta VBE generators within each stack are connected to one another, and the plurality of stacks of delta VBE generators are connected to one another, such that the ?VBEs generated by the plurality of delta VBE generators are arithmetically added to produce the VPTAT.

Abstract: A linear voltage regulator is provided having a first transistor connected between a terminal for an input voltage and a terminal for an output voltage, a reference voltage source for producing a reference voltage, a first resistor, a second resistor, a second transistor, wherein the first resistor, the second resistor, and the second transistor are series-connected between the terminal for the output voltage and a reference voltage, and constitute a voltage divider, wherein a divided output voltage is present at a tap of the voltage divider, and also having a differential amplifier with an inverting input and a non-inverting input, wherein the inverting input is connected to the reference voltage source, the non-inverting input is connected to the tap of the voltage divider, and an output terminal of the differential amplifier is connected to a control terminal of the first transistor.

Abstract: A MOSFET current limiting circuit, a linear voltage regulator, and a voltage converting circuit are provided. A current limiting value of the MOSFET is adjusted with the temperature or the voltage drop across the drain and the source of the MOSFET. Accordingly, it is ensured that the MOSFET operates in the safe operating area in any situation. Therefore, the MOSFET is prevented from being burnt out, and the reliability thereof is also increased.

Abstract: The present invention discloses a control apparatus for a linear compressor which can vary a cooling force and prevent an inrush current. The control apparatus for the linear compressor includes a coil winding body laminated on the linear compressor, a first capacitor connected in series to the coil winding body, a capacitance varying unit being formed in a parallel structure to the first capacitor, and having a capacitor switch, and a control unit for inducing an output change of the linear compressor, by varying the whole capacitance of the control apparatus by controlling the capacitor switch.

Abstract: A switch circuit to control a high voltage source is presented. It includes a JFET transistor, a resistive device, a first transistor and a second transistor. The JFET transistor is coupled to the high voltage source. The first transistor is connected in serial with the JFET transistor to output a voltage in response to the high voltage source. The second transistor is coupled to control the first transistor and the JFET transistor in response to a control signal. The resistive device is coupled to the JFET transistor and the first transistor to provide a bias voltage to turn on the JFET transistor and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the JFET transistor is negative biased.

Abstract: A low dropout regulator includes an error amplifier, an N-type depletion MOSFET, a first switch, a second switch, a low-pass filter resistor, and a low-pass filter capacitor. By switching on both the first switch and the second switch, a voltage level of an output node at a negative input terminal of the error amplifier may be rapidly raised to be close to and lower than a voltage level of an input node at a gate of the N-type depletion MOSFET. Both the first switch and the second switch are then switched off immediately so that the voltage level of the output node is gradually raised to be equal to the voltage level of the input node through the low-pass filter resistor.

Abstract: A two-gain-stage linear error amplifier is provided with frequency compensation and independently selectable stage gains and a reasonably small compensation capacitor to promote stability with a reasonable phase margin over a wide load range so that the invention is useful as a low drop out (LDO) voltage regulator circuit device that is stable over a wide load range.

Abstract: A power supply regulator including a variable current limit threshold that increases during an on time of a switch. In one aspect, a power supply regulator includes a comparator that has a first input coupled to sense a voltage representative of a current flowing through a switch during an on time of the switch. The comparator has a second input coupled to receive a variable current limit threshold that increases during the on time of the switch. A feedback circuit is coupled to receive a feedback signal representative of an output voltage at an output of a power supply. A control circuit is coupled to generate a control signal in response to an output of the comparator and in response to an output of the feedback circuit. The control signal is to be coupled to a control terminal of the switch to control switching of the switch.

Abstract: A voltage regulator circuit includes a digital control block, an amplifier and a transistor. The digital control block receives a first reference voltage and a feedback voltage, converts the received voltages from analog to digital signals, performs an integration operation on the converted signals, and converts the result of the integration operation to an analog signal. The amplifier is responsive to the output of the digital control block and to a regulated output voltage of the regulator circuit. The transistor has a first terminal responsive to the output of the amplifier, a second terminal that receives the input voltage being regulated, and a third terminal that supplies the regulated output voltage. The transistor may be an NMOS or a bipolar NPN transistor. The feedback voltage may be generated by dividing the regulated output voltage. The digital control block optionally generates a biasing signal to bias the amplifier.

Abstract: A battery charger for a portable electronic device includes a linear charger to generate a substantially constant current for charging the battery and a switching voltage regulator to convert power supplied by an external adapter to a supply voltage for the linear charger. A feedback circuit controls operation of the switching voltage regulator so that the voltage supplied to the linear charger is substantially equal to the combination of the battery voltage and the drain-to-source voltage of the linear charger. In this way, power dissipation by the linear charger is minimized without requiring the use of a high accuracy current limited adapter.

Abstract: A multi-stage power supply for a load control device is able to operate in a low-power mode in which the power supply has a decreased power consumption when an electrical load controlled by the load control device is off. The load control device comprises a load control circuit and a controller, which operate to control the amount of power delivered to the load. The power supply comprises a first efficient power supply (e.g., a switching power supply) operable to generate a first DC supply voltage. The power supply further comprises a second inefficient power supply (e.g., a linear power supply) operable to receive the first DC supply voltage and to generate a second DC supply voltage for powering the controller. The controller controls the multi-stage power supply to the low-power mode when the electrical load is off, such that the magnitude of the first DC supply voltage decreases to a decreased magnitude and the inefficient power supply continues to generate the second DC supply voltage.

Abstract: A low drop out linear regulator is provided. The low drop out linear regulator comprises an output PMOS, a load, a discharging circuit and an operational amplifier. The output PMOS comprises a source connected to a power supply and a drain having an output voltage and an output current. The drain is connected to a load circuit having a heavy and a light load period. The load is connected to the drain to generate a divided output voltage. The discharging circuit is connected to the drain to discharge the output current from the drain. The operational amplifier is to generate a control voltage according to the divided output voltage and a reference voltage; when the load circuit switches from the heavy to the light load period to make the divided output voltage higher than the reference voltage, the control voltage turns off the output PMOS and activates the discharging circuit.

Abstract: Regulating voltages. At least some of the illustrative embodiments are systems including a switching circuit configured to produce an intermediate voltage signal from an input voltage signal, and a first voltage regulator coupled the switching circuit and configured to produce a first regulated voltage signal from the intermediate voltage signal. The switching circuit is configured to create the intermediate voltage signal based on a switching signal having a duty cycle, and wherein the duty cycle of the switching signal is open-loop with respect the intermediate voltage signal and the first regulated voltage signal.

Abstract: Systems and methods for increasing driver power dissipation efficiency in a low noise current supply utilizing a power supply and a voltage regulator to power an output current regulator. An analog processing circuit adjusts the voltage drop on the voltage regulator, to make it equal with the voltage drop on current regulator.

Abstract: Techniques pertaining to designs of a compensation voltage controlled current source (VCCS) used in low dropout voltage regulators are disclosed. According to one aspect of the present invention, a compensation voltage controlled current source (VCCS) is so designed to meet the low input/output voltage requirements. Various features of the VCCS are demonstrated through several embodiments.

Abstract: A voltage controlled current source circuit is utilized to clamp the internal compensation node of a low dropout (LDO) regulator with an NMOS output during load transients. The circuit senses a voltage drop of the internal node and mirrors its current to the internal node to hold the internal node voltage when the voltage starts to drop low enough to turn off the output transistor.

Abstract: This invention relates a green-energy power generator for electrical discharge machine, which comprise: an alternating current (AC) power supply, an AC-to-DC power converter, a DC-to-DC power converter, a current limiting unit, a time limiting unit, and a control unit. It can reduce the unnecessary energy consumption and achieve the objective of energy saving.

Abstract: Various voltage regulators and/or voltage regulation systems are disclosed. For example, a voltage regulation system that includes a source follower output is disclosed. The source follower output includes a transistor where the source of the transistor provides a baseline voltage to a regulated voltage output node. The voltage regulation system further includes a body damping circuit and a low speed feedback circuit. The body damping circuit is electrically coupled to the body of the transistor, and is operable to provide a rapid opposition to any voltage disturbance at the regulated voltage output node. The low speed feedback circuit is electrically coupled to the gate of the transistor, and is operable to return the regulated voltage output node to the baseline voltage.

Abstract: Each of three-phase arm of an inverter has first and second switching elements connected in series together at a connection point to the corresponding phase coil of the three-phase motor. Control device turns on the first switching element of the i-th (i is a natural number smaller than four) for a predetermined time period, and determines that the second switching element of the i-th arm has a short fault, when an overcurrent exceeding a predetermined threshold is detected within the predetermined time period. The predetermined time period is shorter than a time period from a time point of turning on the first switching element of the i-th arm to a time point of attaining the predetermined threshold by a current flowing through a path extending from a power supply line through the second switching element of the remaining arm other than the i-th arm to a ground line.