Abstract: A low dropout (LDO) voltage regulator includes an output terminal for providing a regulated voltage output to a load, and a plurality of PFETs connected in parallel. Each PFET drains a level of current and the sum of the levels of current are provided as a current output at the output terminal. The LDO voltage regulator also includes a feedback network coupled to the output terminal for providing a voltage feedback signal, and an error amplifier coupled between the plurality of PFETs and the feedback network for sensing a differential voltage. The error amplifier includes an output voltage which is provided to the plurality of PFETs for adjusting the drain of current from each PFET. A summation of the drains of current from each PFET is provided as the current output to regulate the voltage output at the output terminal. Each PFET drains a current level of I0/n and the summation of the drains of current is the current output I0.

Abstract: A power supply device of controlling feedback synchronization is connected to an electric power source for obtaining an input power and includes first and second converters for modulating the input power. The first and second converters include first and second output terminals for providing first and second output power respectively. The power supply device further includes a feedback synchronization unit electrically coupled to the first and second output terminals of the first and second converters for obtaining first and second feedback signals, and producing and transmitting a synchronous feedback signal to the second converter according to a voltage difference of the first and second feedback signals to synchronizing output voltage level of the second converter with the first converter. The aforementioned circuit can control the synchronization of a voltage boost time and output time of the first and second converters.

Abstract: A system and a method are disclosed for providing a low drop out circuit that can efficiently and correctly handle a wide range of input voltages. A power supply control circuit is provided for a low drop out circuit that comprises an operational amplifier that is coupled to a low drop out transistor. A switcher circuit provides one of a plurality of operating voltages to the low drop out transistor. The power supply control circuit provides a value of an operating voltage to the operational amplifier that enables the operational amplifier to operate the low drop out transistor in a manner that prevents the low drop out transistor from being out of control.

Abstract: AC-coupled equivalent series resistance (ESR) is introduced into a control circuit to provide additional stability in the feedback control loop. A sub-circuit emulates the effect of a higher value ESR in the output capacitor. The additional ESR in the feedback control loop inserts a zero into the transfer function that describes the circuit response at a desired frequency. The added zero compensates for the effects of unwanted or unavoidable poles in the transfer function, allowing for a greater range of input signal frequencies.

Abstract: A digital circuit implementing pulse width modulation controls power delivered in what one can model as a second order or higher order system. An exemplary control plant could embody a step-down switch mode power supply providing a precise sequence of voltages or currents to any of a variety of loads such as the core voltage of a semiconductor unique compared to its input/output ring voltage. One of several algorithms produce a specific predetermined sequence of pulses of varying width such that the voltage maintains maximally flat characteristics while the current delivered to the load from the system plant varies within a range bounded only by inductive element continuous conduction at the low power extreme and non-saturation of the inductor core at the high power extreme.

Abstract: A voltage regulator is disclosed that includes an output transistor outputting a current according to an input control signal to an output terminal; a control circuit part controlling the operation of the output transistor; a switching circuit part connecting the substrate gate and the gate of the output transistor to one of the input terminal and the output terminal and one of the output of the control circuit part and the output terminal, respectively, in accordance with the relationship in magnitude between a voltage at an input terminal and a voltage at the output terminal; a first rectifier element connected between the input terminal and a power supply end; and a second rectifier element connected between the output terminal and the power supply end.

Abstract: A low dropout voltage regulator includes an error amplifier, a voltage divider, and a voltage reference/amplifier circuit. The error amplifier has first and second input terminals, a power supply terminal for receiving an input voltage, and an output terminal for providing a regulated output voltage. The voltage divider provides a feedback voltage as a predetermined fraction of said regulated output voltage. The voltage reference/amplifier circuit provides a first voltage to said first input terminal of said error amplifier that varies inversely with variations of said feedback voltage, and provides a second voltage to said second input terminal of said error amplifier that varies by substantially the same amount over temperature as variations in said first voltage.

Abstract: An electronic device has an LDO regulator for varying loads. The LDO regulator includes a primary supply node coupled to a primary voltage supply. An output node provides a secondary supply voltage and a load current. A bias current source generates a bias current. A gain stage coupled to the bias current source increases the maximum available load current. The gain stage includes a first MOS transistor biased in weak inversion coupled to a current mirror which mirrors the drain current through the first MOS transistor to the output node. The gate-source voltage of the first MOS transistor increases in response to a decreasing secondary supply voltage level at the output node to increase the available load current.

Abstract: A linear voltage regulator comprises a transistor for converting a supply voltage to an output voltage. By directly monitoring the supply voltage and thereby rapidly responding when the supply voltage suffers a ripple, the linear voltage regulator enhances the stability of the output voltage.

Abstract: A circuit comprises an inductive load. The circuit further comprises an energy-absorbing component operably coupled to the inductive load and arranged to absorb energy generated by the inductive load.

Abstract: A method and apparatus for a Regulator that automatically configures to work in either SMPS mode or linear mode are disclosed. In one embodiment, the method includes inputting a constant current source to a CBoot_pin for a first predetermined amount of time upon enabling an autodetect circuit by a Regulator control circuit. The CBoot voltage at the CBoot_pin is then determined to see if the CBBoot voltage at the CBoot_pin is above a predetermined CBoot voltage for a second predetermined amount of time. The Regulator is then switched to operate in SMPS mode if the CBoot voltage is substantially continuously above the predetermined CBoot voltage for a second predetermined amount of time. The SMPS is operated in linear mode if the CBoot voltage is substantially continuously below or equal to the predetermined CBoot voltage for a second predetermined amount of time.

Abstract: A projection apparatus comprises a projection control unit, power supply device and fan. The projection control unit generates an image beam. The power supply device comprises a filter and voltage driving unit. The voltage driving unit is coupled to the filter and comprises a voltage-regulation feedback unit and current amplification component. The filter receives a PWM signal and accordingly outputting a first DC voltage. The voltage-regulation feedback unit receives the first DC voltage and outputs a second DC voltage. The current amplification component is coupled to the voltage-regulation feedback unit for receiving an operational voltage and the second DC voltage, current-amplifying the second DC voltage, and accordingly outputting a driving voltage, which is fed back to the voltage-regulation feedback unit. The voltage-regulation feedback unit regulates the driving voltage according to the first DC voltage. The fan receives the driving voltage for releasing heat of the projection control unit.

Abstract: A voltage change detecting circuit part amplifies an output signal of a differential amplifying circuit so that a slew rate thereof may be larger than that of a control signal output from a first error amplifying circuit to an output transistor, responding to change of an output voltage output from an output terminal quicker than a control signal output from the first error amplifying circuit to a first transistor, and causing a discharging circuit part to carry out discharging operation.

Abstract: A power circuit and a charge pumping circuit add one control switch of small size to control a power transistor, and save one switch of large area and one capacitor of large area as compared with a conventional power circuit and a conventional charge pumping circuit. The power circuit includes a power processing circuit, a linear voltage-regulating switch, and a capacitor. The linear voltage-regulating switch includes a power transistor and a control switch. The control switch has a first end coupled to a gate of the power transistor and a second end coupled to one of a drain and a source of the power transistor. When the control switch is “on”, the power transistor is “off”. When the control switch is “off”, the voltage on the drain of the power transistor is maintained at a predetermined value by the linear voltage-regulating switch.

Abstract: An apparatus and method of manufacture for metal-oxide semiconductor (MOS) transistors is disclosed. Devices in accordance with the invention are operable at voltages below 2V. The devices are area efficient, have improved drive strength, and have reduced leakage current. A dynamic threshold voltage control scheme comprised of a forward biased diode in parallel with a capacitor is used, implemented without changing the existing MOS technology process. This scheme controls the threshold voltage of each transistor. In the OFF state, the magnitude of the threshold voltage of the transistor increases, keeping the transistor leakage to a minimum. In the ON state, the magnitude of the threshold voltage decreases, resulting in increased drive strength. The invention is particularly useful in MOS technology for both bulk and silicon on insulator (SOI) CMOS. The use of reverse biasing of the well, in conjunction with the above construct to further decrease leakage in a MOS transistor, is also shown.

Abstract: To provide adequate compensation for a wide range of output loads, a low dropout (LDO) regulator has an amplifier, a pass transistor, a voltage divider, a compensation network, and a control circuit. The amplifier outputs a comparison result according to a reference signal and a feedback signal. The pass transistor generates an output current based on the comparison result of the amplifier. The voltage divider generates the feedback signal according to the output current. The compensation network couples the output of the pass transistor to a low-impedance node of the amplifier, and has a compensation capacitor and a variable resistor coupled to the compensation capacitor. The control circuit is coupled to the input of the pass transistor and to the variable resistor for controlling resistance of the variable resistor according to the output current of the pass transistor.

Abstract: A digital linear voltage regulator includes a comparator, a finite state machine, and a current digital-to-analog converter (DAC). The comparator is preferably coupled to receive a reference voltage and an operating voltage supplied to a dynamic load. The comparator generates, during a clock cycle, a binary output based on a comparison between reference and operating voltages. The finite state machine (FSM) is coupled to receive at least one control signal that indicates a target operating state for the digital linear voltage regulator. The FSM receives the binary output from the comparator and generates a digital word, during a clock cycle, based on the target operating state of the digital linear voltage regulator and on the binary output. The current DAC is coupled to the FSM, receives the digital word and delivers current at the desired voltage to the dynamic load.

Abstract: In a method and system for regulating an output voltage, a linear voltage regulator (LVR) includes an adjustable shunt regulator (ASR) having a limited gain, a feedback circuit (FC), and a compensation resistor (CR). The limited gain causes the output voltage of the ASR to change in response to a change in an input current of the ASR. The FC generates a feedback voltage reference in proportion to the output voltage, the feedback voltage reference being provided to the ASR to control the output voltage. The CR is coupled to the ASR and the FC. The input current flows through the CR to provide a compensating voltage across the CR. The compensating voltage is provided to the feedback circuit to compensate the limited gain, thereby providing the output voltage that is substantially independent of the input current.

Abstract: A current source is provided with two resistor banks, and digital potentiometers are used to control how much each resistor bank affects the resulting output current. Furthermore, when the digital potentiometers are at a particular setting such that a particular resistor bank does not affect the resulting output current (i.e., the resistor bank is “inactive”), the resistance of that resistor bank can be switched without affecting the output current, thus minimizing or eliminating discontinuities in the output current during a current sweep operation. Thus, for example, when a resistor bank meets its threshold and becomes inactive, the resistance of the inactive resistor bank may be switched, and then the digital potentiometer setting may be changed to facilitate smoothly reactivating that resistor bank, with the new resistance.

Abstract: A power supply system comprises a parallel arrangement of a linear amplifier (LA) and a DC-DC converter (CO). The linear amplifier (LA) has an amplifier output to supply a first current (II) to the load (LO). The DC-DC converter (CO) comprises: a converter output for supplying a second current (12) to the load (LO), a first inductor (L1), and a switch (SC) coupled to the first inductor (L1) for generating a current in the first inductor (L1), and a low-pass filter (FI) arranged between the first inductor (L1) and the load (LO). The low pass filter (FI) comprises a first capacitor (C1; CA) which has a first terminal coupled to the switch (SC) an a second terminal coupled to a reference voltage level (GND), and a second inductor (L2; LC) which has a first terminal coupled to the first inductor (L1) and a second terminal coupled to the load (LO).

Abstract: A circuit arrangement for voltage regulation comprises an output, a controllable output transistor connected to the output, an error detection circuit, and a monitoring control circuit. A voltage-regulated output potential can be tapped off the output, the controllable output transistor is connected to the output on a load side and the output transistor comprises a control terminal. The error detection circuit provides a regulating signal if a deviation between the output potential or a potential derived from the output potential and a desired value occurs. By means of the regulating signal the control terminal can be charged or discharged dependent on the deviation and the monitoring control circuit monitors the regulating signal and performs, if the regulating signal lies outside a predetermined range, an additional charging or discharging of the control terminal until the regulating signal lies within the predetermined range.

Abstract: A regulator circuit for efficiently and accurately outputting a target voltage with a simple circuit configuration. The regulator circuit includes an output circuit, a comparator, a counter block, a latch block, and a decoder block. When the target voltage is applied to an output terminal of the output circuit, the output circuit supplies the comparator with feedback voltage. Further, the feedback signal is provided to the counter block. The counter block performs counting in correspondence with the feedback signal. The latch block holds the signal acquired from the counter block and provides the held signal to the decoder block. The decoder block supplies the comparator with reference voltage. The comparator compares the reference voltage and the feedback voltage and controls the counting.

Abstract: A circuit for providing an improved “feed forward” zero in a feedback loop such that the zero has a frequency dependent on the transconductance (gm) of a common gate transistor, and pole and zero separation that is dependent on a multiple of the gm. The circuit includes an error amplifier and a compensation circuit. The compensation circuit provides a first feedback current and a second feedback current. The error amplifier receives a reference signal and a feedback signal. The feedback signal is provided by summing the first feedback current and the second feedback current.

Abstract: Embodiments of the present invention provide a voltage regulator. The voltage regulator includes a driving mechanism coupled to an output node (VREG), wherein the driving mechanism is configured to provide current to the output node to sustain a predetermined voltage on the output node. In addition, the voltage regulator includes a boost circuit coupled to the output node, wherein the boost circuit is configured to drive an additional current onto the output node to reduce fluctuations in the output node voltage when a load coupled to the output node requires a transient switching current that is faster than the loop response time of the driving mechanism. Furthermore, the boost circuit is biased using a self-tracking mechanism to provide accurate duration and level of the current to the output node in a transient switching event.

Abstract: A circuit (1) for converting first and second differential input signals into an output signal is provided with a first differential input stage (10) comprising first and second inputs (11,12) for receiving the first differential input signal and comprising first and second outputs (13,14) and with a second differential input stage (20) comprising third and fourth inputs (21,22) for receiving the second differential input signal and comprising third and fourth outputs (23,24) and with an output stage (30) comprising a first terminal (31) connected to the first output (11) that is further connected to the third output (21) and comprising a second terminal (32) connected to the second output (12) that is further connected to the fourth output (22) and comprising a third terminal (33) for providing the output signal, to avoid complex operational amplifiers.

Abstract: In one aspect this invention provides a DC-DC converter that has a switch mode part for coupling between a DC source and a load, the switch mode part providing x amount of output power; and that further has a linear mode part coupled in parallel with the switch mode part between the DC source and the load, the linear mode part providing y amount of output power, where x is preferably greater than y, and the ratio of x to y may be optimized for particular application constraints. In a further aspect there is a radio frequency (RF) transmitter (TX) for coupling to an antenna, where the TX has a polar architecture having an amplitude modulation (AM) path coupled to a power supply of a power amplifier (PA) and a phase modulation (PM) path coupled to an input of the PA, where the power supply includes the switch mode part for coupling between a battery and the PA and the linear mode part coupled in parallel with the switch mode part between the battery and the PA.

Abstract: A low-dropout (LDO) voltage regulator for generating an output voltage is disclosed. The voltage regulator includes a startup circuit, a curvature corrected bandgap circuit, an error amplifier, a metal oxide semiconductor (MOS) pass device and a voltage slew rate efficient transient response boost circuit. The MOS pass device has a gate node which is coupled to the output of the error amplifier, and a drain node for generating the output voltage. The voltage slew rate efficient transient response boost circuit applies a voltage to the gate node of the MOS pass device to accelerate the response time of the error amplifier in enabling the LDO voltage regulator to reach its final regulated output voltage when an output voltage drop occurs in the LDO voltage regulator.

Abstract: A power supply including a regulation circuit that maintains an approximately constant load current with line voltage. In one embodiment, a regulation circuit includes a semiconductor switch and current sense circuitry to sense the current in the semiconductor switch. The current sense circuitry has a current limit threshold. The regulation circuit current limit threshold is varied from a first level to a second level during the time when the semiconductor switch is on. One embodiment of the regulation circuit is used in a power supply having an output characteristic having an approximately constant output voltage below an output current threshold and an approximately constant output current below an output voltage threshold.

Abstract: The voltage application probe and the voltage measurement probe are connected to the voltage application pad and the voltage measurement pad of the semiconductor device. The voltage application pad and the voltage measurement pad are connected by the conductor, measuring the voltage applied to the voltage application pad through the voltage measurement probe. The voltage compensation circuit in the voltage development device operates to make the voltage applied to the voltage application pad equal to the set voltage for the voltage development device. Even when the resistance between the voltage application probe and the voltage application pad increases, the accurate setting voltage is applied to the voltage application pad.

Abstract: A constant current control circuit is disclosed. Pads are connected with a common power supply terminal. Shunt resistors are located outward of a region containing Pch type MOS transistors. A temperature increase of the shunt resistors due to a temperature increase of the MOS transistors can be suppressed by the above structure. In particular, when the MOS transistor of one circuit system is driven, the shunt resistor of another circuit system is distant from the driving MOS transistor, and thus, it is possible to further suppress the temperature increase of the distant shunt resistor. Moreover, a power supply terminal can be provided as a single common terminal, and the number of terminals can be reduced.

Abstract: An integrated circuit for providing an output voltage substantially equal to a reference voltage includes: a low drop-out (LDO) regulator coupled to the reference voltage for producing the output voltage at an output terminal; a fast turn-on circuit coupled to the LDO regulator for quickly supplying an output current at the output terminal according to a first control signal; and a fast turn-off circuit coupled to the LDO regulator for quickly drawing a discharge current from the output terminal according to a second control signal.

Abstract: A switching circuit for power converters is presented. It includes a voltage-clipping device, a resistive device, a first transistor and a second transistor. The voltage-clipping device is coupled to an input voltage. The first transistor is connected in series with the voltage-clipping device for switching the input voltage. The second transistor is coupled to control the first transistor and the voltage-clipping device in response to a control signal. The resistive device provides a bias voltage to turn on the voltage-clipping device and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the voltage-clipping device is negatively biased. The voltage-clipping device is developed to clamp a maximum voltage for the first transistor.

Abstract: A linear voltage regulator includes a voltage-regulating circuit that controls a power transistor connected to a load. A current-limiting loop circuit includes a common input/output node that is coupled to a control electrode of the power transistor. The loop senses whether a current representative of the current flowing through the power transistor is above a reference current, and in response thereto delivers a non-zero output current to the control electrode of the power transistor. Otherwise, the loop does not deliver any output current to the control electrode of the power transistor.

Abstract: A voltage regulator includes a voltage source for providing an input voltage. The regulator includes circuitry responsive to the input voltage for generating a regulated output voltage. The circuitry enables selection of one of internal linear voltage regulation or external linear voltage regulation for generating the regulated output voltage.

Abstract: A voltage regulator with an adaptive bandwidth, including a first buffer chain, a voltage generating unit, a trimming capacitor unit, a second buffer chain, and a control unit. The first buffer chain delays a clock signal using an external voltage as a supply voltage. The voltage generating unit generates a regulated voltage on the basis a reference voltage. The trimming capacitor unit controls a load capacitance of the voltage generating unit. The second buffer chain delays the clock signal using the regulated voltage as a supply voltage. The control unit adjusts the load capacitance by detecting a delay difference of clocks output from the first and second buffer chains.

Abstract: A DC-DC converter having conversion efficiency that is not lowered by input voltage change. A mode control circuit of the DC-DC converter monitors the input voltage, output voltage generated from the input voltage, and output current. The output current changes in accordance with the output voltage. Based on the input voltage, output voltage, and consumption current of a controller of the DC-DC converter, the mode control circuit generates a signal that is in accordance with load current in which efficiency of a switching regulator and efficiency of a linear regulator are substantially the same. The mode control circuit further compares a signal corresponding to the output current and the signal that is in accordance with the load current to generate a mode control signal. The controller operates the DC-DC converter as the switching regulator or the linear regulator in accordance with the mode control signal.

Abstract: A voltage regulator may include a resistor-based voltage divider circuit generating a desired output voltage from a supply voltage, an output NMOS device whose source terminal may be configured as the output of the voltage regulator and whose drain terminal may be configured to receive the supply voltage, and a control circuit configured to control the output NMOS device to maintain the desired output voltage at the output of the voltage regulator. The control circuit may be configured to receive the desired output voltage from the voltage divider circuit as a first input, and to receive the output of the voltage regulator fed back as a second input to form a feedback loop.

Abstract: A battery charger integrated circuit with temperature control is disclosed that includes a temperature sensor circuit and a charging current generator circuit. Upon receiving a temperature reading voltage (VDT), the temperature sensing circuit is operable to generate a second reference voltage (VREF) that is a function of the first reference voltage (VREF1). The charging current generator circuit generates and continuously adjusts a reference current (I1) and a charging current (IOUT) according to the second reference voltage (VREF). Whenever the temperature reading voltage (VDT) exceeds the first reference voltage, the temperature sensor circuit is operable to adjust the second reference voltage (VREF).

Abstract: Provided is a voltage control circuit which suppresses a calorific value that generates when short-circuit fault occurs even if a voltage value of an input voltage is large. At the time of short-circuit fault, an additional control voltage Va whose voltage value becomes larger when the voltage value of the input voltage Vin is larger is input to the voltage control p-channel MOS transistor (110) from a transistor control MOS transistor (160), to thereby increase resistance of the voltage control p-channel MOS transistor (110) to suppress a short-circuit current. As a result, when the input voltage Vin is larger, the current value of a holding current or a calorific value after the short-circuit protecting operation has been conducted can be suppressed.

Abstract: An apparatus of dynamic feedback control charge pump is provided. The apparatus of dynamic feedback control charge pump receives an input voltage through a voltage regulator. The voltage regulator regulates the input voltage to a base voltage according to a control signal. The charge pump receives the base voltage and provides multiple of the base voltage to an output voltage. A feedback unit provides the control signal to the voltage regulator according to the output voltage. Therefore, the apparatus of dynamic feedback control charge pump can reduce the output voltage ripple and improve the output efficiency of the charge pump.

Abstract: The present invention provides a low dropout (LDO) regulator with a stability compensation circuit. A “zero frequency” tracking as well as “non-dominant parasitic poles' frequency reshaping” are performed to achieve a good phase margin for the LDO by means of the compensation circuit. In this compensation method neither a large load capacitor nor its equivalent series resistance is needed to stabilize a regulator. LDO regulators, in system on chip application, having load capacitors in the range of few nano-Farads to few hundreds of nano-Farads can be efficiently compensated with this compensation method. A dominant pole for the regulator is realized at an internal node and the second pole at an output node of the regulator is tracked with a variable capacitor generated zero over a range of load current to cancel the effect of each other. A third pole of the system is pushed out above the unity gain frequency of the open loop transfer function with the help of the frequency compensation circuit.

Abstract: Disclosed is a filter circuit that includes means for monitoring currents flowing through positive and negative windings of a common-mode noise filter, and means for performing an adjustment based on the result of monitoring so as to equalize the current flowing positive and negative windings.

Abstract: In one embodiment, a current limiter is configured to limit current drawn from a main power supply to a maximum value. A load device is coupled with an output of the current limiter. The load device is configured to periodically draw a first current during operation. The maximum value is below a value of the first current. A charge storage device is coupled with the load device. The charge storage device is configured to supply additional current to the load device to satisfy the first current value. A linear voltage regulator is coupled between the charge storage device and the load device.

Abstract: A circuit arrangement and associated method for reducing crosstalk are disclosed. A load impedance is connected via a controlled current source to an input connection for supplying a supply voltage (Vin) in the circuit arrangement. The current source is actuated using a control means such that the current source outputs a current which corresponds to the average current drawn by the load impedance. In this manner, merely a small voltage drop occurs on the supply voltage while radio-frequency interference is concurrently mitigated.

Abstract: An exemplary device for controlling rotation speed of a computer fan includes an identifying device and a control circuit. The identifying device is configured for identifying the type of the computer fan. The control circuit configured for controlling rotation speed of the computer fan includes an electric switch, an integrated circuit, a first output terminal, and a second output terminal. The electric switch has a first terminal coupled to the identifying device to receive an identifying signal, a second terminal coupled to a super I/O chip to receive a PWM signal. The integrated circuit is configured to convert the PWM signal to an analog voltage signal. The first output terminal is configured to output the PWM signal to a PWM control pin of a fan header. The second output terminal is configured to output the analog voltage signal to a power pin of the fan header.

Abstract: A disclosed voltage comparison circuit for detecting a voltage difference of two input signals includes one or more differential amplifier circuits, each of which has a differential pair of first and second input transistors each having an electrode to which a corresponding one of the input signals is input, a constant current circuit configured to generate constant current according to a control signal and supply the constant current to the first and second input transistors, and a first resistor connected between the constant current circuit and the first input transistor; and a current control circuit configured to control a value of the first constant current. The current control circuit controls the value so that a voltage difference between both ends of the first resistor becomes equal to a predetermined value.

Abstract: A compensated regulator includes a transconductance stage having a positive input for receiving a reference voltage, a negative input, and an output, an adjustable compensation block coupled between the output of the transconductance stage and ground, a feedback circuit having a first node coupled to the output of the compensated regulator, a second node coupled to the negative input of the transconductance stage, and a third node coupled to ground, and a driver stage having an input coupled to the output of the transconductance stage, a current output coupled to the output of the compensated regulator, and a sense output coupled to the adjustable compensation block.

Abstract: A series regulator circuit for supplying voltage with low current consumption without depending on the capacitance of a load. A constant current source, which is connected to an input voltage line, is connected to a ground voltage line via a bipolar transistor. The gate terminals of first and second n-channel MOS transistors are connected between the constant current source and the collector terminal of the bipolar transistor. The drain terminals of the first and second transistors are connected to the input voltage line. The source terminal of the transistor functioning as an output terminal is connected via a first resistor element to the source terminal of the first terminal, which is connected to a ground voltage line via second and third resistor elements. A connection node between the second and third resistor elements is connected to a base voltage of the bipolar transistor.

Abstract: A voltage regulator circuit and method are provided for regulating a voltage accurately in response to rapid variations in the regulator's load. The voltage regulator utilizes a hybrid loop; an embodiment of such utilization is exemplified by circuit 300. Amplifier 301 controls the current flowing through pass element 303 from an unregulated input voltage node Vin to a regulated voltage output node Vout. The regulated output voltage is provided to load 311 so that the voltage across the load stays constant regardless of variations in the current it pulls. The value of the regulated voltage is set by feedback network 302 and the input voltage at node Vref. The regulator feedback loop formed by amplifier 301, pass element 303, and feedback network 302 regulate the voltage at Vout in response to low frequency perturbations in load 311. In response to high frequency perturbations, a sensing network triggers control circuitry 310. Such a sensing network is exemplified in this embodiment by comparators 308 and 309.

Abstract: The present invention discloses a linear regulator and a voltage regulation method. The method comprises: providing a power transistor for converting a supply voltage to an output voltage to a load according to the conduction condition of the power transistor; controlling the conduction condition of the power transistor according to a comparison between a feedback signal relating to the output voltage and a reference voltage; obtaining a signal relating to a load condition; and controlling the conduction capability of the power transistor according to the signal relating to the load condition.