Including Parallel Paths (e.g., Current Mirror) Patents (Class 323/315)
  • Publication number: 20130033251
    Abstract: A semiconductor integrated circuit includes constant current circuit, starter circuit and power supply start-up circuit. In the constant current circuit, first current mirror circuit includes first and second transistors, and second current mirror circuit includes third and fourth transistors that are connected to first and second nodes. In the starter circuit, a potential of first node controls sixth transistor, seventh transistor is connected to third node, gate electrode of the seventh transistor is at ground potential, a capacitance element is connected to fourth node, and a potential of fourth node controls fifth transistor, which supplies start-up current to the constant current circuit via second node. In the power supply start-up circuit, source electrode of eighth transistor is fixed at power supply voltage, gate electrode is at ground potential, and drain electrode supplies power to the other circuits.
    Type: Application
    Filed: July 26, 2012
    Publication date: February 7, 2013
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Shigeru Nagatomo
  • Patent number: 8368377
    Abstract: An integrated circuit includes a bandgap reference generator and a voltage regulator. The bandgap reference generator includes a first current path, and a first bipolar transistor with an emitter-collector path in the first current path. The voltage regulator includes a second current path, wherein the second current path mirrors the first current path; a resistor configured to receive a current of the second current path; a second bipolar transistor with a base and a collector of the second bipolar transistor being interconnected; and a third bipolar transistor connected in series with the second bipolar transistor and the resistor. A base and a collector of the third bipolar transistor are interconnected.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: February 5, 2013
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventor: Jun Liu
  • Patent number: 8358119
    Abstract: A current reference circuit includes a proportional-to-absolute temperature (PTAT) current generator, a band-gap reference circuit and a current replication circuit. The PTAT generator generates a PTAT current. The band-gap reference circuit generates a reference voltage based on the PTAT current and generates a second current by cancelling a first current from the PTAT current. The first current has a zero temperature coefficient and the second current has a positive temperature coefficient. The current replication circuit replicates the first current based on the PTAT current and the second current.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: January 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyoung-Rae Kim
  • Publication number: 20130009623
    Abstract: A bootstrapped switch circuit includes a first switch transistor to receive an input signal and a second switch transistor to provide an output signal. The sources of the switch transistors may be coupled. A voltage source may be coupled to the sources of the switch transistors and at least one of the gates of the switch transistors. The voltage source may generate a control voltage to activate at least one of the switch transistors based on a bias current. A voltage source driver may be coupled to the voltage source to generate the bias current based on a bias voltage. The bias voltage may include a first voltage approximately corresponding to an overdrive voltage of at least one of the switch transistors and a second voltage approximately corresponding to a threshold voltage of the switch transistors.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 10, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Christian Steffen BIRK, Gerard MORA PUCHALT
  • Patent number: 8350611
    Abstract: A start circuit including a load unit, a first switch, a second switch and a reset control circuit is provided. The load unit receives a power voltage. The first switch is electrically connected between a first end of the load unit and a ground, and receives a node voltage from a reference circuit. The second switch has a first end electrically connected to the reference circuit, a second end electrically connected to the ground, and a control end electrically connected to the second end of the load unit. The second switch determines whether to provide a start voltage to the reference circuit according to a conducting state thereof. The reset control circuit provides a discharge path between a control end of the first switch and the ground, and conducts the discharge path according to the power voltage during a period when the power voltage is smaller than a threshold voltage.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: January 8, 2013
    Assignee: Himax Technologies Limited
    Inventor: Chuan-Chien Hsu
  • Publication number: 20130002361
    Abstract: A ring oscillator that is more insensitive to power supply ripple utilizes an amplifier circuit having a first input coupled to a reference voltage. A current is generated that represents a control voltage supplied to the oscillator control circuit. That current is mirrored and supplied as a control current to the oscillator. An amplifier is used in a feedback loop to ensure that incremental variations in source to drain voltage of a first transistor of the current mirror is present in a second transistor of the current mirror to make the control current more immune to supply ripple.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Abdulkerim L. Coban, Ravi Kummaraguntla
  • Patent number: 8344720
    Abstract: A reference voltage generator includes a proportional to absolute temperature (PTAT) current source and a voltage divider. The PTAT current source is capable of providing a first current that is proportional to a temperature. The voltage divider is capable of receiving a second current that is proportional to the first current. The voltage divider is capable of outputting a reference voltage. The reference voltage is substantially independent from a change of the temperature.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: January 1, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dipankar Nag, Chewn-Pu Jou
  • Patent number: 8344719
    Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: January 1, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kiyoshi Kato, Shuhei Nagatsuka, Koichiro Kamata, Tsutomu Murakawa, Takahiro Tuji, Kaori Ikada
  • Patent number: 8344713
    Abstract: An LDO regulator system has first and second current mirror circuits connected to its output terminal. A load attached to the output terminal is supplied with a constant voltage. Variations in the load that cause variations in the magnitude of the output voltage trigger one of the first or second current mirror circuits to generate a current that varies the magnitude of a gate voltage of a pass-transistor. The variation in the gate voltage in turns varies the drain current of the pass-transistor, which varies the output voltage to counter the change in the magnitude of the output voltage. Using the first and second current mirror circuits avoids the need for a large load capacitor and very high bandwidth of a conventional LDO regulator.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: January 1, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mithlesh Shrivas, Mayank Jain
  • Patent number: 8339117
    Abstract: Electrical supply apparatus comprising a start-up circuit element coupled to an output element for ensuring reliable start-up when first connected to a source of power. The start-up circuit element comprises first and second branches with current mirror coupling therebetween. The first branch comprises first and second transistors of opposite polarities for connection in series between the source of power and ground and a leakage path to ground in parallel with the second transistor for start-up current for the first transistor of the first branch in response to application of voltage from the source of power. The current mirror coupling between the first and second branches responds to start-up of the first transistor of the first branch to start up a first transistor of the second branch and provide start-up current to the output element.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: December 25, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Thierry Sicard
  • Publication number: 20120313712
    Abstract: A circuit for providing a reference voltage can be widely used in audio applications. However, at startup an abrupt start in the reference signal can cause undesirable audible artifacts. A circuit employing feedback of a reference voltage to control the charging of a capacitor which provides the reference voltage can be used to provide a smooth startup to the reference voltage. The circuit contains a differential pair for steering a fixed current source from one path to another as the reference voltage increases. The steered current can then be mirrored into one ore more current mirrors where the newly mirrored current can he squeezed to zero when the difference between a desired reference voltage and the reference voltage approaches zero. This newly mirrored current can he used to charge a capacitor which is used to provide the reference voltage.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 13, 2012
    Inventors: Christian Larsen, Gomathi Komanduru, Lorenzo Crespi
  • Patent number: 8330445
    Abstract: Provided herein are circuits and methods to generate a voltage proportional to absolute temperature (VPTAT) and/or a bandgap voltage output (VGO) with low 1/f noise. A first base-emitter voltage branch is used to produce a first base-emitter voltage (VBE1). A second base-emitter voltage branch is used to produce a second base-emitter voltage (VBE2). The circuit also includes a first current preconditioning branch and/or a second current preconditioning branch. The VPTAT is produced based on VBE1 and VBE2. A CTAT branch can be used to generate a voltage complimentary to absolute temperature (VCTAT), which can be added to VPTAT to produce VGO. Which transistors are in the first base-emitter voltage branch, the second base-emitter voltage branch, the first current preconditioning branch, the second current pre-conditioning branch, and the CTAT branch changes over time.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: December 11, 2012
    Assignee: Intersil Americas Inc.
    Inventor: Steven G. Herbst
  • Patent number: 8330516
    Abstract: A start circuit adapted to start a reference circuit including a plurality of bias nodes is provided. The start circuit includes a current source, a current mirror, a load device, and a control device. The current source determines whether or not to generate an internal current according to a plurality of bias voltages on a part of the bias nodes. The current mirror duplicates the internal current to produce a mirrored current. The load device adjusts a control voltage according to the mirrored current. The control device determines whether or not to generate a start voltage according to the control voltage, and transmits the start voltage to one of the part of the bias nodes, so as to break the reference circuit away from a zero-current state.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 11, 2012
    Assignee: Himax Technologies Limited
    Inventor: Wei-Kai Tseng
  • Patent number: 8324959
    Abstract: A bias circuit according to the present invention includes: a transistor for supplying a bias current from the emitter of the transistor; an emitter potential generating device for supplying a potential to the emitter of the transistor; a switch element; and a voltage supply circuit for supplying a base voltage to the base of the transistor in response to the on/off of the switch element, wherein the emitter potential generating device generates a potential causing a potential difference between the base and emitter of the transistor to fall below a saturation voltage at the junction of the transistor, even in the case where the base of the transistor is fed with a voltage not lower the saturation voltage at the junction of the transistor.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: December 4, 2012
    Assignee: Panasonic Corporation
    Inventor: Yasuyuki Masumoto
  • Patent number: 8324881
    Abstract: A circuit for generating a band gap reference voltage (VREF) includes circuitry (I3×7) for supplying a first current to a first conductor (NODE1) and a second current to a second conductor (NODE2). The first conductor is successively coupled to a plurality of diodes (Q0×16), respectively, in response to a digital signal (CTL-VBE) to cause the first current to successively flow into selected diodes. The second conductor is coupled to collectors of the diodes which are not presently coupled to the first conductor. The diodes are successively coupled to the first conductor so that the first current causes the diodes, respectively, to produce relatively large VBE voltages on the first conductor and the second current causes sets of the diodes not coupled to the first conductor to produce relatively small VBE voltages on the second conductor. The relatively large and small VBE voltages provide differential band gap charges (QCA-QCB) which are averaged to provide a stable band gap reference voltage (VREF).
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: December 4, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Dimitar T. Trifonov, Jerry L. Doorenbos
  • Publication number: 20120300606
    Abstract: Various apparatuses, methods and systems for damping a current driver are disclosed herein. For example, some embodiments provide an apparatus for supplying current, including an output transistor connected between a voltage supply and a current output, and an active clamp connected between the current output and a current sink. The active clamp is adapted to connect the current output to the current sink when a voltage at the current output reaches a predetermined state relative to a voltage at a control input of the output transistor.
    Type: Application
    Filed: May 27, 2011
    Publication date: November 29, 2012
    Inventors: Shengyuan Li, Douglas Warren Dean, Indumini Ranmuthu
  • Patent number: 8310298
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a current mirror circuit that includes a reference current source that generates a reference current, a reference transistor, a mirror transistor and a ratioed body bias feedback unit. The reference transistor has a first node that is coupled to the output of the reference current source, a gate that is coupled to the first node and a second node coupled to a common voltage. The mirror transistor has a gate coupled to the first node. The ratioed body bias feedback unit generates a body bias voltage coupled to the body of the reference transistor and the body of the mirror transistor. The ratioed body bias feedback unit is configured to adjust the body bias voltage in relationship to the common voltage so that the reference transistor and the mirror transistor each have a threshold voltage within a predefined range.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Baumgartner, Patrick L. Rosno, Dana M. Woeste
  • Patent number: 8294450
    Abstract: An integrated circuit structure includes a bandgap reference circuit and a start-up circuit. The bandgap reference circuit includes a positive power supply node and a PMOS transistor including a source coupled to the positive power supply node. The start-up circuit is configured to be turned on during a start-up stage of the bandgap reference circuit, and to be turned off after the start-up stage. The start-up circuit includes a switch configured to interconnect a gate and a drain of the PMOS transistor during the start-up stage, and to disconnect the gate of the PMOS transistor from the drain of the PMOS transistor after the start-up stage.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 23, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Fu Lee, Gu-Huan Li
  • Patent number: 8269478
    Abstract: A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistor is connected between their bases across which ?VBE appears. A third bipolar transistor is connected such that the voltages at the bases of the first and third transistors are equal or differ by a PTAT amount. A current mirror is arranged to balance the collector current of one of the second and third transistors with an image of the collector current of the first transistor when the output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established such that the operating point has a desired temperature characteristic. A transistor connected to the output node and driven by the output of the current mirror regulates the output voltage by negative feedback.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: September 18, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Hio Leong Chao, A. Paul Brokaw
  • Patent number: 8237376
    Abstract: A method and a circuit may have an ability to provide constant currents of a certain set value, the rising and falling edges of which may be shorter than the design minimum on-phase. Essentially, these results may be obtained by keeping an operational amplifier that controls the output power switch in an active state during off-phases of an impulsive drive signal received by the current source circuit in order to maintain the output voltage of the operational amplifier at or just below the voltage to be applied to the control terminal of the output power switch during a successive on-phase of a received drive pulse signal.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: August 7, 2012
    Assignee: STMicroelectronics S.R.L.
    Inventor: Pasquale Franco
  • Patent number: 8228053
    Abstract: Systems and methods to achieve a startup circuit of bandgap voltage reference generator circuits monitoring a current flow in the bandgap voltage reference generator circuit have been achieved. The startup circuit can operate at supply voltages of about one threshold voltage and is therefore appropriate for low voltage applications. The monitoring of a current through an electrical component inside the bandgap voltage reference generator circuit by replication the component branch in a scaled version saves power and does not disturb the normal operation of the current-mode bandgap voltage reference generator. The startup circuit invented can be applied for current-mode bandgap voltage reference generator circuits as well as for voltage-mode bandgap voltage reference generator circuits.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: July 24, 2012
    Assignee: Dialog Semiconductor GmbH
    Inventors: Achim Stellberger, Frank Schwiderski
  • Publication number: 20120181861
    Abstract: The invention relates to a method for the data transmission from an emitter (1) to a receiver (2) in an AC voltage network, comprising a distributor (3) and at least one user group (4) with one or several users (5), wherein the emitter (1) feeds a signal to the AC voltage network by means of a power source (6).
    Type: Application
    Filed: September 30, 2010
    Publication date: July 19, 2012
    Applicant: AIZO GROUP AG
    Inventors: Eckhard Bröckmann, Wilfried Beck, Wolfgang Kemmler, Volker Deckers
  • Patent number: 8222954
    Abstract: A method and apparatus to reduce the degradation in performance of semiconductor-based devices due to process, voltage, and temperature (PVT) and/or other causes of variation. Adaptive feedback mechanisms are employed to sense and correct performance degradation, while simultaneously facilitating configurability within integrated circuits (ICs) such as programmable logic devices (PLDs). A voltage-feedback mechanism is employed to detect PVT variation and mirrored current references are adaptively adjusted to track and substantially eliminate the PVT variation. More than one voltage-feedback mechanism may instead be utilized to detect PVT-based variations within a differential device, whereby a first voltage-feedback mechanism is utilized to detect common-mode voltage variation and a second voltage-feedback mechanism produces mirrored reference currents to substantially remove the common-mode voltage variation and facilitate symmetrical operation of the differential device.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: July 17, 2012
    Assignee: Xilinx, Inc.
    Inventors: Guo Jun Ren, Qi Zhang, Ketan Sodha
  • Patent number: 8222884
    Abstract: An integrated electronic device for generating a reference voltage. The circuitry has a bias current generator for generating a first bias current, a diode element coupled to the bias current generator and fed by a second bias current derived from the first bias current for converting the second bias current into a reference voltage across the diode element, a supply voltage pre-regulator stage for regulating the supply voltage used for the bias current generator, and an output buffer coupled to the reference voltage for providing a low impedance output, wherein the reference voltage is coupled to the supply pre-regulator stage for biasing the supply pre-regulator stage by the reference voltage.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: July 17, 2012
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Matthias Arnold
  • Patent number: 8217684
    Abstract: Systems and methods for realizing current drivers without current or voltage feedback for devices that require accurate current drive with zero standby current has been disclosed. In a preferred embodiment of the invention this current driver is applied for write circuits for MRAMs. A fast and accurate reference current is generated by diode voltage divided by resistor without any feedback. The diode current is not fed back from the reference current. The diode current is generated from a regulated voltage. Temperature compensation of the write current is inherently built in the diode current reference. Fine-tuning of the temperature coefficient is achieved by mixing poly and diffusion resistors. A switch inserted in the current driver can turn on the driver fast and without a need for standby current. Leading boost in the current driver can fast charge the large coupling capacitance of word and bit lines and speed up write timing.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: July 10, 2012
    Assignee: MagIC Technologies, Inc.
    Inventors: Perng-Fei Yuh, Pokang Wang, Lejan Pu, Minh Tran, Chao-Hung Chang
  • Patent number: 8217713
    Abstract: A device for providing a high precision current reference comprising a PTAT generator circuit for supplying a voltage, a high precision current reference offset generator circuit for generating a high precision current offset to compensate for variation in a resistance component due to variation in temperature, and a current adding circuit for aggregating the current from the PTAT generator circuit and the current from the high precision current reference offset generator circuit. In one embodiment, a high precision current reference generated is substantially independent of temperature. On-chip resistors may be used to design a high precision current reference. Accordingly, high precision current reference generated maintains high precision with zero temperature co-efficient using on-chip resistors that are substantially cheaper than off-chip resistors.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: July 10, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Vijay Kumar Srinivasa Raghavan, Cristinel Zonte
  • Patent number: 8212608
    Abstract: A circuit for providing a reference voltage can be widely used in audio applications. However, at startup an abrupt start in the reference signal can cause undesirable audible artifacts. A circuit employing feedback of a reference voltage to control the charging of a capacitor which provides the reference voltage can be used to provide a smooth startup to the reference voltage. The circuit contains a differential pair for steering a fixed current source from one path to another as the reference voltage increases. The steered current can then be mirrored into one or more current mirrors where the newly mirrored current can be squeezed to zero when the difference between a desired reference voltage and the reference voltage approaches zero. This newly mirrored current can be used to charge a capacitor which is used to provide the reference voltage.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: July 3, 2012
    Assignee: Conexant Systems, Inc.
    Inventors: Christian Larsen, Gomathi Komanduru, Lorenzo Crespi
  • Publication number: 20120161745
    Abstract: Power supply detection circuit. The power supply detection circuit includes an input circuit responsive to a core power supply voltage to generate a first output voltage at a first node. The power supply detection circuit also includes a sense logic circuit to sense a voltage drop associated with the first output voltage, when the first output voltage is at a logic level HIGH. Further, the power supply detection circuit includes a current mirror circuit responsive to the voltage drop to increase voltage of the first output voltage to an input and output power supply voltage. Moreover, the power supply detection circuit also includes an output circuit that inverts the first output voltage to generate a second output voltage at a second node.
    Type: Application
    Filed: December 28, 2010
    Publication date: June 28, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Sujan Kundapur MANOHAR, Arvind MADAN, Shahid ALI
  • Publication number: 20120139524
    Abstract: According to one embodiment, a constant current circuit, including A constant current circuit, a current mirror circuit generating an output current, an external terminal to which an external resistance is connected, a reference current to be supplied to the current mirror circuit depending on the external resistance, a first detection circuit detecting an open state of the external terminal, and an alternative circuit supplying an alternative current corresponding to the reference current into the current mirror circuit when the first detection circuit detects the open state.
    Type: Application
    Filed: March 17, 2011
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Atsuhisa SUZUKI
  • Patent number: 8188792
    Abstract: A circuit includes a current mirror circuit and first and second transistors coupled as a differential pair. A first input voltage is provided to a control input of the first transistor. A second input voltage is provided to a control input of the second transistor. The current mirror circuit includes a third transistor, a fourth transistor coupled to the third transistor, and a fifth transistor coupled in series with the fourth transistor. The third transistor provides a current through the differential pair that is proportional to a current through the fourth transistor. A control input of the fourth transistor is coupled between the fifth transistor and a source of current.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: May 29, 2012
    Assignee: Altera Corporation
    Inventors: Sriram Narayan, Sergey Shumarayev
  • Patent number: 8183926
    Abstract: An electronic circuit including: a first branch, placed between two terminals of application of a D.C. voltage, including a series connection of a first constant current source, of a first diode-connected N-channel MOS transistor, of a first diode-connected P-channel MOS transistor, and of a second constant current source; a second branch, parallel to the first branch, comprising a series connection of a second N-channel MOS transistor connected as a current mirror on the first N-channel MOS transistor and of a second P-channel MOS transistor connected as a current mirror on the first P-channel transistor; and an input terminal connected between the first N-channel and P-channel transistors and an output terminal connected between the second N-channel and P-channel transistors.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: May 22, 2012
    Assignee: STMicroelectronics (Crolles2) SAS
    Inventor: Hubert Degoirat
  • Publication number: 20120113737
    Abstract: An electronic device includes a functional unit and a current compensation unit. The functional unit operates based on a power supplied by an external host through power supply lines and generates a control signal based on an amount of power consumption of the functional unit. The current compensation unit compensates a change in a power supply current based on the control signal, where the power supply current is a current flowing through the power supply lines.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 10, 2012
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Seung-Won LEE, Sung-Hee Cho
  • Patent number: 8174320
    Abstract: A current switching system is described. This system includes first and second mirrored devices coupled to each other and a coupled terminal, and the first and second mirrored devices are coupled to an input terminal and an output terminal; a storage element in element in parallel with the first mirrored device and the first degeneration device; a variable impedance device coupled between the coupled terminal and a low voltage device; and a current mirroring accuracy enhancing circuit coupled between the coupled terminal and a high voltage device, wherein the variable impedance device dynamically changes a current at the coupled terminal to a second level depending when a threshold is met, and an impedance on the coupled terminal remains low both before switching and during switching.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: May 8, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Rajarshi Mukhopadhyay, Bryan E. Bloodworth, Reza Sharifi, Pankaj Pandey, Taras Dudar
  • Publication number: 20120105046
    Abstract: Current mirrors have been used in analog electronics with both CMOS and bipolar transistors for many years. Conventional current minor designs, though, may not be suitable for emerging technology transistors, such as graphene transistors, carbon nanotube (CNT) transistors, or other ambipolar transistors. Here, a current minor has been provided that uses ambipolar transistors, which accounts for the more unusual I-V (drain current to gate-source voltage) characteristics of ambipolar transistors.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 3, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Andrew Marshall, Ashesh Parikh
  • Patent number: 8169224
    Abstract: A power circuit includes a power transistor for feeding a load current to a load, a measuring transistor for coupling out a measurement current dependent on the load current, at least two coupling transistors for dividing the measurement current into an internal measurement current and into an external measurement current, wherein the external measurement current can be fed to an external evaluation circuit, and the internal measurement current is fed to an internal evaluation circuit for evaluation. A third coupling transistor can be coupled to the measuring transistor if a measuring device determines a non-coupled state, and the third coupling transistor can be decoupled from the measuring transistor if the measuring device determines a coupled state. The measuring device determines the coupled state if the external evaluation device is coupled to the power circuit, and the measuring device determines a non-coupled state if the external evaluation device is not coupled to the power circuit.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: May 1, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Rainald Sander, Steffen Thiele, Markus Winkler
  • Patent number: 8159206
    Abstract: A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistance is connected between their bases across which ?VBE appears. A third bipolar transistor is connected such that its base voltage is equal to that of the first transistor or differs by a PTAT amount. A current mirror balances the collector current of one of the second and third transistors with an image of the collector current of the first transistor when an output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established to provide a desired temperature characteristic. A feedback transistor provides current to the bases of the bipolar transistors and to the output node and is driven by the current mirror output to regulate the voltage at the output node by negative feedback.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: April 17, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Hio Leong Chao, A. Paul Brokaw
  • Publication number: 20120086503
    Abstract: In a constant current circuit, a drain terminal is connected to an output terminal of a current, and a gate voltage operable in a saturation region is applied to a source-grounded transistor. An increase current generating circuit generates an increase current equivalent to an increase of a current due to a channel length modulation effect of the transistor. A current mirror circuit generates a current having the same value as that of the increase current generated by the increase current generating circuit and supplies the generated current to the drain terminal of the transistor.
    Type: Application
    Filed: December 16, 2011
    Publication date: April 12, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Sadanori AKIYA
  • Publication number: 20120074923
    Abstract: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
    Type: Application
    Filed: November 29, 2011
    Publication date: March 29, 2012
    Applicant: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Sang Thanh Nguyen, Anh Ly, Hung O. Nguyen, Wingfu Aaron Lau, Nasrin Jaffari, Thuan Trong Vu, Vishal Sarin, Loc B. Hoang
  • Patent number: 8138743
    Abstract: A band-gap reference voltage source circuit is constituted of a diode-pair circuit connected to a reference voltage output terminal, a first differential amplifier including a first transistor and a first operational amplifier, and a second differential amplifier including a second transistor and a second operational amplifier. The second differential amplifier operates based on a bias voltage, which is lower than a predetermined voltage, so as to forcedly pull up the level of the reference voltage output terminal via the second transistor before the first differential amplifier starts to pull up the level of the reference voltage output terminal up to the predetermined voltage via the first transistor.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: March 20, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Akira Ide
  • Patent number: 8134355
    Abstract: A semiconductor device monitors a voltage between a reference potential and an input potential and obtains a constant output potential regardless of a value of the voltage, after the voltage exceeds a predetermined threshold voltage in such a manner that the semiconductor device divides a voltage between the reference potential and the input potential using a plurality of first non-linear elements and at least one linear element to constantly generate a first bias voltage regardless of a value of the voltage, divides a voltage between the reference potential and the input potential using a plurality of second non-linear elements with reference to the first bias voltage to constantly generate a second bias voltage regardless of a value of the voltage, and determines the output potential with reference to the second bias voltage.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: March 13, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kei Takahashi
  • Publication number: 20120044023
    Abstract: A circuit for providing a reference voltage can be widely used in audio applications. However, at startup an abrupt start in the reference signal can cause undesirable audible artifacts. A circuit employing feedback of a reference voltage to control the charging of a capacitor which provides the reference voltage can be used to provide a smooth startup to the reference voltage. The circuit contains a differential pair for steering a fixed current source from one path to another as the reference voltage increases. The steered current can then be mirrored into one or more current mirrors where the newly mirrored current can be squeezed to zero when the difference between a desired reference voltage and the reference voltage approaches zero. This newly mirrored current can be used to charge a capacitor which is used to provide the reference voltage.
    Type: Application
    Filed: August 20, 2010
    Publication date: February 23, 2012
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Christian Larsen, Gomathi Komanduru, Lorenzo Crespi
  • Patent number: 8115536
    Abstract: A self-oscillating switch circuit for amplitude modulation dimming for dimming a LED load. The self-oscillating switch circuit comprises a high-power input terminal (S2) for supplying a first power to the load and a low-power input terminal (S1) for supplying a second power to the load. The switch circuit further comprises a power switch semi-conductor device (Q1) configured for controlling a load current from at least one of the high-power input terminal (S2) and the low-power input terminal (S1) to the output terminal. A control semi-conductor device (Q2) is configured to control the power switch semi-conductor device (Q1) in response to a sensing voltage.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: February 14, 2012
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Jeroen Snelten
  • Patent number: 8106705
    Abstract: The electronic circuit comprises a functional module (10), a condition signaling module (20), a reference module (30) and a control circuit (40). The condition signaling module (20) generates an indication signal (Imeas) indicative for PVT conditions local to the functional module. The PVT conditions comprise a set of conditions relevant for a module comprising at least one of a voltage supplied to said module, a temperature within an area occupied by said module and the process conditions relevant for said area The reference module (30) generates a reference signal (Iref) having a value that is substantially independent of said PVT-conditions. The control circuit (40) compares the indication signal (Imeas) and the reference signal (Iref), and for generating a control signal (pvt<1>, . . . , pvt<n>) for the functional module.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: January 31, 2012
    Assignee: Synopsys, Inc.
    Inventor: Andy C. Negoi
  • Patent number: 8098059
    Abstract: A current negative-feedback circuit comprises a current detection unit and a sawtooth-shaped waveform generation unit. The current detection unit comprises a first P-ch MOSFET Q2 and a second P-ch MOSFET Q3 which constitute a current mirror circuit, a current adjustment resistor R4, a current detection resistor R1, and a constant current source I1. The current mirror circuit outputs current almost proportional to the charge current of an inductance via a switching device or outputs a current which is the quadratic function of the charge current of an inductance. The sawtooth-shaped waveform generation means adds the constant charge current of the constant current source I2 and the current output from the current mirror circuit, charges the capacitor C1, and generates a sawtooth-shaped waveform.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 17, 2012
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Yasunori Nakahashi, Satoshi Yamane
  • Publication number: 20120001613
    Abstract: High linearity is essential in audio circuitry. As sampling rates for audio applications are needed, high speed and high linearity are needed in analog and mixed signal portions of audio circuitry such as in current mirrors. A current mirror employs two current paths in an output. The first current path is driven by a fast acting transistor through a resistor. The second current path is driven by a differential amplifier coupled to another transistor through another resistor. The second current path is used to maintain linearity by causing the voltage across both transistors to be the same.
    Type: Application
    Filed: July 1, 2010
    Publication date: January 5, 2012
    Applicant: Conexant Systems, Inc.
    Inventors: CHRISTIAN LARSEN, LORENZO CRESPI
  • Patent number: 8089261
    Abstract: Disclosed is a low dropout regulator that uses a load current tracking zero circuit to stabilize a feedback loop to prevent oscillations. The load current tracking zero circuit senses the DC component of the current flowing through the pass transistor of the low dropout regulator and uses the pass transistor current signal to control a multiplicative factor. The multiplicative factor multiplies the AC variations in the output voltage to generate the zero current.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: January 3, 2012
    Assignee: LSI Corporation
    Inventor: Ronald J. Lipka
  • Patent number: 8085026
    Abstract: A current sense amplifier sensing current through a main switch of a converter. The amplifier includes first and second switch devices, an amplifier control circuit, a bias circuit, a current generator circuit, and a sense circuit. The main switch is coupled to an input, phase and control nodes. The first and second switch devices are smaller matching versions of the main switch and are both coupled to the main switch and form first and second nodes. The bias circuit is coupled between second and fourth nodes and the amplifier control circuit is coupled between first and third nodes. The current generator develops a first current through the amplifier control circuit and a second current through the bias circuit. The sense circuit has a current path coupled to the first node and is controlled by the third node to develop a sense voltage indicative of current through the main switch.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: December 27, 2011
    Assignee: Intersil Americas Inc.
    Inventor: Stepan Iliasevitch
  • Patent number: 8085029
    Abstract: Circuits and methods that improve the performance of reference circuits are provided. A reference generator circuit maintains a substantially constant output current over an extended temperature for use as a reference. Output current fluctuations caused by a poorly specified power source or process variations are minimized or eliminated.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: December 27, 2011
    Assignee: Linear Technology Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 8067931
    Abstract: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: November 29, 2011
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Sang Thanh Nguyen, Anh Ly, Hung Q. Nguyen, Wingfu Aaron Lau, Nasrin Jaffari, Thuan Trong Vu, Vishal Sarin, Loc B. Hoang
  • Patent number: 8063624
    Abstract: A method and apparatus are described for providing a current mirror type high voltage switching circuit (60) having a reference branch (M2, M3, R1) and a tracking branch (M1, M5), where the output peak current is limited by adding an additional branch (M4, M6) to the current mirror circuit which includes an additional mirror transistor (M4) and cascode transistor (M6), and where over voltage protection is provided by including a shut-off circuit (Q1, Q2) which turns “OFF” the cascode transistors (M5-M8) whenever the output voltage (Vout) exceeds the first reference voltage (Vbat) by a predetermined amount.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: November 22, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ivan Carlos Ribeiro do Nascimento, Walter Luis Tercariol